drm/i915: replace ad-hoc dual-link lvds checks
... with is_dual_link_lvds introduced in
commit b03543857f
Author: Takashi Iwai <tiwai@suse.de>
Date: Tue Mar 20 13:07:05 2012 +0100
drm/i915: Check VBIOS value for determining LVDS dual channel mode, too
All these checks predate this commit and have simply been overlooked.
Since we don't support switching between single-link and dual-link
modes anyway, this different checks could at best only get in the way
of refactorings, and in the worst case cause inconsistencies.
v2: Update the comment, we now have a solid way to figure out whether
we need dual-link lvds or not (falling back to vbt values as a last
resort). We still don't know how to switch between dual-link and
single link so leave that part intact. I'm not sure though whether
switching between these two modes makes any sense - we always drive
the panel at its fixed mode (with a fixed bpc) anyway ...
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
parent
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@ -690,13 +690,11 @@ intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
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intel_clock_t clock;
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int err = target;
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if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) &&
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(I915_READ(LVDS)) != 0) {
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if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
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/*
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* For LVDS, if the panel is on, just rely on its current
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* settings for dual-channel. We haven't figured out how to
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* reliably set up different single/dual channel state, if we
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* even can.
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* For LVDS just rely on its current settings for dual-channel.
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* We haven't figured out how to reliably set up different
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* single/dual channel state, if we even can.
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*/
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if (is_dual_link_lvds(dev_priv, LVDS))
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clock.p2 = limit->p2.p2_fast;
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@ -766,8 +764,7 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
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lvds_reg = PCH_LVDS;
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else
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lvds_reg = LVDS;
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if ((I915_READ(lvds_reg) & LVDS_CLKB_POWER_MASK) ==
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LVDS_CLKB_POWER_UP)
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if (is_dual_link_lvds(dev_priv, lvds_reg))
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clock.p2 = limit->p2.p2_fast;
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else
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clock.p2 = limit->p2.p2_slow;
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@ -5359,7 +5356,7 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
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if (is_lvds) {
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if ((intel_panel_use_ssc(dev_priv) &&
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dev_priv->lvds_ssc_freq == 100) ||
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(I915_READ(PCH_LVDS) & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP)
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is_dual_link_lvds(dev_priv, PCH_LVDS))
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factor = 25;
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} else if (is_sdvo && is_tv)
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factor = 20;
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