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gpio: hlwd: Pass irqchip when adding gpiochip 

We need to convert all old gpio irqchips to pass the irqchip
setup along when adding the gpio_chip. For more info see
drivers/gpio/TODO.

For chained irqchips this is a pretty straight-forward
conversion.

Cc: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20190809140005.11654-1-linus.walleij@linaro.org
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Tested-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
alistair/sunxi64-5.4-dsi
Linus Walleij 2019-08-09 16:00:05 +02:00
parent c7e66e48c0
commit a2ac3eb365
1 changed files with 29 additions and 27 deletions
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56
drivers/gpio/gpio-hlwd.c
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@ -244,43 +244,45 @@ static int hlwd_gpio_probe(struct platform_device *pdev)
ngpios = 32;
hlwd->gpioc.ngpio = ngpios;
res = devm_gpiochip_add_data(&pdev->dev, &hlwd->gpioc, hlwd);
if (res)
return res;
/* Mask and ack all interrupts */
iowrite32be(0, hlwd->regs + HW_GPIOB_INTMASK);
iowrite32be(0xffffffff, hlwd->regs + HW_GPIOB_INTFLAG);
/*
* If this GPIO controller is not marked as an interrupt controller in
* the DT, return.
* the DT, skip interrupt support.
*/
if (!of_property_read_bool(pdev->dev.of_node, "interrupt-controller"))
return 0;
if (of_property_read_bool(pdev->dev.of_node, "interrupt-controller")) {
struct gpio_irq_chip *girq;
hlwd->irq = platform_get_irq(pdev, 0);
if (hlwd->irq < 0) {
dev_info(&pdev->dev, "platform_get_irq returned %d\n",
hlwd->irq);
return hlwd->irq;
hlwd->irq = platform_get_irq(pdev, 0);
if (hlwd->irq < 0) {
dev_info(&pdev->dev, "platform_get_irq returned %d\n",
hlwd->irq);
return hlwd->irq;
}
hlwd->irqc.name = dev_name(&pdev->dev);
hlwd->irqc.irq_mask = hlwd_gpio_irq_mask;
hlwd->irqc.irq_unmask = hlwd_gpio_irq_unmask;
hlwd->irqc.irq_enable = hlwd_gpio_irq_enable;
hlwd->irqc.irq_set_type = hlwd_gpio_irq_set_type;
girq = &hlwd->gpioc.irq;
girq->chip = &hlwd->irqc;
girq->parent_handler = hlwd_gpio_irqhandler;
girq->num_parents = 1;
girq->parents = devm_kcalloc(&pdev->dev, 1,
sizeof(*girq->parents),
GFP_KERNEL);
if (!girq->parents)
return -ENOMEM;
girq->parents[0] = hlwd->irq;
girq->default_type = IRQ_TYPE_NONE;
girq->handler = handle_level_irq;
}
hlwd->irqc.name = dev_name(&pdev->dev);
hlwd->irqc.irq_mask = hlwd_gpio_irq_mask;
hlwd->irqc.irq_unmask = hlwd_gpio_irq_unmask;
hlwd->irqc.irq_enable = hlwd_gpio_irq_enable;
hlwd->irqc.irq_set_type = hlwd_gpio_irq_set_type;
res = gpiochip_irqchip_add(&hlwd->gpioc, &hlwd->irqc, 0,
handle_level_irq, IRQ_TYPE_NONE);
if (res)
return res;
gpiochip_set_chained_irqchip(&hlwd->gpioc, &hlwd->irqc,
hlwd->irq, hlwd_gpio_irqhandler);
return 0;
return devm_gpiochip_add_data(&pdev->dev, &hlwd->gpioc, hlwd);
}
static const struct of_device_id hlwd_gpio_match[] = {