Merge branch 'utilities' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux
Pull power management utilities updates from Len Brown. * 'utilities' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux: intel_pstate: use updated msr-index.h HWP.EPP values tools/power x86_energy_perf_policy: support HWP.EPP x86: msr-index.h: fix shifts to ULL results in HWP macros. x86: msr-index.h: define HWP.EPP values x86: msr-index.h: define EPB mid-pointshifive-unleashed-5.1
Rafael J. Wysocki
commit
a32f80b30d
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@ -249,9 +249,13 @@
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#define HWP_MIN_PERF(x) (x & 0xff)
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#define HWP_MAX_PERF(x) ((x & 0xff) << 8)
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#define HWP_DESIRED_PERF(x) ((x & 0xff) << 16)
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#define HWP_ENERGY_PERF_PREFERENCE(x) ((x & 0xff) << 24)
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#define HWP_ACTIVITY_WINDOW(x) ((x & 0xff3) << 32)
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#define HWP_PACKAGE_CONTROL(x) ((x & 0x1) << 42)
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#define HWP_ENERGY_PERF_PREFERENCE(x) (((unsigned long long) x & 0xff) << 24)
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#define HWP_EPP_PERFORMANCE 0x00
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#define HWP_EPP_BALANCE_PERFORMANCE 0x80
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#define HWP_EPP_BALANCE_POWERSAVE 0xC0
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#define HWP_EPP_POWERSAVE 0xFF
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#define HWP_ACTIVITY_WINDOW(x) ((unsigned long long)(x & 0xff3) << 32)
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#define HWP_PACKAGE_CONTROL(x) ((unsigned long long)(x & 0x1) << 42)
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/* IA32_HWP_STATUS */
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#define HWP_GUARANTEED_CHANGE(x) (x & 0x1)
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@ -474,9 +478,11 @@
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#define MSR_MISC_PWR_MGMT 0x000001aa
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#define MSR_IA32_ENERGY_PERF_BIAS 0x000001b0
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#define ENERGY_PERF_BIAS_PERFORMANCE 0
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#define ENERGY_PERF_BIAS_NORMAL 6
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#define ENERGY_PERF_BIAS_POWERSAVE 15
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#define ENERGY_PERF_BIAS_PERFORMANCE 0
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#define ENERGY_PERF_BIAS_BALANCE_PERFORMANCE 4
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#define ENERGY_PERF_BIAS_NORMAL 6
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#define ENERGY_PERF_BIAS_BALANCE_POWERSAVE 8
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#define ENERGY_PERF_BIAS_POWERSAVE 15
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#define MSR_IA32_PACKAGE_THERM_STATUS 0x000001b1
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@ -652,6 +652,12 @@ static const char * const energy_perf_strings[] = {
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"power",
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NULL
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};
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static const unsigned int epp_values[] = {
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HWP_EPP_PERFORMANCE,
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HWP_EPP_BALANCE_PERFORMANCE,
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HWP_EPP_BALANCE_POWERSAVE,
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HWP_EPP_POWERSAVE
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};
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static int intel_pstate_get_energy_pref_index(struct cpudata *cpu_data)
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{
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@ -663,17 +669,14 @@ static int intel_pstate_get_energy_pref_index(struct cpudata *cpu_data)
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return epp;
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if (static_cpu_has(X86_FEATURE_HWP_EPP)) {
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/*
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* Range:
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* 0x00-0x3F : Performance
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* 0x40-0x7F : Balance performance
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* 0x80-0xBF : Balance power
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* 0xC0-0xFF : Power
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* The EPP is a 8 bit value, but our ranges restrict the
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* value which can be set. Here only using top two bits
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* effectively.
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*/
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index = (epp >> 6) + 1;
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if (epp == HWP_EPP_PERFORMANCE)
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return 1;
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if (epp <= HWP_EPP_BALANCE_PERFORMANCE)
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return 2;
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if (epp <= HWP_EPP_BALANCE_POWERSAVE)
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return 3;
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else
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return 4;
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} else if (static_cpu_has(X86_FEATURE_EPB)) {
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/*
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* Range:
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@ -711,15 +714,8 @@ static int intel_pstate_set_energy_pref_index(struct cpudata *cpu_data,
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value &= ~GENMASK_ULL(31, 24);
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/*
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* If epp is not default, convert from index into
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* energy_perf_strings to epp value, by shifting 6
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* bits left to use only top two bits in epp.
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* The resultant epp need to shifted by 24 bits to
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* epp position in MSR_HWP_REQUEST.
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*/
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if (epp == -EINVAL)
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epp = (pref_index - 1) << 6;
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epp = epp_values[pref_index - 1];
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value |= (u64)epp << 24;
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ret = wrmsrl_on_cpu(cpu_data->cpu, MSR_HWP_REQUEST, value);
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@ -1,10 +1,27 @@
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DESTDIR ?=
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CC = $(CROSS_COMPILE)gcc
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BUILD_OUTPUT := $(CURDIR)
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PREFIX := /usr
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DESTDIR :=
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ifeq ("$(origin O)", "command line")
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BUILD_OUTPUT := $(O)
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endif
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x86_energy_perf_policy : x86_energy_perf_policy.c
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CFLAGS += -Wall
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CFLAGS += -DMSRHEADER='"../../../../arch/x86/include/asm/msr-index.h"'
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%: %.c
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@mkdir -p $(BUILD_OUTPUT)
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$(CC) $(CFLAGS) $< -o $(BUILD_OUTPUT)/$@
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.PHONY : clean
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clean :
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rm -f x86_energy_perf_policy
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@rm -f $(BUILD_OUTPUT)/x86_energy_perf_policy
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install : x86_energy_perf_policy
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install -d $(DESTDIR)$(PREFIX)/bin
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install $(BUILD_OUTPUT)/x86_energy_perf_policy $(DESTDIR)$(PREFIX)/bin/x86_energy_perf_policy
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install -d $(DESTDIR)$(PREFIX)/share/man/man8
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install x86_energy_perf_policy.8 $(DESTDIR)$(PREFIX)/share/man/man8
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install :
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install x86_energy_perf_policy ${DESTDIR}/usr/bin/
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install x86_energy_perf_policy.8 ${DESTDIR}/usr/share/man/man8/
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@ -1,104 +1,213 @@
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.\" This page Copyright (C) 2010 Len Brown <len.brown@intel.com>
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.\" This page Copyright (C) 2010 - 2015 Len Brown <len.brown@intel.com>
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.\" Distributed under the GPL, Copyleft 1994.
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.TH X86_ENERGY_PERF_POLICY 8
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.SH NAME
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x86_energy_perf_policy \- read or write MSR_IA32_ENERGY_PERF_BIAS
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x86_energy_perf_policy \- Manage Energy vs. Performance Policy via x86 Model Specific Registers
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.SH SYNOPSIS
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.ft B
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.B x86_energy_perf_policy
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.RB [ "\-c cpu" ]
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.RB [ "\-v" ]
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.RB "\-r"
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.RB "[ options ] [ scope ] [field \ value]"
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.br
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.B x86_energy_perf_policy
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.RB [ "\-c cpu" ]
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.RB [ "\-v" ]
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.RB 'performance'
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.RB "scope: \-\-cpu\ cpu-list | \-\-pkg\ pkg-list"
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.br
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.B x86_energy_perf_policy
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.RB [ "\-c cpu" ]
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.RB [ "\-v" ]
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.RB 'normal'
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.RB "cpu-list, pkg-list: # | #,# | #-# | all"
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.br
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.B x86_energy_perf_policy
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.RB [ "\-c cpu" ]
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.RB [ "\-v" ]
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.RB 'powersave'
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.RB "field: \-\-all | \-\-epb | \-\-hwp-epp | \-\-hwp-min | \-\-hwp-max | \-\-hwp-desired"
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.br
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.B x86_energy_perf_policy
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.RB [ "\-c cpu" ]
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.RB [ "\-v" ]
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.RB n
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.RB "other: (\-\-force | \-\-hwp-enable | \-\-turbo-enable) value)"
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.br
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.RB "value: # | default | performance | balance-performance | balance-power | power"
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.SH DESCRIPTION
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\fBx86_energy_perf_policy\fP
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allows software to convey
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its policy for the relative importance of performance
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versus energy savings to the processor.
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displays and updates energy-performance policy settings specific to
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Intel Architecture Processors. Settings are accessed via Model Specific Register (MSR)
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updates, no matter if the Linux cpufreq sub-system is enabled or not.
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The processor uses this information in model-specific ways
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when it must select trade-offs between performance and
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energy efficiency.
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Policy in MSR_IA32_ENERGY_PERF_BIAS (EPB)
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may affect a wide range of hardware decisions,
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such as how aggressively the hardware enters and exits CPU idle states (C-states)
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and Processor Performance States (P-states).
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This policy hint does not replace explicit OS C-state and P-state selection.
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Rather, it tells the hardware how aggressively to implement those selections.
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Further, it allows the OS to influence energy/performance trade-offs where there
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is no software interface, such as in the opportunistic "turbo-mode" P-state range.
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Note that MSR_IA32_ENERGY_PERF_BIAS is defined per CPU,
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but some implementations
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share a single MSR among all CPUs in each processor package.
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On those systems, a write to EPB on one processor will
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be visible, and will have an effect, on all CPUs
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in the same processor package.
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This policy hint does not supersede Processor Performance states
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(P-states) or CPU Idle power states (C-states), but allows
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software to have influence where it would otherwise be unable
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to express a preference.
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Hardware P-States (HWP) are effectively an expansion of hardware
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P-state control from the opportunistic turbo-mode P-state range
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to include the entire range of available P-states.
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On Broadwell Xeon, the initial HWP implementation, EBP influenced HWP.
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That influence was removed in subsequent generations,
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where it was moved to the
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Energy_Performance_Preference (EPP) field in
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a pair of dedicated MSRs -- MSR_IA32_HWP_REQUEST and MSR_IA32_HWP_REQUEST_PKG.
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For example, this setting may tell the hardware how
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aggressively or conservatively to control frequency
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in the "turbo range" above the explicitly OS-controlled
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P-state frequency range. It may also tell the hardware
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how aggressively is should enter the OS requested C-states.
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EPP is the most commonly managed knob in HWP mode,
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but MSR_IA32_HWP_REQUEST also allows the user to specify
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minimum-frequency for Quality-of-Service,
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and maximum-frequency for power-capping.
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MSR_IA32_HWP_REQUEST is defined per-CPU.
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Support for this feature is indicated by CPUID.06H.ECX.bit3
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per the Intel Architectures Software Developer's Manual.
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MSR_IA32_HWP_REQUEST_PKG has the same capability as MSR_IA32_HWP_REQUEST,
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but it can simultaneously set the default policy for all CPUs within a package.
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A bit in per-CPU MSR_IA32_HWP_REQUEST indicates whether it is
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over-ruled-by or exempt-from MSR_IA32_HWP_REQUEST_PKG.
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.SS Options
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\fB-c\fP limits operation to a single CPU.
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The default is to operate on all CPUs.
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Note that MSR_IA32_ENERGY_PERF_BIAS is defined per
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logical processor, but that the initial implementations
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of the MSR were shared among all processors in each package.
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MSR_HWP_CAPABILITIES shows the default values for the fields
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in MSR_IA32_HWP_REQUEST. It is displayed when no values
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are being written.
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.SS SCOPE OPTIONS
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.PP
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\fB-v\fP increases verbosity. By default
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x86_energy_perf_policy is silent.
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\fB-c, --cpu\fP Operate on the MSR_IA32_HWP_REQUEST for each CPU in a CPU-list.
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The CPU-list may be comma-separated CPU numbers, with dash for range
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or the string "all". Eg. '--cpu 1,4,6-8' or '--cpu all'.
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When --cpu is used, \fB--hwp-use-pkg\fP is available, which specifies whether the per-cpu
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MSR_IA32_HWP_REQUEST should be over-ruled by MSR_IA32_HWP_REQUEST_PKG (1),
|
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or exempt from MSR_IA32_HWP_REQUEST_PKG (0).
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\fB-p, --pkg\fP Operate on the MSR_IA32_HWP_REQUEST_PKG for each package in the package-list.
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The list is a string of individual package numbers separated
|
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by commas, and or ranges of package numbers separated by a dash,
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or the string "all".
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For example '--pkg 1,3' or '--pkg all'
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.SS VALUE OPTIONS
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.PP
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\fB-r\fP is for "read-only" mode - the unchanged state
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is read and displayed.
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.PP
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.I performance
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Set a policy where performance is paramount.
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The processor will be unwilling to sacrifice any performance
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for the sake of energy saving. This is the hardware default.
|
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.PP
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.I normal
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.I normal | default
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Set a policy with a normal balance between performance and energy efficiency.
|
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The processor will tolerate minor performance compromise
|
||||
for potentially significant energy savings.
|
||||
This reasonable default for most desktops and servers.
|
||||
This is a reasonable default for most desktops and servers.
|
||||
"default" is a synonym for "normal".
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||||
.PP
|
||||
.I powersave
|
||||
.I performance
|
||||
Set a policy for maximum performance,
|
||||
accepting no performance sacrifice for the benefit of energy efficiency.
|
||||
.PP
|
||||
.I balance-performance
|
||||
Set a policy with a high priority on performance,
|
||||
but allowing some performance loss to benefit energy efficiency.
|
||||
.PP
|
||||
.I balance-power
|
||||
Set a policy where the performance and power are balanced.
|
||||
This is the default.
|
||||
.PP
|
||||
.I power
|
||||
Set a policy where the processor can accept
|
||||
a measurable performance hit to maximize energy efficiency.
|
||||
.PP
|
||||
.I n
|
||||
Set MSR_IA32_ENERGY_PERF_BIAS to the specified number.
|
||||
The range of valid numbers is 0-15, where 0 is maximum
|
||||
performance and 15 is maximum energy efficiency.
|
||||
a measurable performance impact to maximize energy efficiency.
|
||||
|
||||
.PP
|
||||
The following table shows the mapping from the value strings above to actual MSR values.
|
||||
This mapping is defined in the Linux-kernel header, msr-index.h.
|
||||
|
||||
.nf
|
||||
VALUE STRING EPB EPP
|
||||
performance 0 0
|
||||
balance-performance 4 128
|
||||
normal, default 6 128
|
||||
balance-power 8 192
|
||||
power 15 255
|
||||
.fi
|
||||
.PP
|
||||
For MSR_IA32_HWP_REQUEST performance fields
|
||||
(--hwp-min, --hwp-max, --hwp-desired), the value option
|
||||
is in units of 100 MHz, Eg. 12 signifies 1200 MHz.
|
||||
|
||||
.SS FIELD OPTIONS
|
||||
\fB-a, --all value-string\fP Sets all EPB and EPP and HWP limit fields to the value associated with
|
||||
the value-string. In addition, enables turbo-mode and HWP-mode, if they were previous disabled.
|
||||
Thus "--all normal" will set a system without cpufreq into a well known configuration.
|
||||
.PP
|
||||
\fB-B, --epb\fP set EPB per-core or per-package.
|
||||
See value strings in the table above.
|
||||
.PP
|
||||
\fB-d, --debug\fP debug increases verbosity. By default
|
||||
x86_energy_perf_policy is silent for updates,
|
||||
and verbose for read-only mode.
|
||||
.PP
|
||||
\fB-P, --hwp-epp\fP set HWP.EPP per-core or per-package.
|
||||
See value strings in the table above.
|
||||
.PP
|
||||
\fB-m, --hwp-min\fP request HWP to not go below the specified core/bus ratio.
|
||||
The "default" is the value found in IA32_HWP_CAPABILITIES.min.
|
||||
.PP
|
||||
\fB-M, --hwp-max\fP request HWP not exceed a the specified core/bus ratio.
|
||||
The "default" is the value found in IA32_HWP_CAPABILITIES.max.
|
||||
.PP
|
||||
\fB-D, --hwp-desired\fP request HWP 'desired' frequency.
|
||||
The "normal" setting is 0, which
|
||||
corresponds to 'full autonomous' HWP control.
|
||||
Non-zero performance values request a specific performance
|
||||
level on this processor, specified in multiples of 100 MHz.
|
||||
.PP
|
||||
\fB-w, --hwp-window\fP specify integer number of microsec
|
||||
in the sliding window that HWP uses to maintain average frequency.
|
||||
This parameter is meaningful only when the "desired" field above is non-zero.
|
||||
Default is 0, allowing the HW to choose.
|
||||
.SH OTHER OPTIONS
|
||||
.PP
|
||||
\fB-f, --force\fP writes the specified values without bounds checking.
|
||||
.PP
|
||||
\fB-U, --hwp-use-pkg\fP (0 | 1), when used in conjunction with --cpu,
|
||||
indicates whether the per-CPU MSR_IA32_HWP_REQUEST should be overruled (1)
|
||||
or exempt (0) from per-Package MSR_IA32_HWP_REQUEST_PKG settings.
|
||||
The default is exempt.
|
||||
.PP
|
||||
\fB-H, --hwp-enable\fP enable HardWare-P-state (HWP) mode. Once enabled, system RESET is required to disable HWP mode.
|
||||
.PP
|
||||
\fB-t, --turbo-enable\fP enable (1) or disable (0) turbo mode.
|
||||
.PP
|
||||
\fB-v, --version\fP print version and exit.
|
||||
.PP
|
||||
If no request to change policy is made,
|
||||
the default behavior is to read
|
||||
and display the current system state,
|
||||
including the default capabilities.
|
||||
.SH WARNING
|
||||
.PP
|
||||
This utility writes directly to Model Specific Registers.
|
||||
There is no locking or coordination should this utility
|
||||
be used to modify HWP limit fields at the same time that
|
||||
intel_pstate's sysfs attributes access the same MSRs.
|
||||
.PP
|
||||
Note that --hwp-desired and --hwp-window are considered experimental.
|
||||
Future versions of Linux reserve the right to access these
|
||||
fields internally -- potentially conflicting with user-space access.
|
||||
.SH EXAMPLE
|
||||
.nf
|
||||
# sudo x86_energy_perf_policy
|
||||
cpu0: EPB 6
|
||||
cpu0: HWP_REQ: min 6 max 35 des 0 epp 128 window 0x0 (0*10^0us) use_pkg 0
|
||||
cpu0: HWP_CAP: low 1 eff 8 guar 27 high 35
|
||||
cpu1: EPB 6
|
||||
cpu1: HWP_REQ: min 6 max 35 des 0 epp 128 window 0x0 (0*10^0us) use_pkg 0
|
||||
cpu1: HWP_CAP: low 1 eff 8 guar 27 high 35
|
||||
cpu2: EPB 6
|
||||
cpu2: HWP_REQ: min 6 max 35 des 0 epp 128 window 0x0 (0*10^0us) use_pkg 0
|
||||
cpu2: HWP_CAP: low 1 eff 8 guar 27 high 35
|
||||
cpu3: EPB 6
|
||||
cpu3: HWP_REQ: min 6 max 35 des 0 epp 128 window 0x0 (0*10^0us) use_pkg 0
|
||||
cpu3: HWP_CAP: low 1 eff 8 guar 27 high 35
|
||||
.fi
|
||||
.SH NOTES
|
||||
.B "x86_energy_perf_policy "
|
||||
.B "x86_energy_perf_policy"
|
||||
runs only as root.
|
||||
.SH FILES
|
||||
.ta
|
||||
.nf
|
||||
/dev/cpu/*/msr
|
||||
.fi
|
||||
|
||||
.SH "SEE ALSO"
|
||||
.nf
|
||||
msr(4)
|
||||
Intel(R) 64 and IA-32 Architectures Software Developer's Manual
|
||||
.fi
|
||||
.PP
|
||||
.SH AUTHORS
|
||||
.nf
|
||||
Written by Len Brown <len.brown@intel.com>
|
||||
Len Brown
|
||||
|
|
|
|||
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