A few more fixes for clk drivers causing regressions this release.

Two Allwinner index fixes for A31 and V3 and two Microchip AT91 fixes
 for an incorrect clk parent linkage and a miscalculated number
 of clks.
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAlxvGK8RHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSW0IBAAilBlsrkh09WTzp2hNLh1QInvAwffWAqt
 RI+mpc3gMpZ/KKv+JiRQSLbxz2u4YZiMhspYVMGhgOeEME8Tlizfasvbklt8ml+m
 DtPH5pl2457D7ySlIIgaiTYftN2181M65rP4N3OZ7PF5PI5FLZcrX2RPBsKzqbaF
 M71ThMXpYhCmPO9M7EVWCjCG3tayoDduUV3ooXtsQrVcNgxve0NHhT83+oQPdn+Z
 JLdczcC++37opfPdTwn5tWsnq/TiZMUN1dfUNh+PamBSxgOztnwKhztav8Zp5yaq
 QZzY8NKrVlTC1hyHqyqZWStEzVkjsnBWiD9fXoNmemXYXoGnyp8dHHTacGREXoPO
 GWO9xgAVpCfZ2ut5IppU6vMIuVEJeVdDWVi8V0pKFVyv0IJQ0XycIzVW2FVh1xCi
 ZtVxJyNGsp8+L3j/zX4BjTRxdHryZRRhnHQlrBM+D9UKYwrjkHMq8TkopRPm1UMG
 Y75JrtQAcYFGhM6UPnXGvNVfDzCm08kmbEbr11f46L+yH+F+uo2Esso9GT4v/VOS
 T30aCmUSszL3yL8B5fZhodM/DkvGY7qRiDzpCbpt+wGXjACc9HIdXCv/FskRq00b
 wGsxJYIieaueNhVqYEFg9Mq79uNf6BpQz63wdfkT4REatdNoilbfVEW+invPlfb5
 Z25m13/keiE=
 =KPMp
 -----END PGP SIGNATURE-----

Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk fixes from Stephen Boyd:
 "A few more fixes for clk drivers causing regressions this release.

  Two Allwinner index fixes for A31 and V3 and two Microchip AT91 fixes
  for an incorrect clk parent linkage and a miscalculated number of
  clks"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: at91: fix masterck name
  clk: at91: fix at91sam9x5 peripheral clock number
  clk: sunxi: A31: Fix wrong AHB gate number
  clk: sunxi-ng: v3s: Fix TCON reset de-assert bit
This commit is contained in:
Linus Torvalds 2019-02-22 09:20:49 -08:00
commit a3504f7a38
5 changed files with 8 additions and 9 deletions

View file

@ -144,8 +144,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
return;
at91sam9x5_pmc = pmc_data_allocate(PMC_MAIN + 1,
nck(at91sam9x5_systemck),
nck(at91sam9x35_periphck), 0);
nck(at91sam9x5_systemck), 31, 0);
if (!at91sam9x5_pmc)
return;
@ -210,7 +209,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
parent_names[1] = "mainck";
parent_names[2] = "plladivck";
parent_names[3] = "utmick";
parent_names[4] = "mck";
parent_names[4] = "masterck";
for (i = 0; i < 2; i++) {
char name[6];

View file

@ -240,7 +240,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
parent_names[1] = "mainck";
parent_names[2] = "plladivck";
parent_names[3] = "utmick";
parent_names[4] = "mck";
parent_names[4] = "masterck";
for (i = 0; i < 3; i++) {
char name[6];
@ -291,7 +291,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
parent_names[1] = "mainck";
parent_names[2] = "plladivck";
parent_names[3] = "utmick";
parent_names[4] = "mck";
parent_names[4] = "masterck";
parent_names[5] = "audiopll_pmcck";
for (i = 0; i < ARRAY_SIZE(sama5d2_gck); i++) {
hw = at91_clk_register_generated(regmap, &pmc_pcr_lock,

View file

@ -207,7 +207,7 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
parent_names[1] = "mainck";
parent_names[2] = "plladivck";
parent_names[3] = "utmick";
parent_names[4] = "mck";
parent_names[4] = "masterck";
for (i = 0; i < 3; i++) {
char name[6];

View file

@ -264,9 +264,9 @@ static SUNXI_CCU_GATE(ahb1_mmc1_clk, "ahb1-mmc1", "ahb1",
static SUNXI_CCU_GATE(ahb1_mmc2_clk, "ahb1-mmc2", "ahb1",
0x060, BIT(10), 0);
static SUNXI_CCU_GATE(ahb1_mmc3_clk, "ahb1-mmc3", "ahb1",
0x060, BIT(12), 0);
0x060, BIT(11), 0);
static SUNXI_CCU_GATE(ahb1_nand1_clk, "ahb1-nand1", "ahb1",
0x060, BIT(13), 0);
0x060, BIT(12), 0);
static SUNXI_CCU_GATE(ahb1_nand0_clk, "ahb1-nand0", "ahb1",
0x060, BIT(13), 0);
static SUNXI_CCU_GATE(ahb1_sdram_clk, "ahb1-sdram", "ahb1",

View file

@ -542,7 +542,7 @@ static struct ccu_reset_map sun8i_v3s_ccu_resets[] = {
[RST_BUS_OHCI0] = { 0x2c0, BIT(29) },
[RST_BUS_VE] = { 0x2c4, BIT(0) },
[RST_BUS_TCON0] = { 0x2c4, BIT(3) },
[RST_BUS_TCON0] = { 0x2c4, BIT(4) },
[RST_BUS_CSI] = { 0x2c4, BIT(8) },
[RST_BUS_DE] = { 0x2c4, BIT(12) },
[RST_BUS_DBG] = { 0x2c4, BIT(31) },