ARM: SoC drivers for v3.12
This branch contains ARM SoC related driver updates for v3.12. The only thing this cycle are core PM updates and CPUidle support for ARM's TC2 big.LITTLE development platform. Conflicts: One cleanup/reorg conflict with a new entry in drivers/cpuidle/Makefile. Append the new entry after the existing ones. A follow up patch for v3.12-rc will make the new entry conform to the cleanup/reorg. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJSLjatAAoJEFk3GJrT+8Zl32sP/Aw2iEXd/5DUvcp6y/qZoAjO oLhCPviEnQCpz4smFFySBLvvKyVyA7oOMet8nelIJhwHCTNMBpJZHIfcvpIP5uBY 6LLpFUw4m7TqOISwpVXlwc/3CuG76QCrITLJmButq6tHF4udHeAur+pAnNHoaoys O5arRMLvl5C4rREeiZctTv5JARICCxIcHpweQdtt+MZ03yG78fEfSB9XxvyOlhh0 OJnGcqU07fIXw9kT/9KAnR3Ql7JJsdzlXqLq6/wFWPe5a1KtgxHNXPbtWaxl8JWW cPSQci+n9iWgxKzoQTGyQO6sfkDHcol3izMeCScMwlx05SMPwofXpYitaPHLF1cy PtJosSMVQvJPrHyGlY4vhD9mtCIcyOmlwSlZ6dOf7oqXMhT9CPJe2UD/8JZWgXBi imY/vpU8mgZT315rQmc/Khg721VNKcSuIvP6xUS9PuaSMUrPSCJFbbkckHGnzdC7 XVFCui9gFxa7vMN+CzrZRqfZnjJ7ujuiFDauMzltu0iBiPNXkAfyoqbxMqUP1HJ5 pdU84vuEVjsUdWt9ivJs6I6cqIwroeji9HZzZnWkWyoDgtAjxhDFVXydqlhrZsuJ O3uErP8fjRtloFa2iLDZfawPpHDFsY4F+Nm09rZLO7RE4ELlYlQGfYEwuIh+kZ16 nLPE/V5DYrBVyNGDouKx =FvQD -----END PGP SIGNATURE----- Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver update from Kevin Hilman: "This contains the ARM SoC related driver updates for v3.12. The only thing this cycle are core PM updates and CPUidle support for ARM's TC2 big.LITTLE development platform" * tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: cpuidle: big.LITTLE: vexpress-TC2 CPU idle driver ARM: vexpress: tc2: disable GIC CPU IF in tc2_pm_suspend drivers: irq-chip: irq-gic: introduce gic_cpu_if_down()hifive-unleashed-5.1
Linus Torvalds
commit
a35c6322e5
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@ -2307,6 +2307,15 @@ F: drivers/cpufreq/arm_big_little.h
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F: drivers/cpufreq/arm_big_little.c
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F: drivers/cpufreq/arm_big_little_dt.c
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CPUIDLE DRIVER - ARM BIG LITTLE
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M: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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M: Daniel Lezcano <daniel.lezcano@linaro.org>
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L: linux-pm@vger.kernel.org
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L: linux-arm-kernel@lists.infradead.org
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T: git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git
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S: Maintained
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F: drivers/cpuidle/cpuidle-big_little.c
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CPUIDLE DRIVERS
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M: Rafael J. Wysocki <rjw@sisk.pl>
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M: Daniel Lezcano <daniel.lezcano@linaro.org>
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@ -18,6 +18,7 @@
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#include <linux/of_address.h>
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#include <linux/spinlock.h>
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#include <linux/errno.h>
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#include <linux/irqchip/arm-gic.h>
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#include <asm/mcpm.h>
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#include <asm/proc-fns.h>
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@ -230,6 +231,7 @@ static void tc2_pm_suspend(u64 residency)
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cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
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cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
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ve_spc_set_resume_addr(cluster, cpu, virt_to_phys(mcpm_entry_point));
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gic_cpu_if_down();
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tc2_pm_down(residency);
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}
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@ -27,3 +27,13 @@ config ARM_U8500_CPUIDLE
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help
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Select this to enable cpuidle for ST-E u8500 processors
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config CPU_IDLE_BIG_LITTLE
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bool "Support for ARM big.LITTLE processors"
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depends on ARCH_VEXPRESS_TC2_PM
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select ARM_CPU_SUSPEND
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select CPU_IDLE_MULTIPLE_DRIVERS
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help
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Select this option to enable CPU idle driver for big.LITTLE based
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ARM systems. Driver manages CPUs coordination through MCPM and
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define different C-states for little and big cores through the
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multiple CPU idle drivers infrastructure.
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@ -11,3 +11,4 @@ obj-$(CONFIG_ARM_HIGHBANK_CPUIDLE) += cpuidle-calxeda.o
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obj-$(CONFIG_ARM_KIRKWOOD_CPUIDLE) += cpuidle-kirkwood.o
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obj-$(CONFIG_ARM_ZYNQ_CPUIDLE) += cpuidle-zynq.o
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obj-$(CONFIG_ARM_U8500_CPUIDLE) += cpuidle-ux500.o
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obj-$(CONFIG_CPU_IDLE_BIG_LITTLE) += cpuidle-big_little.o
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@ -0,0 +1,209 @@
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/*
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* Copyright (c) 2013 ARM/Linaro
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*
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* Authors: Daniel Lezcano <daniel.lezcano@linaro.org>
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* Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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* Nicolas Pitre <nicolas.pitre@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Maintainer: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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* Maintainer: Daniel Lezcano <daniel.lezcano@linaro.org>
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*/
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#include <linux/cpuidle.h>
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#include <linux/cpu_pm.h>
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#include <linux/slab.h>
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#include <linux/of.h>
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#include <asm/cpu.h>
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#include <asm/cputype.h>
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#include <asm/cpuidle.h>
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#include <asm/mcpm.h>
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#include <asm/smp_plat.h>
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#include <asm/suspend.h>
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static int bl_enter_powerdown(struct cpuidle_device *dev,
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struct cpuidle_driver *drv, int idx);
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/*
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* NB: Owing to current menu governor behaviour big and LITTLE
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* index 1 states have to define exit_latency and target_residency for
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* cluster state since, when all CPUs in a cluster hit it, the cluster
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* can be shutdown. This means that when a single CPU enters this state
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* the exit_latency and target_residency values are somewhat overkill.
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* There is no notion of cluster states in the menu governor, so CPUs
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* have to define CPU states where possibly the cluster will be shutdown
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* depending on the state of other CPUs. idle states entry and exit happen
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* at random times; however the cluster state provides target_residency
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* values as if all CPUs in a cluster enter the state at once; this is
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* somewhat optimistic and behaviour should be fixed either in the governor
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* or in the MCPM back-ends.
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* To make this driver 100% generic the number of states and the exit_latency
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* target_residency values must be obtained from device tree bindings.
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*
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* exit_latency: refers to the TC2 vexpress test chip and depends on the
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* current cluster operating point. It is the time it takes to get the CPU
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* up and running when the CPU is powered up on cluster wake-up from shutdown.
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* Current values for big and LITTLE clusters are provided for clusters
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* running at default operating points.
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*
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* target_residency: it is the minimum amount of time the cluster has
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* to be down to break even in terms of power consumption. cluster
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* shutdown has inherent dynamic power costs (L2 writebacks to DRAM
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* being the main factor) that depend on the current operating points.
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* The current values for both clusters are provided for a CPU whose half
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* of L2 lines are dirty and require cleaning to DRAM, and takes into
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* account leakage static power values related to the vexpress TC2 testchip.
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*/
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static struct cpuidle_driver bl_idle_little_driver = {
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.name = "little_idle",
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.owner = THIS_MODULE,
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.states[0] = ARM_CPUIDLE_WFI_STATE,
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.states[1] = {
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.enter = bl_enter_powerdown,
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.exit_latency = 700,
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.target_residency = 2500,
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.flags = CPUIDLE_FLAG_TIME_VALID |
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CPUIDLE_FLAG_TIMER_STOP,
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.name = "C1",
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.desc = "ARM little-cluster power down",
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},
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.state_count = 2,
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};
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static struct cpuidle_driver bl_idle_big_driver = {
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.name = "big_idle",
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.owner = THIS_MODULE,
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.states[0] = ARM_CPUIDLE_WFI_STATE,
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.states[1] = {
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.enter = bl_enter_powerdown,
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.exit_latency = 500,
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.target_residency = 2000,
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.flags = CPUIDLE_FLAG_TIME_VALID |
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CPUIDLE_FLAG_TIMER_STOP,
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.name = "C1",
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.desc = "ARM big-cluster power down",
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},
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.state_count = 2,
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};
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/*
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* notrace prevents trace shims from getting inserted where they
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* should not. Global jumps and ldrex/strex must not be inserted
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* in power down sequences where caches and MMU may be turned off.
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*/
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static int notrace bl_powerdown_finisher(unsigned long arg)
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{
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/* MCPM works with HW CPU identifiers */
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unsigned int mpidr = read_cpuid_mpidr();
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unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
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unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
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mcpm_set_entry_vector(cpu, cluster, cpu_resume);
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/*
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* Residency value passed to mcpm_cpu_suspend back-end
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* has to be given clear semantics. Set to 0 as a
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* temporary value.
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*/
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mcpm_cpu_suspend(0);
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/* return value != 0 means failure */
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return 1;
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}
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/**
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* bl_enter_powerdown - Programs CPU to enter the specified state
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* @dev: cpuidle device
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* @drv: The target state to be programmed
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* @idx: state index
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*
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* Called from the CPUidle framework to program the device to the
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* specified target state selected by the governor.
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*/
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static int bl_enter_powerdown(struct cpuidle_device *dev,
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struct cpuidle_driver *drv, int idx)
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{
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cpu_pm_enter();
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cpu_suspend(0, bl_powerdown_finisher);
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/* signals the MCPM core that CPU is out of low power state */
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mcpm_cpu_powered_up();
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cpu_pm_exit();
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return idx;
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}
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static int __init bl_idle_driver_init(struct cpuidle_driver *drv, int cpu_id)
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{
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struct cpuinfo_arm *cpu_info;
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struct cpumask *cpumask;
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unsigned long cpuid;
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int cpu;
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cpumask = kzalloc(cpumask_size(), GFP_KERNEL);
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if (!cpumask)
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return -ENOMEM;
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for_each_possible_cpu(cpu) {
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cpu_info = &per_cpu(cpu_data, cpu);
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cpuid = is_smp() ? cpu_info->cpuid : read_cpuid_id();
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/* read cpu id part number */
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if ((cpuid & 0xFFF0) == cpu_id)
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cpumask_set_cpu(cpu, cpumask);
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}
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drv->cpumask = cpumask;
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return 0;
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}
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static int __init bl_idle_init(void)
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{
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int ret;
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/*
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* Initialize the driver just for a compliant set of machines
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*/
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if (!of_machine_is_compatible("arm,vexpress,v2p-ca15_a7"))
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return -ENODEV;
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/*
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* For now the differentiation between little and big cores
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* is based on the part number. A7 cores are considered little
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* cores, A15 are considered big cores. This distinction may
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* evolve in the future with a more generic matching approach.
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*/
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ret = bl_idle_driver_init(&bl_idle_little_driver,
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ARM_CPU_PART_CORTEX_A7);
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if (ret)
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return ret;
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ret = bl_idle_driver_init(&bl_idle_big_driver, ARM_CPU_PART_CORTEX_A15);
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if (ret)
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goto out_uninit_little;
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ret = cpuidle_register(&bl_idle_little_driver, NULL);
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if (ret)
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goto out_uninit_big;
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ret = cpuidle_register(&bl_idle_big_driver, NULL);
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if (ret)
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goto out_unregister_little;
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return 0;
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out_unregister_little:
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cpuidle_unregister(&bl_idle_little_driver);
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out_uninit_big:
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kfree(bl_idle_big_driver.cpumask);
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out_uninit_little:
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kfree(bl_idle_little_driver.cpumask);
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return ret;
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}
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device_initcall(bl_idle_init);
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@ -453,6 +453,12 @@ static void gic_cpu_init(struct gic_chip_data *gic)
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writel_relaxed(1, base + GIC_CPU_CTRL);
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}
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void gic_cpu_if_down(void)
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{
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void __iomem *cpu_base = gic_data_cpu_base(&gic_data[0]);
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writel_relaxed(0, cpu_base + GIC_CPU_CTRL);
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}
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#ifdef CONFIG_CPU_PM
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/*
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* Saves the GIC distributor registers during suspend or idle. Must be called
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@ -66,6 +66,7 @@ extern struct irq_chip gic_arch_extn;
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void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
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u32 offset, struct device_node *);
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void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
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void gic_cpu_if_down(void);
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static inline void gic_init(unsigned int nr, int start,
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void __iomem *dist , void __iomem *cpu)
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