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net: marvell: mvpp2: fix AN restart 

phylink already limits which interface modes are able to call the
MACs AN restart function, but in any case, the commentry seems
incorrect: the AN restart bit does not automatically clear when
set.  This has been found via manual setting using devmem2, and
we can observe that the AN does indeed restart and complete, yet
the AN restart bit remains set.  Explicitly clear the AN restart
bit.

Tested-by: Sven Auhagen <sven.auhagen@voleatech.de>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
hifive-unleashed-5.1
Russell King 2019-02-08 15:35:59 +00:00 committed by David S. Miller
parent 417f3d08fe
commit a465047717
1 changed files with 5 additions and 10 deletions
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15
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
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@ -4497,17 +4497,12 @@ static int mvpp2_phylink_mac_link_state(struct net_device *dev,
static void mvpp2_mac_an_restart(struct net_device *dev)
{
struct mvpp2_port *port = netdev_priv(dev);
u32 val;
u32 val = readl(port->base + MVPP2_GMAC_AUTONEG_CONFIG);
if (port->phy_interface != PHY_INTERFACE_MODE_SGMII)
return;
val = readl(port->base + MVPP2_GMAC_AUTONEG_CONFIG);
/* The RESTART_AN bit is cleared by the h/w after restarting the AN
* process.
*/
val |= MVPP2_GMAC_IN_BAND_RESTART_AN | MVPP2_GMAC_IN_BAND_AUTONEG;
writel(val, port->base + MVPP2_GMAC_AUTONEG_CONFIG);
writel(val | MVPP2_GMAC_IN_BAND_RESTART_AN,
port->base + MVPP2_GMAC_AUTONEG_CONFIG);
writel(val & ~MVPP2_GMAC_IN_BAND_RESTART_AN,
port->base + MVPP2_GMAC_AUTONEG_CONFIG);
}
static void mvpp2_xlg_config(struct mvpp2_port *port, unsigned int mode,