ARCv2: entry: rewrite to enable use of double load/stores LDD/STD
- the motivation was to be remove blatent copy-paste due to hasty support of CONFIG_ARC_IRQ_NO_AUTOSAVE support - but with refactoring we could use LDD/STD to greatly optimize the code Signed-off-by: Vineet Gupta <vgupta@synopsys.com>alistair/sunxi64-5.4-dsi
Vineet Gupta
parent
ab854bfcd3
commit
a4880801a7
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@ -46,7 +46,8 @@
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*/
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/*------------------------------------------------------------------------*/
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.macro INTERRUPT_PROLOGUE called_from
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.macro INTERRUPT_PROLOGUE
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; (A) Before jumping to Interrupt Vector, hardware micro-ops did following:
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; 1. SP auto-switched to kernel mode stack
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; 2. STATUS32.Z flag set if in U mode at time of interrupt (U:1,K:0)
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@ -57,133 +58,16 @@
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; (B) Manually saved some regs: r12,r25,r30, sp,fp,gp, ACCL pair
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#ifdef CONFIG_ARC_IRQ_NO_AUTOSAVE
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.ifnc \called_from, exception
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st.as r9, [sp, -10] ; save r9 in it's final stack slot
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sub sp, sp, 12 ; skip JLI, LDI, EI
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; carve pt_regs on stack (case #3), PC/STAT32 already on stack
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sub sp, sp, SZ_PT_REGS - 8
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PUSH lp_count
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PUSHAX lp_start
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PUSHAX lp_end
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PUSH blink
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PUSH r11
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PUSH r10
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sub sp, sp, 4 ; skip r9
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PUSH r8
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PUSH r7
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PUSH r6
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PUSH r5
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PUSH r4
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PUSH r3
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PUSH r2
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PUSH r1
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PUSH r0
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.endif
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#endif
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#ifdef CONFIG_ARC_HAS_ACCL_REGS
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PUSH r59
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PUSH r58
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#endif
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PUSH r30
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PUSH r12
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; Saving pt_regs->sp correctly requires some extra work due to the way
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; Auto stack switch works
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; - U mode: retrieve it from AUX_USER_SP
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; - K mode: add the offset from current SP where H/w starts auto push
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;
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; 1. Utilize the fact that Z bit is set if Intr taken in U mode
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; 2. Upon entry SP is always saved (for any inspection, unwinding etc),
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; but on return, restored only if U mode
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lr r9, [AUX_USER_SP] ; U mode SP
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mov.nz r9, sp
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add.nz r9, r9, SZ_PT_REGS - PT_sp - 4 ; K mode SP
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PUSH r9 ; SP (pt_regs->sp)
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PUSH fp
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PUSH gp
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#ifdef CONFIG_ARC_CURR_IN_REG
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PUSH r25 ; user_r25
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GET_CURR_TASK_ON_CPU r25
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__SAVE_REGFILE_HARD
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#else
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sub sp, sp, 4
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#endif
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.ifnc \called_from, exception
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sub sp, sp, 12 ; BTA/ECR/orig_r0 placeholder per pt_regs
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.endif
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.endm
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/*------------------------------------------------------------------------*/
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.macro INTERRUPT_EPILOGUE called_from
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; INPUT: r0 has STAT32 of calling context
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; INPUT: Z flag set if returning to K mode
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.ifnc \called_from, exception
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add sp, sp, 12 ; skip BTA/ECR/orig_r0 placeholderss
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.endif
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#ifdef CONFIG_ARC_CURR_IN_REG
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POP r25
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#else
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add sp, sp, 4
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#endif
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POP gp
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POP fp
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; Restore SP (into AUX_USER_SP) only if returning to U mode
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; - for K mode, it will be implicitly restored as stack is unwound
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; - Z flag set on K is inverse of what hardware does on interrupt entry
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; but that doesn't really matter
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bz 1f
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POPAX AUX_USER_SP
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1:
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POP r12
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POP r30
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#ifdef CONFIG_ARC_HAS_ACCL_REGS
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POP r58
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POP r59
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#endif
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#ifdef CONFIG_ARC_IRQ_NO_AUTOSAVE
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.ifnc \called_from, exception
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POP r0
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POP r1
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POP r2
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POP r3
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POP r4
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POP r5
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POP r6
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POP r7
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POP r8
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POP r9
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POP r10
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POP r11
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POP blink
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POPAX lp_end
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POPAX lp_start
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POP r9
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mov lp_count, r9
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add sp, sp, 12 ; skip JLI, LDI, EI
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ld.as r9, [sp, -10] ; reload r9 which got clobbered
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.endif
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; carve pt_regs on stack (case #4), which grew partially already
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sub sp, sp, PT_r0
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#endif
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__SAVE_REGFILE_SOFT
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.endm
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/*------------------------------------------------------------------------*/
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@ -195,81 +79,180 @@
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;
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; (B) Manually save the complete reg file below
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PUSH r9 ; freeup a register: slot of erstatus
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sub sp, sp, SZ_PT_REGS ; carve pt_regs
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PUSHAX eret
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sub sp, sp, 12 ; skip JLI, LDI, EI
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PUSH lp_count
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PUSHAX lp_start
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PUSHAX lp_end
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PUSH blink
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; _HARD saves r10 clobbered by _SOFT as scratch hence comes first
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PUSH r11
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PUSH r10
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__SAVE_REGFILE_HARD
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__SAVE_REGFILE_SOFT
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ld.as r9, [sp, 10] ; load stashed r9 (status32 stack slot)
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lr r10, [erstatus]
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st.as r10, [sp, 10] ; save status32 at it's right stack slot
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st r0, [sp] ; orig_r0
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PUSH r9
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PUSH r8
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PUSH r7
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PUSH r6
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PUSH r5
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PUSH r4
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PUSH r3
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PUSH r2
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PUSH r1
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PUSH r0
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lr r10, [eret]
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lr r11, [erstatus]
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ST2 r10, r11, PT_ret
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; -- for interrupts, regs above are auto-saved by h/w in that order --
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; Now do what ISR prologue does (manually save r12, sp, fp, gp, r25)
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lr r10, [ecr]
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lr r11, [erbta]
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ST2 r10, r11, PT_event
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mov r9, r10
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INTERRUPT_PROLOGUE exception
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PUSHAX erbta
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PUSHAX ecr ; r9 contains ECR, expected by EV_Trap
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PUSH r0 ; orig_r0
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; OUTPUT: r9 has ECR
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.endm
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/*------------------------------------------------------------------------
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* This macro saves the registers manually which would normally be autosaved
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* by hardware on taken interrupts. It is used by
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* - exception handlers (which don't have autosave)
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* - interrupt autosave disabled due to CONFIG_ARC_IRQ_NO_AUTOSAVE
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*/
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.macro __SAVE_REGFILE_HARD
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ST2 r0, r1, PT_r0
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ST2 r2, r3, PT_r2
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ST2 r4, r5, PT_r4
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ST2 r6, r7, PT_r6
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ST2 r8, r9, PT_r8
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ST2 r10, r11, PT_r10
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st blink, [sp, PT_blink]
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lr r10, [lp_end]
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lr r11, [lp_start]
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ST2 r10, r11, PT_lpe
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st lp_count, [sp, PT_lpc]
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; skip JLI, LDI, EI for now
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.endm
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/*------------------------------------------------------------------------
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* This macros saves a bunch of other registers which can't be autosaved for
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* various reasons:
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* - r12: the last caller saved scratch reg since hardware saves in pairs so r0-r11
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* - r30: free reg, used by gcc as scratch
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* - ACCL/ACCH pair when they exist
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*/
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.macro __SAVE_REGFILE_SOFT
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ST2 gp, fp, PT_r26 ; gp (r26), fp (r27)
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st r12, [sp, PT_sp + 4]
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st r30, [sp, PT_sp + 8]
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; Saving pt_regs->sp correctly requires some extra work due to the way
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; Auto stack switch works
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; - U mode: retrieve it from AUX_USER_SP
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; - K mode: add the offset from current SP where H/w starts auto push
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;
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; 1. Utilize the fact that Z bit is set if Intr taken in U mode
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; 2. Upon entry SP is always saved (for any inspection, unwinding etc),
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; but on return, restored only if U mode
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lr r10, [AUX_USER_SP] ; U mode SP
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; ISA requires ADD.nz to have same dest and src reg operands
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mov.nz r10, sp
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add.nz r10, r10, SZ_PT_REGS ; K mode SP
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st r10, [sp, PT_sp] ; SP (pt_regs->sp)
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#ifdef CONFIG_ARC_CURR_IN_REG
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st r25, [sp, PT_user_r25]
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GET_CURR_TASK_ON_CPU r25
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#endif
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#ifdef CONFIG_ARC_HAS_ACCL_REGS
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ST2 r58, r59, PT_sp + 12
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#endif
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.endm
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/*------------------------------------------------------------------------*/
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.macro __RESTORE_REGFILE_SOFT
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LD2 gp, fp, PT_r26 ; gp (r26), fp (r27)
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ld r12, [sp, PT_sp + 4]
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ld r30, [sp, PT_sp + 8]
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; Restore SP (into AUX_USER_SP) only if returning to U mode
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; - for K mode, it will be implicitly restored as stack is unwound
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; - Z flag set on K is inverse of what hardware does on interrupt entry
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; but that doesn't really matter
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bz 1f
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ld r10, [sp, PT_sp] ; SP (pt_regs->sp)
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sr r10, [AUX_USER_SP]
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1:
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#ifdef CONFIG_ARC_CURR_IN_REG
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ld r25, [sp, PT_user_r25]
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#endif
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#ifdef CONFIG_ARC_HAS_ACCL_REGS
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LD2 r58, r59, PT_sp + 12
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#endif
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.endm
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/*------------------------------------------------------------------------*/
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.macro __RESTORE_REGFILE_HARD
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ld blink, [sp, PT_blink]
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LD2 r10, r11, PT_lpe
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sr r10, [lp_end]
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sr r11, [lp_start]
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ld r10, [sp, PT_lpc] ; lp_count can't be target of LD
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mov lp_count, r10
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LD2 r0, r1, PT_r0
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LD2 r2, r3, PT_r2
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LD2 r4, r5, PT_r4
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LD2 r6, r7, PT_r6
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LD2 r8, r9, PT_r8
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LD2 r10, r11, PT_r10
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.endm
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/*------------------------------------------------------------------------*/
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.macro INTERRUPT_EPILOGUE
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; INPUT: r0 has STAT32 of calling context
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; INPUT: Z flag set if returning to K mode
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; _SOFT clobbers r10 restored by _HARD hence the order
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__RESTORE_REGFILE_SOFT
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#ifdef CONFIG_ARC_IRQ_NO_AUTOSAVE
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__RESTORE_REGFILE_HARD
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add sp, sp, SZ_PT_REGS - 8
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#else
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add sp, sp, PT_r0
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#endif
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.endm
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/*------------------------------------------------------------------------*/
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.macro EXCEPTION_EPILOGUE
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; INPUT: r0 has STAT32 of calling context
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btst r0, STATUS_U_BIT ; Z flag set if K, used in INTERRUPT_EPILOGUE
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add sp, sp, 8 ; orig_r0/ECR don't need restoring
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POPAX erbta
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btst r0, STATUS_U_BIT ; Z flag set if K, used in restoring SP
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INTERRUPT_EPILOGUE exception
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ld r10, [sp, PT_event + 4]
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sr r10, [erbta]
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POP r0
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POP r1
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POP r2
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POP r3
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POP r4
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POP r5
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POP r6
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POP r7
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POP r8
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POP r9
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POP r10
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POP r11
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LD2 r10, r11, PT_ret
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sr r10, [eret]
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sr r11, [erstatus]
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POP blink
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POPAX lp_end
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POPAX lp_start
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__RESTORE_REGFILE_SOFT
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__RESTORE_REGFILE_HARD
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POP r9
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mov lp_count, r9
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add sp, sp, 12 ; skip JLI, LDI, EI
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POPAX eret
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POPAX erstatus
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ld.as r9, [sp, -12] ; reload r9 which got clobbered
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add sp, sp, SZ_PT_REGS
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.endm
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.macro FAKE_RET_FROM_EXCPN
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@ -10,6 +10,24 @@
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#ifdef __ASSEMBLY__
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.macro ST2 e, o, off
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#ifdef CONFIG_ARC_HAS_LL64
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std \e, [sp, \off]
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#else
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st \e, [sp, \off]
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st \o, [sp, \off+4]
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#endif
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.endm
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.macro LD2 e, o, off
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#ifdef CONFIG_ARC_HAS_LL64
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ldd \e, [sp, \off]
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#else
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ld \e, [sp, \off]
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ld \o, [sp, \off+4]
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#endif
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.endm
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#define ASM_NL ` /* use '`' to mark new line in macro */
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/* annotation for data we want in DCCM - if enabled in .config */
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@ -55,7 +55,14 @@ int main(void)
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DEFINE(PT_r5, offsetof(struct pt_regs, r5));
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DEFINE(PT_r6, offsetof(struct pt_regs, r6));
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DEFINE(PT_r7, offsetof(struct pt_regs, r7));
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DEFINE(PT_r8, offsetof(struct pt_regs, r8));
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DEFINE(PT_r10, offsetof(struct pt_regs, r10));
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DEFINE(PT_r26, offsetof(struct pt_regs, r26));
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DEFINE(PT_ret, offsetof(struct pt_regs, ret));
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DEFINE(PT_blink, offsetof(struct pt_regs, blink));
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DEFINE(PT_lpe, offsetof(struct pt_regs, lp_end));
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DEFINE(PT_lpc, offsetof(struct pt_regs, lp_count));
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DEFINE(PT_user_r25, offsetof(struct pt_regs, user_r25));
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DEFINE(SZ_CALLEE_REGS, sizeof(struct callee_regs));
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DEFINE(SZ_PT_REGS, sizeof(struct pt_regs));
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@ -67,7 +67,7 @@ reserved:
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ENTRY(handle_interrupt)
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INTERRUPT_PROLOGUE irq
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INTERRUPT_PROLOGUE
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# irq control APIs local_irq_save/restore/disable/enable fiddle with
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# global interrupt enable bits in STATUS32 (.IE for 1 prio, .E[] for 2 prio)
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@ -223,7 +223,7 @@ debug_marker_l1:
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bset.nz r11, r11, AUX_IRQ_ACT_BIT_U ; NZ means U
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sr r11, [AUX_IRQ_ACT]
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INTERRUPT_EPILOGUE irq
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INTERRUPT_EPILOGUE
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rtie
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;####### Return from Exception / pure kernel mode #######
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