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drm/amd/display: Tidy up dce120_timing_generator_enable_advanced_request()

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Simplify the function by removing identical looking code blocks.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Tom St Denis 2017-05-16 10:22:00 -04:00 committed by Alex Deucher
parent 0a5c357a85
commit a4b0a5b848
1 changed files with 12 additions and 25 deletions
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37
drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
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@ -669,36 +669,23 @@ void dce120_timing_generator_enable_advanced_request(
mmCRTC0_CRTC_START_LINE_CONTROL,
tg110->offsets.crtc);
if (enable) {
set_reg_field_value(
value,
0,
CRTC0_CRTC_START_LINE_CONTROL,
CRTC_LEGACY_REQUESTOR_EN);
} else {
set_reg_field_value(
value,
1,
CRTC0_CRTC_START_LINE_CONTROL,
CRTC_LEGACY_REQUESTOR_EN);
}
set_reg_field_value(
value,
enable ? 0 : 1,
CRTC0_CRTC_START_LINE_CONTROL,
CRTC_LEGACY_REQUESTOR_EN);
/* Program advanced line position acc.to the best case from fetching data perspective to hide MC latency
* and prefilling Line Buffer in V Blank (to 10 lines as LB can store max 10 lines)
*/
if (v_sync_width_and_b_porch > 10)
set_reg_field_value(
value,
10,
CRTC0_CRTC_START_LINE_CONTROL,
CRTC_ADVANCED_START_LINE_POSITION);
else
set_reg_field_value(
value,
v_sync_width_and_b_porch,
CRTC0_CRTC_START_LINE_CONTROL,
CRTC_ADVANCED_START_LINE_POSITION);
v_sync_width_and_b_porch = 10;
set_reg_field_value(
value,
v_sync_width_and_b_porch,
CRTC0_CRTC_START_LINE_CONTROL,
CRTC_ADVANCED_START_LINE_POSITION);
dm_write_reg_soc15(tg->ctx,
mmCRTC0_CRTC_START_LINE_CONTROL,