ASoC: samsung: add support for exynos7 I2S controller
Exynos7 I2S controller has no internal dma, supports more no. of root clock sampling frequencies and has more no.of Rx fifos to support 7.1CH recording in TDM mode. Due to more no. of root clock frequency values some of the bit offsets got shifted up by one. Also I2S1 on previous Samsung platforms uses v3 dai type but on Exynos7 it is upgraded to v5 with slightly modified register offsets for supporting more no.of RFS values. Due to the above changes, the driver has to be modified to handle all versions of I2S controller. For this I introduced a new structure to hold modified bit offsets and masks which is passed as dai data. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Padmavathi Venna
Mark Brown
parent
b075973670
commit
a5a56871f8
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@ -6,10 +6,17 @@ Required SoC Specific Properties:
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- samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
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- samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with
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secondary fifo, s/w reset control and internal mux for root clk src.
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- samsung,exynos5420-i2s: for 8/16/24bit multichannel(7.1) I2S with
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secondary fifo, s/w reset control, internal mux for root clk src and
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TDM support. TDM (Time division multiplexing) is to allow transfer of
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multiple channel audio data on single data line.
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- samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S for
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playback, sterio channel capture, secondary fifo using internal
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or external dma, s/w reset control, internal mux for root clk src
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and 7.1 channel TDM support for playback. TDM (Time division multiplexing)
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is to allow transfer of multiple channel audio data on single data line.
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- samsung,exynos7-i2s: with all the available features of exynos5 i2s,
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exynos7 I2S has 7.1 channel TDM support for capture, secondary fifo
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with only external dma and more no.of root clk sampling frequencies.
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- samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports
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stereo channels. exynos7 i2s1 upgraded to 5.1 multichannel with
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slightly modified bit offsets.
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- reg: physical base address of the controller and length of memory mapped
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region.
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@ -1,6 +1,6 @@
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config SND_SOC_SAMSUNG
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tristate "ASoC support for Samsung"
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depends on PLAT_SAMSUNG
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depends on (PLAT_SAMSUNG || ARCH_EXYNOS)
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depends on S3C64XX_PL080 || !ARCH_S3C64XX
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depends on S3C24XX_DMAC || !ARCH_S3C24XX
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select SND_SOC_GENERIC_DMAENGINE_PCM
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@ -33,8 +33,9 @@
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#define I2SLVL3ADDR 0x3c
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#define I2SSTR1 0x40
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#define I2SVER 0x44
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#define I2SFIC2 0x48
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#define I2SFIC1 0x48
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#define I2STDM 0x4c
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#define I2SFSTA 0x50
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#define CON_RSTCLR (1 << 31)
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#define CON_FRXOFSTATUS (1 << 26)
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@ -93,8 +94,6 @@
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#define MOD_BLC_24BIT (2 << 13)
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#define MOD_BLC_MASK (3 << 13)
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#define MOD_IMS_SYSMUX (1 << 10)
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#define MOD_SLAVE (1 << 11)
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#define MOD_TXONLY (0 << 8)
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#define MOD_RXONLY (1 << 8)
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#define MOD_TXRX (2 << 8)
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@ -132,7 +131,10 @@
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#define EXYNOS5420_MOD_BCLK_256FS 8
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#define EXYNOS5420_MOD_BCLK_MASK 0xf
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#define MOD_CDCLKCON (1 << 12)
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#define EXYNOS7_MOD_RCLK_64FS 4
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#define EXYNOS7_MOD_RCLK_128FS 5
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#define EXYNOS7_MOD_RCLK_96FS 6
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#define EXYNOS7_MOD_RCLK_192FS 7
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#define PSR_PSREN (1 << 15)
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@ -36,9 +36,24 @@ enum samsung_dai_type {
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TYPE_SEC,
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};
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struct samsung_i2s_variant_regs {
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unsigned int bfs_off;
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unsigned int rfs_off;
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unsigned int sdf_off;
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unsigned int txr_off;
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unsigned int rclksrc_off;
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unsigned int mss_off;
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unsigned int cdclkcon_off;
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unsigned int lrp_off;
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unsigned int bfs_mask;
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unsigned int rfs_mask;
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unsigned int ftx0cnt_off;
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};
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struct samsung_i2s_dai_data {
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int dai_type;
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u32 quirks;
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const struct samsung_i2s_variant_regs *i2s_variant_regs;
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};
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struct i2s_dai {
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@ -81,6 +96,7 @@ struct i2s_dai {
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u32 suspend_i2scon;
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u32 suspend_i2spsr;
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unsigned long gpios[7]; /* i2s gpio line numbers */
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const struct samsung_i2s_variant_regs *variant_regs;
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};
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/* Lock for cross i/f checks */
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@ -95,7 +111,8 @@ static inline bool is_secondary(struct i2s_dai *i2s)
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/* If operating in SoC-Slave mode */
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static inline bool is_slave(struct i2s_dai *i2s)
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{
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return (readl(i2s->addr + I2SMOD) & MOD_SLAVE) ? true : false;
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u32 mod = readl(i2s->addr + I2SMOD);
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return (mod & (1 << i2s->variant_regs->mss_off)) ? true : false;
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}
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/* If this interface of the controller is transmitting data */
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@ -200,14 +217,14 @@ static inline bool is_manager(struct i2s_dai *i2s)
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static inline unsigned get_rfs(struct i2s_dai *i2s)
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{
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u32 rfs;
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if (i2s->quirks & QUIRK_SUPPORTS_TDM)
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rfs = readl(i2s->addr + I2SMOD) >> EXYNOS5420_MOD_RCLK_SHIFT;
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else
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rfs = (readl(i2s->addr + I2SMOD) >> MOD_RCLK_SHIFT);
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rfs &= MOD_RCLK_MASK;
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rfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->rfs_off;
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rfs &= i2s->variant_regs->rfs_mask;
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switch (rfs) {
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case 7: return 192;
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case 6: return 96;
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case 5: return 128;
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case 4: return 64;
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case 3: return 768;
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case 2: return 384;
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case 1: return 512;
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@ -219,15 +236,23 @@ static inline unsigned get_rfs(struct i2s_dai *i2s)
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static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
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{
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u32 mod = readl(i2s->addr + I2SMOD);
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int rfs_shift;
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int rfs_shift = i2s->variant_regs->rfs_off;
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if (i2s->quirks & QUIRK_SUPPORTS_TDM)
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rfs_shift = EXYNOS5420_MOD_RCLK_SHIFT;
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else
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rfs_shift = MOD_RCLK_SHIFT;
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mod &= ~(MOD_RCLK_MASK << rfs_shift);
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mod &= ~(i2s->variant_regs->rfs_mask << rfs_shift);
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switch (rfs) {
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case 192:
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mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift);
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break;
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case 96:
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mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift);
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break;
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case 128:
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mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift);
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break;
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case 64:
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mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift);
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break;
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case 768:
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mod |= (MOD_RCLK_768FS << rfs_shift);
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break;
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@ -249,14 +274,8 @@ static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
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static inline unsigned get_bfs(struct i2s_dai *i2s)
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{
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u32 bfs;
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if (i2s->quirks & QUIRK_SUPPORTS_TDM) {
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bfs = readl(i2s->addr + I2SMOD) >> EXYNOS5420_MOD_BCLK_SHIFT;
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bfs &= EXYNOS5420_MOD_BCLK_MASK;
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} else {
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bfs = readl(i2s->addr + I2SMOD) >> MOD_BCLK_SHIFT;
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bfs &= MOD_BCLK_MASK;
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}
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bfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->bfs_off;
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bfs &= i2s->variant_regs->bfs_mask;
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switch (bfs) {
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case 8: return 256;
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@ -275,16 +294,8 @@ static inline unsigned get_bfs(struct i2s_dai *i2s)
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static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
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{
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u32 mod = readl(i2s->addr + I2SMOD);
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int bfs_shift;
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int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM;
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if (i2s->quirks & QUIRK_SUPPORTS_TDM) {
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bfs_shift = EXYNOS5420_MOD_BCLK_SHIFT;
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mod &= ~(EXYNOS5420_MOD_BCLK_MASK << bfs_shift);
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} else {
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bfs_shift = MOD_BCLK_SHIFT;
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mod &= ~(MOD_BCLK_MASK << bfs_shift);
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}
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int bfs_shift = i2s->variant_regs->bfs_off;
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/* Non-TDM I2S controllers do not support BCLK > 48 * FS */
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if (!tdm && bfs > 48) {
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@ -292,6 +303,8 @@ static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
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return;
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}
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mod &= ~(i2s->variant_regs->bfs_mask << bfs_shift);
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switch (bfs) {
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case 48:
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mod |= (MOD_BCLK_48FS << bfs_shift);
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@ -346,8 +359,9 @@ static inline int get_blc(struct i2s_dai *i2s)
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static void i2s_txctrl(struct i2s_dai *i2s, int on)
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{
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void __iomem *addr = i2s->addr;
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int txr_off = i2s->variant_regs->txr_off;
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u32 con = readl(addr + I2SCON);
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u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
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u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
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if (on) {
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con |= CON_ACTIVE;
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@ -362,9 +376,9 @@ static void i2s_txctrl(struct i2s_dai *i2s, int on)
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}
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if (any_rx_active(i2s))
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mod |= MOD_TXRX;
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mod |= 2 << txr_off;
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else
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mod |= MOD_TXONLY;
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mod |= 0 << txr_off;
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} else {
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if (is_secondary(i2s)) {
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con |= CON_TXSDMA_PAUSE;
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@ -382,7 +396,7 @@ static void i2s_txctrl(struct i2s_dai *i2s, int on)
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con |= CON_TXCH_PAUSE;
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if (any_rx_active(i2s))
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mod |= MOD_RXONLY;
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mod |= 1 << txr_off;
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else
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con &= ~CON_ACTIVE;
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}
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@ -395,23 +409,24 @@ static void i2s_txctrl(struct i2s_dai *i2s, int on)
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static void i2s_rxctrl(struct i2s_dai *i2s, int on)
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{
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void __iomem *addr = i2s->addr;
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int txr_off = i2s->variant_regs->txr_off;
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u32 con = readl(addr + I2SCON);
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u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
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u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
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if (on) {
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con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
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con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
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if (any_tx_active(i2s))
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mod |= MOD_TXRX;
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mod |= 2 << txr_off;
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else
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mod |= MOD_RXONLY;
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mod |= 1 << txr_off;
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} else {
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con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
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con &= ~CON_RXDMA_ACTIVE;
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if (any_tx_active(i2s))
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mod |= MOD_TXONLY;
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mod |= 0 << txr_off;
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else
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con &= ~CON_ACTIVE;
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}
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@ -451,6 +466,9 @@ static int i2s_set_sysclk(struct snd_soc_dai *dai,
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struct i2s_dai *i2s = to_info(dai);
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struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
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u32 mod = readl(i2s->addr + I2SMOD);
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const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
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unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
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unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
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switch (clk_id) {
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case SAMSUNG_I2S_OPCLK:
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@ -465,18 +483,18 @@ static int i2s_set_sysclk(struct snd_soc_dai *dai,
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if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
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(any_active(i2s) &&
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(((dir == SND_SOC_CLOCK_IN)
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&& !(mod & MOD_CDCLKCON)) ||
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&& !(mod & cdcon_mask)) ||
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((dir == SND_SOC_CLOCK_OUT)
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&& (mod & MOD_CDCLKCON))))) {
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&& (mod & cdcon_mask))))) {
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dev_err(&i2s->pdev->dev,
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"%s:%d Other DAI busy\n", __func__, __LINE__);
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return -EAGAIN;
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}
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if (dir == SND_SOC_CLOCK_IN)
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mod |= MOD_CDCLKCON;
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mod |= 1 << i2s_regs->cdclkcon_off;
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else
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mod &= ~MOD_CDCLKCON;
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mod &= 0 << i2s_regs->cdclkcon_off;
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i2s->rfs = rfs;
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break;
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@ -491,8 +509,8 @@ static int i2s_set_sysclk(struct snd_soc_dai *dai,
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if (!any_active(i2s)) {
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if (i2s->op_clk && !IS_ERR(i2s->op_clk)) {
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if ((clk_id && !(mod & MOD_IMS_SYSMUX)) ||
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(!clk_id && (mod & MOD_IMS_SYSMUX))) {
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if ((clk_id && !(mod & rsrc_mask)) ||
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(!clk_id && (mod & rsrc_mask))) {
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clk_disable_unprepare(i2s->op_clk);
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clk_put(i2s->op_clk);
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} else {
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@ -520,8 +538,8 @@ static int i2s_set_sysclk(struct snd_soc_dai *dai,
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other->op_clk = i2s->op_clk;
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other->rclk_srcrate = i2s->rclk_srcrate;
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}
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} else if ((!clk_id && (mod & MOD_IMS_SYSMUX))
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|| (clk_id && !(mod & MOD_IMS_SYSMUX))) {
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} else if ((!clk_id && (mod & rsrc_mask))
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|| (clk_id && !(mod & rsrc_mask))) {
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dev_err(&i2s->pdev->dev,
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"%s:%d Other DAI busy\n", __func__, __LINE__);
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return -EAGAIN;
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@ -533,10 +551,9 @@ static int i2s_set_sysclk(struct snd_soc_dai *dai,
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}
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if (clk_id == 0)
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mod &= ~MOD_IMS_SYSMUX;
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mod &= 0 << i2s_regs->rclksrc_off;
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else
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mod |= MOD_IMS_SYSMUX;
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break;
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mod |= 1 << i2s_regs->rclksrc_off;
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default:
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dev_err(&i2s->pdev->dev, "We don't serve that!\n");
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@ -553,16 +570,12 @@ static int i2s_set_fmt(struct snd_soc_dai *dai,
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{
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struct i2s_dai *i2s = to_info(dai);
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u32 mod = readl(i2s->addr + I2SMOD);
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int lrp_shift, sdf_shift, sdf_mask, lrp_rlow;
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int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
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u32 tmp = 0;
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if (i2s->quirks & QUIRK_SUPPORTS_TDM) {
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lrp_shift = EXYNOS5420_MOD_LRP_SHIFT;
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sdf_shift = EXYNOS5420_MOD_SDF_SHIFT;
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} else {
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lrp_shift = MOD_LRP_SHIFT;
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sdf_shift = MOD_SDF_SHIFT;
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}
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lrp_shift = i2s->variant_regs->lrp_off;
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sdf_shift = i2s->variant_regs->sdf_off;
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mod_slave = 1 << i2s->variant_regs->mss_off;
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sdf_mask = MOD_SDF_MASK << sdf_shift;
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lrp_rlow = MOD_LR_RLOW << lrp_shift;
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@ -605,7 +618,7 @@ static int i2s_set_fmt(struct snd_soc_dai *dai,
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBM_CFM:
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tmp |= MOD_SLAVE;
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tmp |= mod_slave;
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break;
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case SND_SOC_DAIFMT_CBS_CFS:
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/* Set default source clock in Master mode */
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@ -623,13 +636,13 @@ static int i2s_set_fmt(struct snd_soc_dai *dai,
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* channel.
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*/
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if (any_active(i2s) &&
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((mod & (sdf_mask | lrp_rlow | MOD_SLAVE)) != tmp)) {
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((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
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dev_err(&i2s->pdev->dev,
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"%s:%d Other DAI busy\n", __func__, __LINE__);
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return -EAGAIN;
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}
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mod &= ~(sdf_mask | lrp_rlow | MOD_SLAVE);
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mod &= ~(sdf_mask | lrp_rlow | mod_slave);
|
||||
mod |= tmp;
|
||||
writel(mod, i2s->addr + I2SMOD);
|
||||
|
||||
|
|
@ -751,6 +764,7 @@ static void i2s_shutdown(struct snd_pcm_substream *substream,
|
|||
struct i2s_dai *i2s = to_info(dai);
|
||||
struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
|
||||
unsigned long flags;
|
||||
const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
|
||||
|
||||
spin_lock_irqsave(&lock, flags);
|
||||
|
||||
|
|
@ -761,7 +775,7 @@ static void i2s_shutdown(struct snd_pcm_substream *substream,
|
|||
other->mode |= DAI_MANAGER;
|
||||
} else {
|
||||
u32 mod = readl(i2s->addr + I2SMOD);
|
||||
i2s->cdclk_out = !(mod & MOD_CDCLKCON);
|
||||
i2s->cdclk_out = !(mod & (1 << i2s_regs->cdclkcon_off));
|
||||
if (other)
|
||||
other->cdclk_out = i2s->cdclk_out;
|
||||
}
|
||||
|
|
@ -914,13 +928,14 @@ i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
|
|||
struct i2s_dai *i2s = to_info(dai);
|
||||
u32 reg = readl(i2s->addr + I2SFIC);
|
||||
snd_pcm_sframes_t delay;
|
||||
const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
|
||||
|
||||
if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
|
||||
delay = FIC_RXCOUNT(reg);
|
||||
else if (is_secondary(i2s))
|
||||
delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
|
||||
else
|
||||
delay = FIC_TXCOUNT(reg);
|
||||
delay = (reg >> i2s_regs->ftx0cnt_off) & 0x7f;
|
||||
|
||||
return delay;
|
||||
}
|
||||
|
|
@ -1227,6 +1242,7 @@ static int samsung_i2s_probe(struct platform_device *pdev)
|
|||
pri_dai->dma_capture.dma_size = 4;
|
||||
pri_dai->base = regs_base;
|
||||
pri_dai->quirks = quirks;
|
||||
pri_dai->variant_regs = i2s_dai_data->i2s_variant_regs;
|
||||
|
||||
if (quirks & QUIRK_PRI_6CHAN)
|
||||
pri_dai->i2s_dai_drv.playback.channels_max = 6;
|
||||
|
|
@ -1301,21 +1317,93 @@ static int samsung_i2s_remove(struct platform_device *pdev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static const struct samsung_i2s_variant_regs i2sv3_regs = {
|
||||
.bfs_off = 1,
|
||||
.rfs_off = 3,
|
||||
.sdf_off = 5,
|
||||
.txr_off = 8,
|
||||
.rclksrc_off = 10,
|
||||
.mss_off = 11,
|
||||
.cdclkcon_off = 12,
|
||||
.lrp_off = 7,
|
||||
.bfs_mask = 0x3,
|
||||
.rfs_mask = 0x3,
|
||||
.ftx0cnt_off = 8,
|
||||
};
|
||||
|
||||
static const struct samsung_i2s_variant_regs i2sv6_regs = {
|
||||
.bfs_off = 0,
|
||||
.rfs_off = 4,
|
||||
.sdf_off = 6,
|
||||
.txr_off = 8,
|
||||
.rclksrc_off = 10,
|
||||
.mss_off = 11,
|
||||
.cdclkcon_off = 12,
|
||||
.lrp_off = 15,
|
||||
.bfs_mask = 0xf,
|
||||
.rfs_mask = 0x3,
|
||||
.ftx0cnt_off = 8,
|
||||
};
|
||||
|
||||
static const struct samsung_i2s_variant_regs i2sv7_regs = {
|
||||
.bfs_off = 0,
|
||||
.rfs_off = 4,
|
||||
.sdf_off = 7,
|
||||
.txr_off = 9,
|
||||
.rclksrc_off = 11,
|
||||
.mss_off = 12,
|
||||
.cdclkcon_off = 22,
|
||||
.lrp_off = 15,
|
||||
.bfs_mask = 0xf,
|
||||
.rfs_mask = 0x7,
|
||||
.ftx0cnt_off = 0,
|
||||
};
|
||||
|
||||
static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = {
|
||||
.bfs_off = 0,
|
||||
.rfs_off = 3,
|
||||
.sdf_off = 6,
|
||||
.txr_off = 8,
|
||||
.rclksrc_off = 10,
|
||||
.mss_off = 11,
|
||||
.cdclkcon_off = 12,
|
||||
.lrp_off = 15,
|
||||
.bfs_mask = 0x7,
|
||||
.rfs_mask = 0x7,
|
||||
.ftx0cnt_off = 8,
|
||||
};
|
||||
|
||||
static const struct samsung_i2s_dai_data i2sv3_dai_type = {
|
||||
.dai_type = TYPE_PRI,
|
||||
.quirks = QUIRK_NO_MUXPSR,
|
||||
.i2s_variant_regs = &i2sv3_regs,
|
||||
};
|
||||
|
||||
static const struct samsung_i2s_dai_data i2sv5_dai_type = {
|
||||
.dai_type = TYPE_PRI,
|
||||
.quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
|
||||
QUIRK_SUPPORTS_IDMA,
|
||||
.i2s_variant_regs = &i2sv3_regs,
|
||||
};
|
||||
|
||||
static const struct samsung_i2s_dai_data i2sv6_dai_type = {
|
||||
.dai_type = TYPE_PRI,
|
||||
.quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
|
||||
QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA,
|
||||
.i2s_variant_regs = &i2sv6_regs,
|
||||
};
|
||||
|
||||
static const struct samsung_i2s_dai_data i2sv7_dai_type = {
|
||||
.dai_type = TYPE_PRI,
|
||||
.quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
|
||||
QUIRK_SUPPORTS_TDM,
|
||||
.i2s_variant_regs = &i2sv7_regs,
|
||||
};
|
||||
|
||||
static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = {
|
||||
.dai_type = TYPE_PRI,
|
||||
.quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR,
|
||||
.i2s_variant_regs = &i2sv5_i2s1_regs,
|
||||
};
|
||||
|
||||
static const struct samsung_i2s_dai_data samsung_dai_type_pri = {
|
||||
|
|
@ -1349,6 +1437,12 @@ static const struct of_device_id exynos_i2s_match[] = {
|
|||
}, {
|
||||
.compatible = "samsung,exynos5420-i2s",
|
||||
.data = &i2sv6_dai_type,
|
||||
}, {
|
||||
.compatible = "samsung,exynos7-i2s",
|
||||
.data = &i2sv7_dai_type,
|
||||
}, {
|
||||
.compatible = "samsung,exynos7-i2s1",
|
||||
.data = &i2sv5_dai_type_i2s1,
|
||||
},
|
||||
{},
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in a new issue