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mmc: sdhci-of-esdhc: limit SD clock for ls1012a/ls1046a 

The ls1046a datasheet specified that the max SD clock frequency
for eSDHC SDR104/HS200 was 167MHz, and the ls1012a datasheet
specified it's 125MHz for ls1012a. So this patch is to add the
limitation.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
hifive-unleashed-5.1
yangbo lu 2017-04-20 14:58:29 +08:00 committed by Ulf Hansson
parent e145ac451e
commit a627f025eb
1 changed files with 14 additions and 0 deletions
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14
drivers/mmc/host/sdhci-of-esdhc.c
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@ -457,6 +457,20 @@ static void esdhc_of_set_clock(struct sdhci_host *host, unsigned int clock)
if (esdhc->vendor_ver < VENDOR_V_23)
pre_div = 2;
/*
* Limit SD clock to 167MHz for ls1046a according to its datasheet
*/
if (clock > 167000000 &&
of_find_compatible_node(NULL, NULL, "fsl,ls1046a-esdhc"))
clock = 167000000;
/*
* Limit SD clock to 125MHz for ls1012a according to its datasheet
*/
if (clock > 125000000 &&
of_find_compatible_node(NULL, NULL, "fsl,ls1012a-esdhc"))
clock = 125000000;
/* Workaround to reduce the clock frequency for p1010 esdhc */
if (of_find_compatible_node(NULL, NULL, "fsl,p1010-esdhc")) {
if (clock > 20000000)