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pinctrl: SPEAr3xx: correct register space to configure pwm 

To have pwm on pad no. 34 we also need to select between pwm and SD_LED
functions. Add this to pwm pin mux register configuration.

Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
hifive-unleashed-5.1
Shiraz Hashim 2012-10-27 14:47:47 +05:30 committed by Linus Walleij
parent 0b53fa3535
commit a778005589
2 changed files with 5 additions and 0 deletions
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4
drivers/pinctrl/spear/pinctrl-spear320.c
View File

@ -2239,6 +2239,10 @@ static struct spear_muxreg pwm2_pin_34_muxreg[] = {
.reg = PMX_CONFIG_REG,
.mask = PMX_SSP_CS_MASK,
.val = 0,
}, {
.reg = MODE_CONFIG_REG,
.mask = PMX_PWM_MASK,
.val = PMX_PWM_MASK,
}, {
.reg = IP_SEL_PAD_30_39_REG,
.mask = PMX_PL_34_MASK,

1
drivers/pinctrl/spear/pinctrl-spear3xx.h
View File

@ -15,6 +15,7 @@
#include "pinctrl-spear.h"
/* pad mux declarations */
#define PMX_PWM_MASK (1 << 16)
#define PMX_FIRDA_MASK (1 << 14)
#define PMX_I2C_MASK (1 << 13)
#define PMX_SSP_CS_MASK (1 << 12)