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e1000: Flush shadow RAM 

Flush shadow RAM to save updates to ASF related bits for 82573 controllers.
These bits are past the first 63 words of NVM.

Signed-off-by: Mallikarjuna R Chilakala <mallikarjuna.chilakala@intel.com>
Signed-off-by: Ganesh Venkatesan <ganesh.venkatesan@intel.com>
Signed-off-by: John Ronciak <john.ronciak@intel.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
hifive-unleashed-5.1
Mallikarjuna R Chilakala 2005-10-04 07:08:19 -04:00 committed by Jeff Garzik
parent 352c9f854c
commit a7990ba60a
2 changed files with 5 additions and 2 deletions
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6
drivers/net/e1000/e1000_ethtool.c
View File

@ -547,8 +547,10 @@ e1000_set_eeprom(struct net_device *netdev,
ret_val = e1000_write_eeprom(hw, first_word,
last_word - first_word + 1, eeprom_buff);
/* Update the checksum over the first part of the EEPROM if needed */
if((ret_val == 0) && first_word <= EEPROM_CHECKSUM_REG)
/* Update the checksum over the first part of the EEPROM if needed
* and flush shadow RAM for 82573 conrollers */
if((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
(hw->mac_type == e1000_82573)))
e1000_update_eeprom_checksum(hw);
kfree(eeprom_buff);

1
drivers/net/e1000/e1000_hw.c
View File

@ -717,6 +717,7 @@ e1000_init_hw(struct e1000_hw *hw)
default:
break;
case e1000_82571:
case e1000_82572:
ctrl = E1000_READ_REG(hw, TXDCTL1);
ctrl &= ~E1000_TXDCTL_WTHRESH;
ctrl |= E1000_TXDCTL_COUNT_DESC | E1000_TXDCTL_FULL_TX_DESC_WB;