Merge branch 'control_mcbsp_fix_2.6.37' of git://git.pwsan.com/linux-2.6 into omap-for-linus
This commit is contained in:
commit
a7c8875100
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@ -100,20 +100,20 @@ config MACH_OMAP2_TUSB6010
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config MACH_OMAP_H4
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bool "OMAP 2420 H4 board"
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depends on ARCH_OMAP2
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depends on ARCH_OMAP2420
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default y
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select OMAP_PACKAGE_ZAF
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select OMAP_DEBUG_DEVICES
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config MACH_OMAP_APOLLON
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bool "OMAP 2420 Apollon board"
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depends on ARCH_OMAP2
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depends on ARCH_OMAP2420
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default y
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select OMAP_PACKAGE_ZAC
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config MACH_OMAP_2430SDP
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bool "OMAP 2430 SDP board"
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depends on ARCH_OMAP2
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depends on ARCH_OMAP2430
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default y
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select OMAP_PACKAGE_ZAC
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@ -3,7 +3,8 @@
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#
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# Common support
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obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o
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obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o \
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common.o
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omap-2-3-common = irq.o sdrc.o prm2xxx_3xxx.o
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hwmod-common = omap_hwmod.o \
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@ -39,7 +39,6 @@
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#include <plat/gpmc.h>
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#include <plat/display.h>
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#include <plat/control.h>
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#include <plat/gpmc-smc91x.h>
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#include "board-flash.h"
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@ -47,6 +46,7 @@
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#include "sdram-qimonda-hyb18m512160af-6.h"
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#include "hsmmc.h"
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#include "pm.h"
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#include "control.h"
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#define CONFIG_DISABLE_HFCLK 1
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@ -32,12 +32,12 @@
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#include <plat/board.h>
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#include <plat/common.h>
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#include <plat/control.h>
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#include <plat/usb.h>
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#include <plat/mmc.h>
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#include "hsmmc.h"
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#include "timer-gp.h"
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#include "control.h"
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#define ETH_KS8851_IRQ 34
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#define ETH_KS8851_POWER_ON 48
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@ -32,11 +32,11 @@
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#include <plat/board.h>
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#include <plat/common.h>
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#include <plat/control.h>
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#include <plat/usb.h>
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#include <plat/display.h>
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#include "mux.h"
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#include "control.h"
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#define AM35XX_EVM_PHY_MASK (0xF)
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#define AM35XX_EVM_MDIO_FREQUENCY (1000000)
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@ -39,9 +39,9 @@
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#include <plat/board.h>
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#include <plat/common.h>
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#include <plat/gpmc.h>
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#include <plat/control.h>
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#include "mux.h"
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#include "control.h"
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/* LED & Switch macros */
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#define LED0_GPIO13 13
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@ -40,7 +40,6 @@
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#include <plat/board.h>
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#include <plat/common.h>
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#include <plat/control.h>
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#include <plat/usb.h>
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#include <plat/nand.h>
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#include <plat/gpmc.h>
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@ -48,6 +47,7 @@
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#include <mach/am35xx.h>
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#include "mux.h"
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#include "control.h"
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#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
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static struct gpio_led cm_t3517_leds[] = {
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@ -48,10 +48,22 @@ static void __init omap_generic_init(void)
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static void __init omap_generic_map_io(void)
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{
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omap2_set_globals_242x(); /* should be 242x, 243x, or 343x */
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omap242x_map_common_io();
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if (cpu_is_omap242x()) {
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omap2_set_globals_242x();
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omap242x_map_common_io();
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} else if (cpu_is_omap243x()) {
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omap2_set_globals_243x();
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omap243x_map_common_io();
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} else if (cpu_is_omap34xx()) {
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omap2_set_globals_3xxx();
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omap34xx_map_common_io();
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} else if (cpu_is_omap44xx()) {
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omap2_set_globals_443x();
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omap44xx_map_common_io();
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}
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}
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/* XXX This machine entry name should be updated */
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MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx")
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/* Maintainer: Paul Mundt <paul.mundt@nokia.com> */
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.phys_io = 0x48000000,
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@ -31,7 +31,6 @@
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <plat/control.h>
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#include <mach/gpio.h>
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#include <plat/usb.h>
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#include <plat/board.h>
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@ -42,6 +41,7 @@
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#include <plat/gpmc.h>
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#include "mux.h"
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#include "control.h"
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#define H4_FLASH_CS 0
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#define H4_SMC91X_CS 1
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@ -42,12 +42,12 @@
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#include <mach/board-zoom.h>
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#include <asm/delay.h>
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#include <plat/control.h>
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#include <plat/usb.h>
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#include "board-flash.h"
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#include "mux.h"
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#include "hsmmc.h"
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#include "control.h"
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#define LDP_SMSC911X_CS 1
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#define LDP_SMSC911X_GPIO 152
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@ -36,6 +36,7 @@
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#include "mux.h"
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#include "hsmmc.h"
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#include "timer-gp.h"
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#include "control.h"
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#include <plat/mux.h>
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#include <plat/board.h>
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@ -43,7 +44,6 @@
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#include <plat/gpmc-smsc911x.h>
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#include <plat/gpmc.h>
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#include <plat/sdrc.h>
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#include <plat/control.h>
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#define OMAP3LOGIC_SMSC911X_CS 1
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@ -34,12 +34,12 @@
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#include <plat/board.h>
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#include <plat/common.h>
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#include <plat/control.h>
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#include <plat/usb.h>
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#include <plat/mmc.h>
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#include "hsmmc.h"
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#include "timer-gp.h"
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#include "hsmmc.h"
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#include "control.h"
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#define GPIO_HUB_POWER 1
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#define GPIO_HUB_NRESET 62
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@ -395,7 +395,7 @@ void omap2_clk_disable_unused(struct clk *clk)
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if ((regval32 & (1 << clk->enable_bit)) == v)
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return;
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printk(KERN_DEBUG "Disabling unused clock \"%s\"\n", clk->name);
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pr_debug("Disabling unused clock \"%s\"\n", clk->name);
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if (cpu_is_omap34xx()) {
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omap2_clk_enable(clk);
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omap2_clk_disable(clk);
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@ -27,6 +27,7 @@
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#include "prm-regbits-24xx.h"
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#include "cm-regbits-24xx.h"
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#include "sdrc.h"
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#include "control.h"
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#define OMAP_CM_REGADDR OMAP2420_CM_REGADDR
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@ -89,6 +90,12 @@ static struct clk alt_ck = { /* Typical 54M or 48M, may not exist */
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.clkdm_name = "wkup_clkdm",
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};
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/* Optional external clock input for McBSP CLKS */
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static struct clk mcbsp_clks = {
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.name = "mcbsp_clks",
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.ops = &clkops_null,
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};
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/*
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* Analog domain root source clocks
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*/
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@ -1135,14 +1142,34 @@ static struct clk mcbsp1_ick = {
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.recalc = &followparent_recalc,
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};
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static const struct clksel_rate common_mcbsp_96m_rates[] = {
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{ .div = 1, .val = 0, .flags = RATE_IN_24XX },
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{ .div = 0 }
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};
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static const struct clksel_rate common_mcbsp_mcbsp_rates[] = {
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{ .div = 1, .val = 1, .flags = RATE_IN_24XX },
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{ .div = 0 }
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};
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static const struct clksel mcbsp_fck_clksel[] = {
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{ .parent = &func_96m_ck, .rates = common_mcbsp_96m_rates },
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{ .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates },
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{ .parent = NULL }
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};
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static struct clk mcbsp1_fck = {
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.name = "mcbsp1_fck",
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.ops = &clkops_omap2_dflt_wait,
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.parent = &func_96m_ck,
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.init = &omap2_init_clksel_parent,
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.clkdm_name = "core_l4_clkdm",
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.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
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.enable_bit = OMAP24XX_EN_MCBSP1_SHIFT,
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.recalc = &followparent_recalc,
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.clksel_reg = OMAP242X_CTRL_REGADDR(OMAP2_CONTROL_DEVCONF0),
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.clksel_mask = OMAP2_MCBSP1_CLKS_MASK,
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.clksel = mcbsp_fck_clksel,
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.recalc = &omap2_clksel_recalc,
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};
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static struct clk mcbsp2_ick = {
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@ -1159,10 +1186,14 @@ static struct clk mcbsp2_fck = {
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.name = "mcbsp2_fck",
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.ops = &clkops_omap2_dflt_wait,
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.parent = &func_96m_ck,
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.init = &omap2_init_clksel_parent,
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.clkdm_name = "core_l4_clkdm",
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.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
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.enable_bit = OMAP24XX_EN_MCBSP2_SHIFT,
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.recalc = &followparent_recalc,
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.clksel_reg = OMAP242X_CTRL_REGADDR(OMAP2_CONTROL_DEVCONF0),
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.clksel_mask = OMAP2_MCBSP2_CLKS_MASK,
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.clksel = mcbsp_fck_clksel,
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.recalc = &omap2_clksel_recalc,
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};
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static struct clk mcspi1_ick = {
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@ -1721,6 +1752,9 @@ static struct omap_clk omap2420_clks[] = {
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CLK(NULL, "osc_ck", &osc_ck, CK_242X),
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CLK(NULL, "sys_ck", &sys_ck, CK_242X),
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CLK(NULL, "alt_ck", &alt_ck, CK_242X),
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CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_242X),
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CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_242X),
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CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_242X),
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/* internal analog sources */
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CLK(NULL, "dpll_ck", &dpll_ck, CK_242X),
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CLK(NULL, "apll96_ck", &apll96_ck, CK_242X),
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@ -1728,6 +1762,8 @@ static struct omap_clk omap2420_clks[] = {
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/* internal prcm root sources */
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CLK(NULL, "func_54m_ck", &func_54m_ck, CK_242X),
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CLK(NULL, "core_ck", &core_ck, CK_242X),
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CLK("omap-mcbsp.1", "prcm_fck", &func_96m_ck, CK_242X),
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CLK("omap-mcbsp.2", "prcm_fck", &func_96m_ck, CK_242X),
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CLK(NULL, "func_96m_ck", &func_96m_ck, CK_242X),
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CLK(NULL, "func_48m_ck", &func_48m_ck, CK_242X),
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CLK(NULL, "func_12m_ck", &func_12m_ck, CK_242X),
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@ -27,6 +27,7 @@
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#include "prm-regbits-24xx.h"
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||||
#include "cm-regbits-24xx.h"
|
||||
#include "sdrc.h"
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||||
#include "control.h"
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||||
|
||||
#define OMAP_CM_REGADDR OMAP2430_CM_REGADDR
|
||||
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||||
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@ -89,6 +90,12 @@ static struct clk alt_ck = { /* Typical 54M or 48M, may not exist */
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|||
.clkdm_name = "wkup_clkdm",
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||||
};
|
||||
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||||
/* Optional external clock input for McBSP CLKS */
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||||
static struct clk mcbsp_clks = {
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||||
.name = "mcbsp_clks",
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||||
.ops = &clkops_null,
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||||
};
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||||
|
||||
/*
|
||||
* Analog domain root source clocks
|
||||
*/
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||||
|
@ -1123,14 +1130,34 @@ static struct clk mcbsp1_ick = {
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|||
.recalc = &followparent_recalc,
|
||||
};
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||||
|
||||
static const struct clksel_rate common_mcbsp_96m_rates[] = {
|
||||
{ .div = 1, .val = 0, .flags = RATE_IN_24XX },
|
||||
{ .div = 0 }
|
||||
};
|
||||
|
||||
static const struct clksel_rate common_mcbsp_mcbsp_rates[] = {
|
||||
{ .div = 1, .val = 1, .flags = RATE_IN_24XX },
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{ .div = 0 }
|
||||
};
|
||||
|
||||
static const struct clksel mcbsp_fck_clksel[] = {
|
||||
{ .parent = &func_96m_ck, .rates = common_mcbsp_96m_rates },
|
||||
{ .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates },
|
||||
{ .parent = NULL }
|
||||
};
|
||||
|
||||
static struct clk mcbsp1_fck = {
|
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.name = "mcbsp1_fck",
|
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.ops = &clkops_omap2_dflt_wait,
|
||||
.parent = &func_96m_ck,
|
||||
.init = &omap2_init_clksel_parent,
|
||||
.clkdm_name = "core_l4_clkdm",
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||||
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
|
||||
.enable_bit = OMAP24XX_EN_MCBSP1_SHIFT,
|
||||
.recalc = &followparent_recalc,
|
||||
.clksel_reg = OMAP243X_CTRL_REGADDR(OMAP2_CONTROL_DEVCONF0),
|
||||
.clksel_mask = OMAP2_MCBSP1_CLKS_MASK,
|
||||
.clksel = mcbsp_fck_clksel,
|
||||
.recalc = &omap2_clksel_recalc,
|
||||
};
|
||||
|
||||
static struct clk mcbsp2_ick = {
|
||||
|
@ -1147,10 +1174,14 @@ static struct clk mcbsp2_fck = {
|
|||
.name = "mcbsp2_fck",
|
||||
.ops = &clkops_omap2_dflt_wait,
|
||||
.parent = &func_96m_ck,
|
||||
.init = &omap2_init_clksel_parent,
|
||||
.clkdm_name = "core_l4_clkdm",
|
||||
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
|
||||
.enable_bit = OMAP24XX_EN_MCBSP2_SHIFT,
|
||||
.recalc = &followparent_recalc,
|
||||
.clksel_reg = OMAP243X_CTRL_REGADDR(OMAP2_CONTROL_DEVCONF0),
|
||||
.clksel_mask = OMAP2_MCBSP2_CLKS_MASK,
|
||||
.clksel = mcbsp_fck_clksel,
|
||||
.recalc = &omap2_clksel_recalc,
|
||||
};
|
||||
|
||||
static struct clk mcbsp3_ick = {
|
||||
|
@ -1167,10 +1198,14 @@ static struct clk mcbsp3_fck = {
|
|||
.name = "mcbsp3_fck",
|
||||
.ops = &clkops_omap2_dflt_wait,
|
||||
.parent = &func_96m_ck,
|
||||
.init = &omap2_init_clksel_parent,
|
||||
.clkdm_name = "core_l4_clkdm",
|
||||
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
|
||||
.enable_bit = OMAP2430_EN_MCBSP3_SHIFT,
|
||||
.recalc = &followparent_recalc,
|
||||
.clksel_reg = OMAP243X_CTRL_REGADDR(OMAP243X_CONTROL_DEVCONF1),
|
||||
.clksel_mask = OMAP2_MCBSP3_CLKS_MASK,
|
||||
.clksel = mcbsp_fck_clksel,
|
||||
.recalc = &omap2_clksel_recalc,
|
||||
};
|
||||
|
||||
static struct clk mcbsp4_ick = {
|
||||
|
@ -1187,10 +1222,14 @@ static struct clk mcbsp4_fck = {
|
|||
.name = "mcbsp4_fck",
|
||||
.ops = &clkops_omap2_dflt_wait,
|
||||
.parent = &func_96m_ck,
|
||||
.init = &omap2_init_clksel_parent,
|
||||
.clkdm_name = "core_l4_clkdm",
|
||||
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
|
||||
.enable_bit = OMAP2430_EN_MCBSP4_SHIFT,
|
||||
.recalc = &followparent_recalc,
|
||||
.clksel_reg = OMAP243X_CTRL_REGADDR(OMAP243X_CONTROL_DEVCONF1),
|
||||
.clksel_mask = OMAP2_MCBSP4_CLKS_MASK,
|
||||
.clksel = mcbsp_fck_clksel,
|
||||
.recalc = &omap2_clksel_recalc,
|
||||
};
|
||||
|
||||
static struct clk mcbsp5_ick = {
|
||||
|
@ -1207,10 +1246,14 @@ static struct clk mcbsp5_fck = {
|
|||
.name = "mcbsp5_fck",
|
||||
.ops = &clkops_omap2_dflt_wait,
|
||||
.parent = &func_96m_ck,
|
||||
.init = &omap2_init_clksel_parent,
|
||||
.clkdm_name = "core_l4_clkdm",
|
||||
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
|
||||
.enable_bit = OMAP2430_EN_MCBSP5_SHIFT,
|
||||
.recalc = &followparent_recalc,
|
||||
.clksel_reg = OMAP243X_CTRL_REGADDR(OMAP243X_CONTROL_DEVCONF1),
|
||||
.clksel_mask = OMAP2_MCBSP5_CLKS_MASK,
|
||||
.clksel = mcbsp_fck_clksel,
|
||||
.recalc = &omap2_clksel_recalc,
|
||||
};
|
||||
|
||||
static struct clk mcspi1_ick = {
|
||||
|
@ -1808,6 +1851,12 @@ static struct omap_clk omap2430_clks[] = {
|
|||
CLK(NULL, "osc_ck", &osc_ck, CK_243X),
|
||||
CLK(NULL, "sys_ck", &sys_ck, CK_243X),
|
||||
CLK(NULL, "alt_ck", &alt_ck, CK_243X),
|
||||
CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_243X),
|
||||
CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_243X),
|
||||
CLK("omap-mcbsp.3", "pad_fck", &mcbsp_clks, CK_243X),
|
||||
CLK("omap-mcbsp.4", "pad_fck", &mcbsp_clks, CK_243X),
|
||||
CLK("omap-mcbsp.5", "pad_fck", &mcbsp_clks, CK_243X),
|
||||
CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_243X),
|
||||
/* internal analog sources */
|
||||
CLK(NULL, "dpll_ck", &dpll_ck, CK_243X),
|
||||
CLK(NULL, "apll96_ck", &apll96_ck, CK_243X),
|
||||
|
@ -1815,6 +1864,11 @@ static struct omap_clk omap2430_clks[] = {
|
|||
/* internal prcm root sources */
|
||||
CLK(NULL, "func_54m_ck", &func_54m_ck, CK_243X),
|
||||
CLK(NULL, "core_ck", &core_ck, CK_243X),
|
||||
CLK("omap-mcbsp.1", "prcm_fck", &func_96m_ck, CK_243X),
|
||||
CLK("omap-mcbsp.2", "prcm_fck", &func_96m_ck, CK_243X),
|
||||
CLK("omap-mcbsp.3", "prcm_fck", &func_96m_ck, CK_243X),
|
||||
CLK("omap-mcbsp.4", "prcm_fck", &func_96m_ck, CK_243X),
|
||||
CLK("omap-mcbsp.5", "prcm_fck", &func_96m_ck, CK_243X),
|
||||
CLK(NULL, "func_96m_ck", &func_96m_ck, CK_243X),
|
||||
CLK(NULL, "func_48m_ck", &func_48m_ck, CK_243X),
|
||||
CLK(NULL, "func_12m_ck", &func_12m_ck, CK_243X),
|
||||
|
|
|
@ -20,7 +20,6 @@
|
|||
#include <linux/clk.h>
|
||||
#include <linux/list.h>
|
||||
|
||||
#include <plat/control.h>
|
||||
#include <plat/clkdev_omap.h>
|
||||
|
||||
#include "clock.h"
|
||||
|
@ -33,6 +32,7 @@
|
|||
#include "cm-regbits-34xx.h"
|
||||
#include "prm.h"
|
||||
#include "prm-regbits-34xx.h"
|
||||
#include "control.h"
|
||||
|
||||
/*
|
||||
* clocks
|
||||
|
@ -3208,6 +3208,11 @@ static struct omap_clk omap3xxx_clks[] = {
|
|||
CLK(NULL, "osc_sys_ck", &osc_sys_ck, CK_3XXX),
|
||||
CLK(NULL, "sys_ck", &sys_ck, CK_3XXX),
|
||||
CLK(NULL, "sys_altclk", &sys_altclk, CK_3XXX),
|
||||
CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_3XXX),
|
||||
CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_3XXX),
|
||||
CLK("omap-mcbsp.3", "pad_fck", &mcbsp_clks, CK_3XXX),
|
||||
CLK("omap-mcbsp.4", "pad_fck", &mcbsp_clks, CK_3XXX),
|
||||
CLK("omap-mcbsp.5", "pad_fck", &mcbsp_clks, CK_3XXX),
|
||||
CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_3XXX),
|
||||
CLK(NULL, "sys_clkout1", &sys_clkout1, CK_3XXX),
|
||||
CLK(NULL, "dpll1_ck", &dpll1_ck, CK_3XXX),
|
||||
|
@ -3273,6 +3278,8 @@ static struct omap_clk omap3xxx_clks[] = {
|
|||
CLK(NULL, "cpefuse_fck", &cpefuse_fck, CK_3430ES2 | CK_AM35XX),
|
||||
CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2 | CK_AM35XX),
|
||||
CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2 | CK_AM35XX),
|
||||
CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX),
|
||||
CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX),
|
||||
CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX),
|
||||
CLK("mmci-omap-hs.2", "fck", &mmchs3_fck, CK_3430ES2 | CK_AM35XX),
|
||||
CLK("mmci-omap-hs.1", "fck", &mmchs2_fck, CK_3XXX),
|
||||
|
@ -3366,6 +3373,9 @@ static struct omap_clk omap3xxx_clks[] = {
|
|||
CLK(NULL, "omap_32ksync_ick", &omap_32ksync_ick, CK_3XXX),
|
||||
CLK(NULL, "gpt12_ick", &gpt12_ick, CK_3XXX),
|
||||
CLK(NULL, "gpt1_ick", &gpt1_ick, CK_3XXX),
|
||||
CLK("omap-mcbsp.2", "prcm_fck", &per_96m_fck, CK_3XXX),
|
||||
CLK("omap-mcbsp.3", "prcm_fck", &per_96m_fck, CK_3XXX),
|
||||
CLK("omap-mcbsp.4", "prcm_fck", &per_96m_fck, CK_3XXX),
|
||||
CLK(NULL, "per_96m_fck", &per_96m_fck, CK_3XXX),
|
||||
CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX),
|
||||
CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX),
|
||||
|
|
|
@ -26,7 +26,6 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/clk.h>
|
||||
#include <plat/control.h>
|
||||
#include <plat/clkdev_omap.h>
|
||||
|
||||
#include "clock.h"
|
||||
|
@ -35,6 +34,7 @@
|
|||
#include "cm-regbits-44xx.h"
|
||||
#include "prm.h"
|
||||
#include "prm-regbits-44xx.h"
|
||||
#include "control.h"
|
||||
|
||||
/* Root clocks */
|
||||
|
||||
|
|
135
arch/arm/mach-omap2/common.c
Normal file
135
arch/arm/mach-omap2/common.c
Normal file
|
@ -0,0 +1,135 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-omap2/common.c
|
||||
*
|
||||
* Code common to all OMAP2+ machines.
|
||||
*
|
||||
* Copyright (C) 2009 Texas Instruments
|
||||
* Copyright (C) 2010 Nokia Corporation
|
||||
* Tony Lindgren <tony@atomide.com>
|
||||
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include <plat/common.h>
|
||||
#include <plat/board.h>
|
||||
#include <plat/mux.h>
|
||||
|
||||
#include <plat/clock.h>
|
||||
|
||||
#include "sdrc.h"
|
||||
#include "control.h"
|
||||
|
||||
/* Global address base setup code */
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
|
||||
|
||||
static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
|
||||
{
|
||||
omap2_set_globals_tap(omap2_globals);
|
||||
omap2_set_globals_sdrc(omap2_globals);
|
||||
omap2_set_globals_control(omap2_globals);
|
||||
omap2_set_globals_prcm(omap2_globals);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2420)
|
||||
|
||||
static struct omap_globals omap242x_globals = {
|
||||
.class = OMAP242X_CLASS,
|
||||
.tap = OMAP2_L4_IO_ADDRESS(0x48014000),
|
||||
.sdrc = OMAP2420_SDRC_BASE,
|
||||
.sms = OMAP2420_SMS_BASE,
|
||||
.ctrl = OMAP242X_CTRL_BASE,
|
||||
.prm = OMAP2420_PRM_BASE,
|
||||
.cm = OMAP2420_CM_BASE,
|
||||
.uart1_phys = OMAP2_UART1_BASE,
|
||||
.uart2_phys = OMAP2_UART2_BASE,
|
||||
.uart3_phys = OMAP2_UART3_BASE,
|
||||
};
|
||||
|
||||
void __init omap2_set_globals_242x(void)
|
||||
{
|
||||
__omap2_set_globals(&omap242x_globals);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2430)
|
||||
|
||||
static struct omap_globals omap243x_globals = {
|
||||
.class = OMAP243X_CLASS,
|
||||
.tap = OMAP2_L4_IO_ADDRESS(0x4900a000),
|
||||
.sdrc = OMAP243X_SDRC_BASE,
|
||||
.sms = OMAP243X_SMS_BASE,
|
||||
.ctrl = OMAP243X_CTRL_BASE,
|
||||
.prm = OMAP2430_PRM_BASE,
|
||||
.cm = OMAP2430_CM_BASE,
|
||||
.uart1_phys = OMAP2_UART1_BASE,
|
||||
.uart2_phys = OMAP2_UART2_BASE,
|
||||
.uart3_phys = OMAP2_UART3_BASE,
|
||||
};
|
||||
|
||||
void __init omap2_set_globals_243x(void)
|
||||
{
|
||||
__omap2_set_globals(&omap243x_globals);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP3)
|
||||
|
||||
static struct omap_globals omap3_globals = {
|
||||
.class = OMAP343X_CLASS,
|
||||
.tap = OMAP2_L4_IO_ADDRESS(0x4830A000),
|
||||
.sdrc = OMAP343X_SDRC_BASE,
|
||||
.sms = OMAP343X_SMS_BASE,
|
||||
.ctrl = OMAP343X_CTRL_BASE,
|
||||
.prm = OMAP3430_PRM_BASE,
|
||||
.cm = OMAP3430_CM_BASE,
|
||||
.uart1_phys = OMAP3_UART1_BASE,
|
||||
.uart2_phys = OMAP3_UART2_BASE,
|
||||
.uart3_phys = OMAP3_UART3_BASE,
|
||||
.uart4_phys = OMAP3_UART4_BASE, /* Only on 3630 */
|
||||
};
|
||||
|
||||
void __init omap2_set_globals_3xxx(void)
|
||||
{
|
||||
__omap2_set_globals(&omap3_globals);
|
||||
}
|
||||
|
||||
void __init omap3_map_io(void)
|
||||
{
|
||||
omap2_set_globals_3xxx();
|
||||
omap34xx_map_common_io();
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP4)
|
||||
static struct omap_globals omap4_globals = {
|
||||
.class = OMAP443X_CLASS,
|
||||
.tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
|
||||
.ctrl = OMAP443X_SCM_BASE,
|
||||
.ctrl_pad = OMAP443X_CTRL_BASE,
|
||||
.prm = OMAP4430_PRM_BASE,
|
||||
.cm = OMAP4430_CM_BASE,
|
||||
.cm2 = OMAP4430_CM2_BASE,
|
||||
.uart1_phys = OMAP4_UART1_BASE,
|
||||
.uart2_phys = OMAP4_UART2_BASE,
|
||||
.uart3_phys = OMAP4_UART3_BASE,
|
||||
.uart4_phys = OMAP4_UART4_BASE,
|
||||
};
|
||||
|
||||
void __init omap2_set_globals_443x(void)
|
||||
{
|
||||
omap2_set_globals_tap(&omap4_globals);
|
||||
omap2_set_globals_control(&omap4_globals);
|
||||
omap2_set_globals_prcm(&omap4_globals);
|
||||
}
|
||||
#endif
|
||||
|
|
@ -16,14 +16,15 @@
|
|||
#include <linux/io.h>
|
||||
|
||||
#include <plat/common.h>
|
||||
#include <plat/control.h>
|
||||
#include <plat/sdrc.h>
|
||||
|
||||
#include "cm-regbits-34xx.h"
|
||||
#include "prm-regbits-34xx.h"
|
||||
#include "cm.h"
|
||||
#include "prm.h"
|
||||
#include "sdrc.h"
|
||||
#include "pm.h"
|
||||
#include "control.h"
|
||||
|
||||
static void __iomem *omap2_ctrl_base;
|
||||
static void __iomem *omap4_ctrl_pad_base;
|
||||
|
|
|
@ -1,10 +1,10 @@
|
|||
/*
|
||||
* arch/arm/plat-omap/include/mach/control.h
|
||||
* arch/arm/mach-omap2/control.h
|
||||
*
|
||||
* OMAP2/3/4 System Control Module definitions
|
||||
*
|
||||
* Copyright (C) 2007-2009 Texas Instruments, Inc.
|
||||
* Copyright (C) 2007-2008 Nokia Corporation
|
||||
* Copyright (C) 2007-2010 Texas Instruments, Inc.
|
||||
* Copyright (C) 2007-2008, 2010 Nokia Corporation
|
||||
*
|
||||
* Written by Paul Walmsley
|
||||
*
|
||||
|
@ -13,8 +13,8 @@
|
|||
* the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_CONTROL_H
|
||||
#define __ASM_ARCH_CONTROL_H
|
||||
#ifndef __ARCH_ARM_MACH_OMAP2_CONTROL_H
|
||||
#define __ARCH_ARM_MACH_OMAP2_CONTROL_H
|
||||
|
||||
#include <mach/io.h>
|
||||
#include <mach/ctrl_module_core_44xx.h>
|
||||
|
@ -223,6 +223,8 @@
|
|||
#define OMAP2_MMCSDIO1ADPCLKISEL (1 << 24) /* MMC1 loop back clock */
|
||||
#define OMAP24XX_USBSTANDBYCTRL (1 << 15)
|
||||
#define OMAP2_MCBSP2_CLKS_MASK (1 << 6)
|
||||
#define OMAP2_MCBSP1_FSR_MASK (1 << 4)
|
||||
#define OMAP2_MCBSP1_CLKR_MASK (1 << 3)
|
||||
#define OMAP2_MCBSP1_CLKS_MASK (1 << 2)
|
||||
|
||||
/* CONTROL_DEVCONF1 bits */
|
||||
|
@ -319,12 +321,12 @@
|
|||
#define FEAT_L2CACHE_256KB 3
|
||||
|
||||
#define OMAP3_ISP_SHIFT 5
|
||||
#define OMAP3_ISP_MASK (1<< OMAP3_ISP_SHIFT)
|
||||
#define OMAP3_ISP_MASK (1 << OMAP3_ISP_SHIFT)
|
||||
#define FEAT_ISP 0
|
||||
#define FEAT_ISP_NONE 1
|
||||
|
||||
#define OMAP3_NEON_SHIFT 4
|
||||
#define OMAP3_NEON_MASK (1<< OMAP3_NEON_SHIFT)
|
||||
#define OMAP3_NEON_MASK (1 << OMAP3_NEON_SHIFT)
|
||||
#define FEAT_NEON 0
|
||||
#define FEAT_NEON_NONE 1
|
||||
|
||||
|
@ -362,5 +364,5 @@ extern void omap3_control_restore_context(void);
|
|||
#endif
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* __ASM_ARCH_CONTROL_H */
|
||||
#endif /* __ARCH_ARM_MACH_OMAP2_CONTROL_H */
|
||||
|
|
@ -29,10 +29,10 @@
|
|||
#include <plat/irqs.h>
|
||||
#include <plat/powerdomain.h>
|
||||
#include <plat/clockdomain.h>
|
||||
#include <plat/control.h>
|
||||
#include <plat/serial.h>
|
||||
|
||||
#include "pm.h"
|
||||
#include "control.h"
|
||||
|
||||
#ifdef CONFIG_CPU_IDLE
|
||||
|
||||
|
|
|
@ -9,7 +9,6 @@
|
|||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
@ -23,7 +22,6 @@
|
|||
#include <asm/mach/map.h>
|
||||
#include <asm/pmu.h>
|
||||
|
||||
#include <plat/control.h>
|
||||
#include <plat/tc.h>
|
||||
#include <plat/board.h>
|
||||
#include <mach/gpio.h>
|
||||
|
@ -33,6 +31,7 @@
|
|||
#include <plat/omap_device.h>
|
||||
|
||||
#include "mux.h"
|
||||
#include "control.h"
|
||||
|
||||
#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
|
||||
|
||||
|
|
|
@ -14,11 +14,11 @@
|
|||
#include <linux/string.h>
|
||||
#include <linux/delay.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <plat/control.h>
|
||||
#include <plat/mmc.h>
|
||||
#include <plat/omap-pm.h>
|
||||
|
||||
#include "hsmmc.h"
|
||||
#include "control.h"
|
||||
|
||||
#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
|
||||
|
||||
|
|
|
@ -22,11 +22,12 @@
|
|||
#include <asm/cputype.h>
|
||||
|
||||
#include <plat/common.h>
|
||||
#include <plat/control.h>
|
||||
#include <plat/cpu.h>
|
||||
|
||||
#include <mach/id.h>
|
||||
|
||||
#include "control.h"
|
||||
|
||||
static struct omap_chip_id omap_chip;
|
||||
static unsigned int omap_revision;
|
||||
|
||||
|
|
|
@ -23,6 +23,86 @@
|
|||
#include <plat/cpu.h>
|
||||
#include <plat/mcbsp.h>
|
||||
|
||||
#include "control.h"
|
||||
|
||||
|
||||
/* McBSP internal signal muxing functions */
|
||||
|
||||
void omap2_mcbsp1_mux_clkr_src(u8 mux)
|
||||
{
|
||||
u32 v;
|
||||
|
||||
v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
|
||||
if (mux == CLKR_SRC_CLKR)
|
||||
v &= ~OMAP2_MCBSP1_CLKR_MASK;
|
||||
else if (mux == CLKR_SRC_CLKX)
|
||||
v |= OMAP2_MCBSP1_CLKR_MASK;
|
||||
omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
|
||||
}
|
||||
EXPORT_SYMBOL(omap2_mcbsp1_mux_clkr_src);
|
||||
|
||||
void omap2_mcbsp1_mux_fsr_src(u8 mux)
|
||||
{
|
||||
u32 v;
|
||||
|
||||
v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
|
||||
if (mux == FSR_SRC_FSR)
|
||||
v &= ~OMAP2_MCBSP1_FSR_MASK;
|
||||
else if (mux == FSR_SRC_FSX)
|
||||
v |= OMAP2_MCBSP1_FSR_MASK;
|
||||
omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
|
||||
}
|
||||
EXPORT_SYMBOL(omap2_mcbsp1_mux_fsr_src);
|
||||
|
||||
/* McBSP CLKS source switching function */
|
||||
|
||||
int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
|
||||
{
|
||||
struct omap_mcbsp *mcbsp;
|
||||
struct clk *fck_src;
|
||||
char *fck_src_name;
|
||||
int r;
|
||||
|
||||
if (!omap_mcbsp_check_valid_id(id)) {
|
||||
pr_err("%s: Invalid id (%d)\n", __func__, id + 1);
|
||||
return -EINVAL;
|
||||
}
|
||||
mcbsp = id_to_mcbsp_ptr(id);
|
||||
|
||||
if (fck_src_id == MCBSP_CLKS_PAD_SRC)
|
||||
fck_src_name = "pad_fck";
|
||||
else if (fck_src_id == MCBSP_CLKS_PRCM_SRC)
|
||||
fck_src_name = "prcm_fck";
|
||||
else
|
||||
return -EINVAL;
|
||||
|
||||
fck_src = clk_get(mcbsp->dev, fck_src_name);
|
||||
if (IS_ERR_OR_NULL(fck_src)) {
|
||||
pr_err("omap-mcbsp: %s: could not clk_get() %s\n", "clks",
|
||||
fck_src_name);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
clk_disable(mcbsp->fclk);
|
||||
|
||||
r = clk_set_parent(mcbsp->fclk, fck_src);
|
||||
if (IS_ERR_VALUE(r)) {
|
||||
pr_err("omap-mcbsp: %s: could not clk_set_parent() to %s\n",
|
||||
"clks", fck_src_name);
|
||||
clk_put(fck_src);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
clk_enable(mcbsp->fclk);
|
||||
|
||||
clk_put(fck_src);
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(omap2_mcbsp_set_clks_src);
|
||||
|
||||
|
||||
/* Platform data */
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2420
|
||||
static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
|
||||
|
|
|
@ -23,12 +23,11 @@
|
|||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*
|
||||
*/
|
||||
#include <linux/module.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/ctype.h>
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/seq_file.h>
|
||||
|
@ -36,8 +35,7 @@
|
|||
|
||||
#include <asm/system.h>
|
||||
|
||||
#include <plat/control.h>
|
||||
|
||||
#include "control.h"
|
||||
#include "mux.h"
|
||||
|
||||
#define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */
|
||||
|
|
|
@ -38,7 +38,6 @@
|
|||
#include <mach/irqs.h>
|
||||
#include <plat/clock.h>
|
||||
#include <plat/sram.h>
|
||||
#include <plat/control.h>
|
||||
#include <plat/dma.h>
|
||||
#include <plat/board.h>
|
||||
|
||||
|
@ -48,6 +47,7 @@
|
|||
#include "cm-regbits-24xx.h"
|
||||
#include "sdrc.h"
|
||||
#include "pm.h"
|
||||
#include "control.h"
|
||||
|
||||
#include <plat/powerdomain.h>
|
||||
#include <plat/clockdomain.h>
|
||||
|
|
|
@ -32,7 +32,6 @@
|
|||
#include <plat/sram.h>
|
||||
#include <plat/clockdomain.h>
|
||||
#include <plat/powerdomain.h>
|
||||
#include <plat/control.h>
|
||||
#include <plat/serial.h>
|
||||
#include <plat/sdrc.h>
|
||||
#include <plat/prcm.h>
|
||||
|
@ -48,6 +47,7 @@
|
|||
#include "prm.h"
|
||||
#include "pm.h"
|
||||
#include "sdrc.h"
|
||||
#include "control.h"
|
||||
|
||||
/* Scratchpad offsets */
|
||||
#define OMAP343X_TABLE_ADDRESS_OFFSET 0x31
|
||||
|
|
|
@ -26,7 +26,6 @@
|
|||
#include <plat/common.h>
|
||||
#include <plat/prcm.h>
|
||||
#include <plat/irqs.h>
|
||||
#include <plat/control.h>
|
||||
|
||||
#include "clock.h"
|
||||
#include "clock2xxx.h"
|
||||
|
@ -34,6 +33,7 @@
|
|||
#include "prm.h"
|
||||
#include "prm-regbits-24xx.h"
|
||||
#include "prm-regbits-44xx.h"
|
||||
#include "control.h"
|
||||
|
||||
static void __iomem *prm_base;
|
||||
static void __iomem *cm_base;
|
||||
|
|
|
@ -35,7 +35,6 @@
|
|||
#include <plat/common.h>
|
||||
#include <plat/board.h>
|
||||
#include <plat/clock.h>
|
||||
#include <plat/control.h>
|
||||
#include <plat/dma.h>
|
||||
#include <plat/omap_hwmod.h>
|
||||
#include <plat/omap_device.h>
|
||||
|
@ -44,6 +43,7 @@
|
|||
#include "pm.h"
|
||||
#include "cm.h"
|
||||
#include "prm-regbits-34xx.h"
|
||||
#include "control.h"
|
||||
|
||||
#define UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV 0x52
|
||||
#define UART_OMAP_WER 0x17 /* Wake-up enable register */
|
||||
|
|
|
@ -27,11 +27,11 @@
|
|||
#include <linux/linkage.h>
|
||||
#include <asm/assembler.h>
|
||||
#include <mach/io.h>
|
||||
#include <plat/control.h>
|
||||
|
||||
#include "cm.h"
|
||||
#include "prm.h"
|
||||
#include "sdrc.h"
|
||||
#include "control.h"
|
||||
|
||||
#define SDRC_SCRATCHPAD_SEM_V 0xfa00291c
|
||||
|
||||
|
|
|
@ -29,18 +29,18 @@
|
|||
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include <plat/control.h>
|
||||
#include <plat/usb.h>
|
||||
#include <plat/board.h>
|
||||
|
||||
#include "control.h"
|
||||
#include "mux.h"
|
||||
|
||||
#define INT_USB_IRQ_GEN INT_24XX_USB_IRQ_GEN
|
||||
#define INT_USB_IRQ_NISO INT_24XX_USB_IRQ_NISO
|
||||
#define INT_USB_IRQ_ISO INT_24XX_USB_IRQ_ISO
|
||||
#define INT_USB_IRQ_HGEN INT_24XX_USB_IRQ_HGEN
|
||||
#define INT_USB_IRQ_OTG INT_24XX_USB_IRQ_OTG
|
||||
|
||||
#include "mux.h"
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2)
|
||||
|
||||
#ifdef CONFIG_USB_GADGET_OMAP
|
||||
|
|
|
@ -4,7 +4,7 @@
|
|||
|
||||
# Common support
|
||||
obj-y := common.o sram.o clock.o devices.o dma.o mux.o gpio.o \
|
||||
usb.o fb.o io.o
|
||||
usb.o fb.o io.o counter_32k.o
|
||||
obj-m :=
|
||||
obj-n :=
|
||||
obj- :=
|
||||
|
|
|
@ -60,7 +60,7 @@ void clk_disable(struct clk *clk)
|
|||
|
||||
spin_lock_irqsave(&clockfw_lock, flags);
|
||||
if (clk->usecount == 0) {
|
||||
printk(KERN_ERR "Trying disable clock %s with 0 usecount\n",
|
||||
pr_err("Trying disable clock %s with 0 usecount\n",
|
||||
clk->name);
|
||||
WARN_ON(1);
|
||||
goto out;
|
||||
|
@ -397,6 +397,7 @@ static int __init clk_disable_unused(void)
|
|||
struct clk *ck;
|
||||
unsigned long flags;
|
||||
|
||||
pr_info("clock: disabling unused clocks to save power\n");
|
||||
list_for_each_entry(ck, &clocks, node) {
|
||||
if (ck->ops == &clkops_null)
|
||||
continue;
|
||||
|
@ -418,7 +419,7 @@ late_initcall(clk_disable_unused);
|
|||
int __init clk_init(struct clk_functions * custom_clocks)
|
||||
{
|
||||
if (!custom_clocks) {
|
||||
printk(KERN_ERR "No custom clock functions registered\n");
|
||||
pr_err("No custom clock functions registered\n");
|
||||
BUG();
|
||||
}
|
||||
|
||||
|
|
|
@ -11,38 +11,15 @@
|
|||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/module.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/console.h>
|
||||
#include <linux/serial.h>
|
||||
#include <linux/tty.h>
|
||||
#include <linux/serial_8250.h>
|
||||
#include <linux/serial_reg.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/omapfb.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/setup.h>
|
||||
|
||||
#include <plat/common.h>
|
||||
#include <plat/board.h>
|
||||
#include <plat/control.h>
|
||||
#include <plat/mux.h>
|
||||
#include <plat/fpga.h>
|
||||
#include <plat/serial.h>
|
||||
#include <plat/vram.h>
|
||||
|
||||
#include <plat/clock.h>
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
|
||||
# include "../mach-omap2/sdrc.h"
|
||||
#endif
|
||||
|
||||
#define NO_LENGTH_CHECK 0xffffffff
|
||||
|
||||
|
@ -88,255 +65,3 @@ void __init omap_reserve(void)
|
|||
omapfb_reserve_sdram_memblock();
|
||||
omap_vram_reserve_sdram_memblock();
|
||||
}
|
||||
|
||||
/*
|
||||
* 32KHz clocksource ... always available, on pretty most chips except
|
||||
* OMAP 730 and 1510. Other timers could be used as clocksources, with
|
||||
* higher resolution in free-running counter modes (e.g. 12 MHz xtal),
|
||||
* but systems won't necessarily want to spend resources that way.
|
||||
*/
|
||||
|
||||
#define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410
|
||||
|
||||
#if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX))
|
||||
|
||||
#include <linux/clocksource.h>
|
||||
|
||||
/*
|
||||
* offset_32k holds the init time counter value. It is then subtracted
|
||||
* from every counter read to achieve a counter that counts time from the
|
||||
* kernel boot (needed for sched_clock()).
|
||||
*/
|
||||
static u32 offset_32k __read_mostly;
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP16XX
|
||||
static cycle_t omap16xx_32k_read(struct clocksource *cs)
|
||||
{
|
||||
return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED) - offset_32k;
|
||||
}
|
||||
#else
|
||||
#define omap16xx_32k_read NULL
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2420
|
||||
static cycle_t omap2420_32k_read(struct clocksource *cs)
|
||||
{
|
||||
return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10) - offset_32k;
|
||||
}
|
||||
#else
|
||||
#define omap2420_32k_read NULL
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2430
|
||||
static cycle_t omap2430_32k_read(struct clocksource *cs)
|
||||
{
|
||||
return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10) - offset_32k;
|
||||
}
|
||||
#else
|
||||
#define omap2430_32k_read NULL
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP3
|
||||
static cycle_t omap34xx_32k_read(struct clocksource *cs)
|
||||
{
|
||||
return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10) - offset_32k;
|
||||
}
|
||||
#else
|
||||
#define omap34xx_32k_read NULL
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP4
|
||||
static cycle_t omap44xx_32k_read(struct clocksource *cs)
|
||||
{
|
||||
return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10) - offset_32k;
|
||||
}
|
||||
#else
|
||||
#define omap44xx_32k_read NULL
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Kernel assumes that sched_clock can be called early but may not have
|
||||
* things ready yet.
|
||||
*/
|
||||
static cycle_t omap_32k_read_dummy(struct clocksource *cs)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct clocksource clocksource_32k = {
|
||||
.name = "32k_counter",
|
||||
.rating = 250,
|
||||
.read = omap_32k_read_dummy,
|
||||
.mask = CLOCKSOURCE_MASK(32),
|
||||
.shift = 10,
|
||||
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
||||
};
|
||||
|
||||
/*
|
||||
* Returns current time from boot in nsecs. It's OK for this to wrap
|
||||
* around for now, as it's just a relative time stamp.
|
||||
*/
|
||||
unsigned long long sched_clock(void)
|
||||
{
|
||||
return clocksource_cyc2ns(clocksource_32k.read(&clocksource_32k),
|
||||
clocksource_32k.mult, clocksource_32k.shift);
|
||||
}
|
||||
|
||||
/**
|
||||
* read_persistent_clock - Return time from a persistent clock.
|
||||
*
|
||||
* Reads the time from a source which isn't disabled during PM, the
|
||||
* 32k sync timer. Convert the cycles elapsed since last read into
|
||||
* nsecs and adds to a monotonically increasing timespec.
|
||||
*/
|
||||
static struct timespec persistent_ts;
|
||||
static cycles_t cycles, last_cycles;
|
||||
void read_persistent_clock(struct timespec *ts)
|
||||
{
|
||||
unsigned long long nsecs;
|
||||
cycles_t delta;
|
||||
struct timespec *tsp = &persistent_ts;
|
||||
|
||||
last_cycles = cycles;
|
||||
cycles = clocksource_32k.read(&clocksource_32k);
|
||||
delta = cycles - last_cycles;
|
||||
|
||||
nsecs = clocksource_cyc2ns(delta,
|
||||
clocksource_32k.mult, clocksource_32k.shift);
|
||||
|
||||
timespec_add_ns(tsp, nsecs);
|
||||
*ts = *tsp;
|
||||
}
|
||||
|
||||
static int __init omap_init_clocksource_32k(void)
|
||||
{
|
||||
static char err[] __initdata = KERN_ERR
|
||||
"%s: can't register clocksource!\n";
|
||||
|
||||
if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
|
||||
struct clk *sync_32k_ick;
|
||||
|
||||
if (cpu_is_omap16xx())
|
||||
clocksource_32k.read = omap16xx_32k_read;
|
||||
else if (cpu_is_omap2420())
|
||||
clocksource_32k.read = omap2420_32k_read;
|
||||
else if (cpu_is_omap2430())
|
||||
clocksource_32k.read = omap2430_32k_read;
|
||||
else if (cpu_is_omap34xx())
|
||||
clocksource_32k.read = omap34xx_32k_read;
|
||||
else if (cpu_is_omap44xx())
|
||||
clocksource_32k.read = omap44xx_32k_read;
|
||||
else
|
||||
return -ENODEV;
|
||||
|
||||
sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
|
||||
if (sync_32k_ick)
|
||||
clk_enable(sync_32k_ick);
|
||||
|
||||
clocksource_32k.mult = clocksource_hz2mult(32768,
|
||||
clocksource_32k.shift);
|
||||
|
||||
offset_32k = clocksource_32k.read(&clocksource_32k);
|
||||
|
||||
if (clocksource_register(&clocksource_32k))
|
||||
printk(err, clocksource_32k.name);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(omap_init_clocksource_32k);
|
||||
|
||||
#endif /* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */
|
||||
|
||||
/* Global address base setup code */
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
|
||||
|
||||
static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
|
||||
{
|
||||
omap2_set_globals_tap(omap2_globals);
|
||||
omap2_set_globals_sdrc(omap2_globals);
|
||||
omap2_set_globals_control(omap2_globals);
|
||||
omap2_set_globals_prcm(omap2_globals);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2420)
|
||||
|
||||
static struct omap_globals omap242x_globals = {
|
||||
.class = OMAP242X_CLASS,
|
||||
.tap = OMAP2_L4_IO_ADDRESS(0x48014000),
|
||||
.sdrc = OMAP2420_SDRC_BASE,
|
||||
.sms = OMAP2420_SMS_BASE,
|
||||
.ctrl = OMAP2420_CTRL_BASE,
|
||||
.prm = OMAP2420_PRM_BASE,
|
||||
.cm = OMAP2420_CM_BASE,
|
||||
};
|
||||
|
||||
void __init omap2_set_globals_242x(void)
|
||||
{
|
||||
__omap2_set_globals(&omap242x_globals);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2430)
|
||||
|
||||
static struct omap_globals omap243x_globals = {
|
||||
.class = OMAP243X_CLASS,
|
||||
.tap = OMAP2_L4_IO_ADDRESS(0x4900a000),
|
||||
.sdrc = OMAP243X_SDRC_BASE,
|
||||
.sms = OMAP243X_SMS_BASE,
|
||||
.ctrl = OMAP243X_CTRL_BASE,
|
||||
.prm = OMAP2430_PRM_BASE,
|
||||
.cm = OMAP2430_CM_BASE,
|
||||
};
|
||||
|
||||
void __init omap2_set_globals_243x(void)
|
||||
{
|
||||
__omap2_set_globals(&omap243x_globals);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP3)
|
||||
|
||||
static struct omap_globals omap3_globals = {
|
||||
.class = OMAP343X_CLASS,
|
||||
.tap = OMAP2_L4_IO_ADDRESS(0x4830A000),
|
||||
.sdrc = OMAP343X_SDRC_BASE,
|
||||
.sms = OMAP343X_SMS_BASE,
|
||||
.ctrl = OMAP343X_CTRL_BASE,
|
||||
.prm = OMAP3430_PRM_BASE,
|
||||
.cm = OMAP3430_CM_BASE,
|
||||
};
|
||||
|
||||
void __init omap2_set_globals_3xxx(void)
|
||||
{
|
||||
__omap2_set_globals(&omap3_globals);
|
||||
}
|
||||
|
||||
void __init omap3_map_io(void)
|
||||
{
|
||||
omap2_set_globals_3xxx();
|
||||
omap34xx_map_common_io();
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP4)
|
||||
static struct omap_globals omap4_globals = {
|
||||
.class = OMAP443X_CLASS,
|
||||
.tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
|
||||
.ctrl = OMAP443X_SCM_BASE,
|
||||
.ctrl_pad = OMAP443X_CTRL_BASE,
|
||||
.prm = OMAP4430_PRM_BASE,
|
||||
.cm = OMAP4430_CM_BASE,
|
||||
.cm2 = OMAP4430_CM2_BASE,
|
||||
};
|
||||
|
||||
void __init omap2_set_globals_443x(void)
|
||||
{
|
||||
omap2_set_globals_tap(&omap4_globals);
|
||||
omap2_set_globals_control(&omap4_globals);
|
||||
omap2_set_globals_prcm(&omap4_globals);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
183
arch/arm/plat-omap/counter_32k.c
Normal file
183
arch/arm/plat-omap/counter_32k.c
Normal file
|
@ -0,0 +1,183 @@
|
|||
/*
|
||||
* OMAP 32ksynctimer/counter_32k-related code
|
||||
*
|
||||
* Copyright (C) 2009 Texas Instruments
|
||||
* Copyright (C) 2010 Nokia Corporation
|
||||
* Tony Lindgren <tony@atomide.com>
|
||||
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* NOTE: This timer is not the same timer as the old OMAP1 MPU timer.
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include <plat/common.h>
|
||||
#include <plat/board.h>
|
||||
|
||||
#include <plat/clock.h>
|
||||
|
||||
|
||||
/*
|
||||
* 32KHz clocksource ... always available, on pretty most chips except
|
||||
* OMAP 730 and 1510. Other timers could be used as clocksources, with
|
||||
* higher resolution in free-running counter modes (e.g. 12 MHz xtal),
|
||||
* but systems won't necessarily want to spend resources that way.
|
||||
*/
|
||||
|
||||
#define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410
|
||||
|
||||
#if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX))
|
||||
|
||||
#include <linux/clocksource.h>
|
||||
|
||||
/*
|
||||
* offset_32k holds the init time counter value. It is then subtracted
|
||||
* from every counter read to achieve a counter that counts time from the
|
||||
* kernel boot (needed for sched_clock()).
|
||||
*/
|
||||
static u32 offset_32k __read_mostly;
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP16XX
|
||||
static cycle_t omap16xx_32k_read(struct clocksource *cs)
|
||||
{
|
||||
return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED) - offset_32k;
|
||||
}
|
||||
#else
|
||||
#define omap16xx_32k_read NULL
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2420
|
||||
static cycle_t omap2420_32k_read(struct clocksource *cs)
|
||||
{
|
||||
return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10) - offset_32k;
|
||||
}
|
||||
#else
|
||||
#define omap2420_32k_read NULL
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2430
|
||||
static cycle_t omap2430_32k_read(struct clocksource *cs)
|
||||
{
|
||||
return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10) - offset_32k;
|
||||
}
|
||||
#else
|
||||
#define omap2430_32k_read NULL
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP3
|
||||
static cycle_t omap34xx_32k_read(struct clocksource *cs)
|
||||
{
|
||||
return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10) - offset_32k;
|
||||
}
|
||||
#else
|
||||
#define omap34xx_32k_read NULL
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP4
|
||||
static cycle_t omap44xx_32k_read(struct clocksource *cs)
|
||||
{
|
||||
return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10) - offset_32k;
|
||||
}
|
||||
#else
|
||||
#define omap44xx_32k_read NULL
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Kernel assumes that sched_clock can be called early but may not have
|
||||
* things ready yet.
|
||||
*/
|
||||
static cycle_t omap_32k_read_dummy(struct clocksource *cs)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct clocksource clocksource_32k = {
|
||||
.name = "32k_counter",
|
||||
.rating = 250,
|
||||
.read = omap_32k_read_dummy,
|
||||
.mask = CLOCKSOURCE_MASK(32),
|
||||
.shift = 10,
|
||||
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
||||
};
|
||||
|
||||
/*
|
||||
* Returns current time from boot in nsecs. It's OK for this to wrap
|
||||
* around for now, as it's just a relative time stamp.
|
||||
*/
|
||||
unsigned long long sched_clock(void)
|
||||
{
|
||||
return clocksource_cyc2ns(clocksource_32k.read(&clocksource_32k),
|
||||
clocksource_32k.mult, clocksource_32k.shift);
|
||||
}
|
||||
|
||||
/**
|
||||
* read_persistent_clock - Return time from a persistent clock.
|
||||
*
|
||||
* Reads the time from a source which isn't disabled during PM, the
|
||||
* 32k sync timer. Convert the cycles elapsed since last read into
|
||||
* nsecs and adds to a monotonically increasing timespec.
|
||||
*/
|
||||
static struct timespec persistent_ts;
|
||||
static cycles_t cycles, last_cycles;
|
||||
void read_persistent_clock(struct timespec *ts)
|
||||
{
|
||||
unsigned long long nsecs;
|
||||
cycles_t delta;
|
||||
struct timespec *tsp = &persistent_ts;
|
||||
|
||||
last_cycles = cycles;
|
||||
cycles = clocksource_32k.read(&clocksource_32k);
|
||||
delta = cycles - last_cycles;
|
||||
|
||||
nsecs = clocksource_cyc2ns(delta,
|
||||
clocksource_32k.mult, clocksource_32k.shift);
|
||||
|
||||
timespec_add_ns(tsp, nsecs);
|
||||
*ts = *tsp;
|
||||
}
|
||||
|
||||
static int __init omap_init_clocksource_32k(void)
|
||||
{
|
||||
static char err[] __initdata = KERN_ERR
|
||||
"%s: can't register clocksource!\n";
|
||||
|
||||
if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
|
||||
struct clk *sync_32k_ick;
|
||||
|
||||
if (cpu_is_omap16xx())
|
||||
clocksource_32k.read = omap16xx_32k_read;
|
||||
else if (cpu_is_omap2420())
|
||||
clocksource_32k.read = omap2420_32k_read;
|
||||
else if (cpu_is_omap2430())
|
||||
clocksource_32k.read = omap2430_32k_read;
|
||||
else if (cpu_is_omap34xx())
|
||||
clocksource_32k.read = omap34xx_32k_read;
|
||||
else if (cpu_is_omap44xx())
|
||||
clocksource_32k.read = omap44xx_32k_read;
|
||||
else
|
||||
return -ENODEV;
|
||||
|
||||
sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
|
||||
if (sync_32k_ick)
|
||||
clk_enable(sync_32k_ick);
|
||||
|
||||
clocksource_32k.mult = clocksource_hz2mult(32768,
|
||||
clocksource_32k.shift);
|
||||
|
||||
offset_32k = clocksource_32k.read(&clocksource_32k);
|
||||
|
||||
if (clocksource_register(&clocksource_32k))
|
||||
printk(err, clocksource_32k.name);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(omap_init_clocksource_32k);
|
||||
|
||||
#endif /* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */
|
||||
|
|
@ -21,7 +21,6 @@
|
|||
#include <asm/mach/map.h>
|
||||
|
||||
#include <plat/tc.h>
|
||||
#include <plat/control.h>
|
||||
#include <plat/board.h>
|
||||
#include <plat/mmc.h>
|
||||
#include <mach/gpio.h>
|
||||
|
|
|
@ -312,6 +312,18 @@
|
|||
#define RFSREN 0x0002
|
||||
#define RSYNCERREN 0x0001
|
||||
|
||||
/* CLKR signal muxing options */
|
||||
#define CLKR_SRC_CLKR 0
|
||||
#define CLKR_SRC_CLKX 1
|
||||
|
||||
/* FSR signal muxing options */
|
||||
#define FSR_SRC_FSR 0
|
||||
#define FSR_SRC_FSX 1
|
||||
|
||||
/* McBSP functional clock sources */
|
||||
#define MCBSP_CLKS_PRCM_SRC 0
|
||||
#define MCBSP_CLKS_PAD_SRC 1
|
||||
|
||||
/* we don't do multichannel for now */
|
||||
struct omap_mcbsp_reg_cfg {
|
||||
u16 spcr2;
|
||||
|
@ -398,6 +410,7 @@ struct omap_mcbsp_spi_cfg {
|
|||
struct omap_mcbsp_ops {
|
||||
void (*request)(unsigned int);
|
||||
void (*free)(unsigned int);
|
||||
int (*set_clks_src)(u8, u8);
|
||||
};
|
||||
|
||||
struct omap_mcbsp_platform_data {
|
||||
|
@ -464,6 +477,9 @@ struct omap_mcbsp {
|
|||
extern struct omap_mcbsp **mcbsp_ptr;
|
||||
extern int omap_mcbsp_count, omap_mcbsp_cache_size;
|
||||
|
||||
#define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count)
|
||||
#define id_to_mcbsp_ptr(id) mcbsp_ptr[id];
|
||||
|
||||
int omap_mcbsp_init(void);
|
||||
void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
|
||||
int size);
|
||||
|
@ -502,6 +518,8 @@ int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word);
|
|||
int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 * word);
|
||||
|
||||
|
||||
/* McBSP functional clock source changing function */
|
||||
extern int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id);
|
||||
/* SPI specific API */
|
||||
void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg * spi_cfg);
|
||||
|
||||
|
@ -510,6 +528,10 @@ int omap_mcbsp_pollread(unsigned int id, u16 * buf);
|
|||
int omap_mcbsp_pollwrite(unsigned int id, u16 buf);
|
||||
int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type);
|
||||
|
||||
/* McBSP signal muxing API */
|
||||
void omap2_mcbsp1_mux_clkr_src(u8 mux);
|
||||
void omap2_mcbsp1_mux_fsr_src(u8 mux);
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP3
|
||||
/* Sidetone specific API */
|
||||
int omap_st_set_chgain(unsigned int id, int channel, s16 chgain);
|
||||
|
|
|
@ -20,7 +20,6 @@
|
|||
#include <linux/serial_core.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#include <plat/control.h>
|
||||
#include <plat/mux.h>
|
||||
|
||||
#define DRIVER_NAME "omap-hsuart"
|
||||
|
|
|
@ -40,7 +40,7 @@
|
|||
#define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000)
|
||||
#define OMAP24XX_IVA_INTC_BASE 0x40000000
|
||||
|
||||
#define OMAP2420_CTRL_BASE L4_24XX_BASE
|
||||
#define OMAP242X_CTRL_BASE L4_24XX_BASE
|
||||
#define OMAP2420_32KSYNCT_BASE (L4_24XX_BASE + 0x4000)
|
||||
#define OMAP2420_PRCM_BASE (L4_24XX_BASE + 0x8000)
|
||||
#define OMAP2420_CM_BASE (L4_24XX_BASE + 0x8000)
|
||||
|
|
|
@ -80,9 +80,6 @@ static int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16 reg)
|
|||
#define MCBSP_READ_CACHE(mcbsp, reg) \
|
||||
omap_mcbsp_read(mcbsp, OMAP_MCBSP_REG_##reg, 1)
|
||||
|
||||
#define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count)
|
||||
#define id_to_mcbsp_ptr(id) mcbsp_ptr[id];
|
||||
|
||||
#define MCBSP_ST_READ(mcbsp, reg) \
|
||||
omap_mcbsp_st_read(mcbsp, OMAP_ST_REG_##reg)
|
||||
#define MCBSP_ST_WRITE(mcbsp, reg, val) \
|
||||
|
|
|
@ -31,10 +31,8 @@
|
|||
#include <plat/cpu.h>
|
||||
#include <plat/vram.h>
|
||||
|
||||
#include <plat/control.h>
|
||||
#include "sram.h"
|
||||
#include "fb.h"
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
|
||||
# include "../mach-omap2/prm.h"
|
||||
# include "../mach-omap2/cm.h"
|
||||
|
@ -71,7 +69,6 @@
|
|||
#define OMAP34XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68012858)
|
||||
#define OMAP34XX_VA_ADDR_MATCH2 OMAP2_L3_IO_ADDRESS(0x68012880)
|
||||
#define OMAP34XX_VA_SMS_RG_ATT0 OMAP2_L3_IO_ADDRESS(0x6C000048)
|
||||
#define OMAP34XX_VA_CONTROL_STAT OMAP2_L4_IO_ADDRESS(0x480022F0)
|
||||
|
||||
#define GP_DEVICE 0x300
|
||||
|
||||
|
|
|
@ -54,7 +54,6 @@
|
|||
|
||||
#include <plat/dma.h>
|
||||
#include <plat/usb.h>
|
||||
#include <plat/control.h>
|
||||
|
||||
#include "omap_udc.h"
|
||||
|
||||
|
@ -2309,21 +2308,12 @@ static char *trx_mode(unsigned m, int enabled)
|
|||
static int proc_otg_show(struct seq_file *s)
|
||||
{
|
||||
u32 tmp;
|
||||
u32 trans;
|
||||
char *ctrl_name;
|
||||
u32 trans = 0;
|
||||
char *ctrl_name = "(UNKNOWN)";
|
||||
|
||||
/* XXX This needs major revision for OMAP2+ */
|
||||
tmp = omap_readl(OTG_REV);
|
||||
if (cpu_is_omap24xx()) {
|
||||
/*
|
||||
* REVISIT: Not clear how this works on OMAP2. trans
|
||||
* is ANDed to produce bits 7 and 8, which might make
|
||||
* sense for USB_TRANSCEIVER_CTRL on OMAP1,
|
||||
* but with CONTROL_DEVCONF, these bits have something to
|
||||
* do with the frame adjustment counter and McBSP2.
|
||||
*/
|
||||
ctrl_name = "control_devconf";
|
||||
trans = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
|
||||
} else {
|
||||
if (cpu_class_is_omap1()) {
|
||||
ctrl_name = "tranceiver_ctrl";
|
||||
trans = omap_readw(USB_TRANSCEIVER_CTRL);
|
||||
}
|
||||
|
|
|
@ -31,7 +31,6 @@
|
|||
#include <sound/initval.h>
|
||||
#include <sound/soc.h>
|
||||
|
||||
#include <plat/control.h>
|
||||
#include <plat/dma.h>
|
||||
#include <plat/mcbsp.h>
|
||||
#include "omap-mcbsp.h"
|
||||
|
@ -608,93 +607,6 @@ static int omap_mcbsp_dai_set_clkdiv(struct snd_soc_dai *cpu_dai,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int omap_mcbsp_dai_set_clks_src(struct omap_mcbsp_data *mcbsp_data,
|
||||
int clk_id)
|
||||
{
|
||||
int sel_bit;
|
||||
u16 reg, reg_devconf1 = OMAP243X_CONTROL_DEVCONF1;
|
||||
|
||||
if (cpu_class_is_omap1()) {
|
||||
/* OMAP1's can use only external source clock */
|
||||
if (unlikely(clk_id == OMAP_MCBSP_SYSCLK_CLKS_FCLK))
|
||||
return -EINVAL;
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (cpu_is_omap2420() && mcbsp_data->bus_id > 1)
|
||||
return -EINVAL;
|
||||
|
||||
if (cpu_is_omap343x())
|
||||
reg_devconf1 = OMAP343X_CONTROL_DEVCONF1;
|
||||
|
||||
switch (mcbsp_data->bus_id) {
|
||||
case 0:
|
||||
reg = OMAP2_CONTROL_DEVCONF0;
|
||||
sel_bit = 2;
|
||||
break;
|
||||
case 1:
|
||||
reg = OMAP2_CONTROL_DEVCONF0;
|
||||
sel_bit = 6;
|
||||
break;
|
||||
case 2:
|
||||
reg = reg_devconf1;
|
||||
sel_bit = 0;
|
||||
break;
|
||||
case 3:
|
||||
reg = reg_devconf1;
|
||||
sel_bit = 2;
|
||||
break;
|
||||
case 4:
|
||||
reg = reg_devconf1;
|
||||
sel_bit = 4;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (clk_id == OMAP_MCBSP_SYSCLK_CLKS_FCLK)
|
||||
omap_ctrl_writel(omap_ctrl_readl(reg) & ~(1 << sel_bit), reg);
|
||||
else
|
||||
omap_ctrl_writel(omap_ctrl_readl(reg) | (1 << sel_bit), reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int omap_mcbsp_dai_set_rcvr_src(struct omap_mcbsp_data *mcbsp_data,
|
||||
int clk_id)
|
||||
{
|
||||
int sel_bit, set = 0;
|
||||
u16 reg = OMAP2_CONTROL_DEVCONF0;
|
||||
|
||||
if (cpu_class_is_omap1())
|
||||
return -EINVAL; /* TODO: Can this be implemented for OMAP1? */
|
||||
if (mcbsp_data->bus_id != 0)
|
||||
return -EINVAL;
|
||||
|
||||
switch (clk_id) {
|
||||
case OMAP_MCBSP_CLKR_SRC_CLKX:
|
||||
set = 1;
|
||||
case OMAP_MCBSP_CLKR_SRC_CLKR:
|
||||
sel_bit = 3;
|
||||
break;
|
||||
case OMAP_MCBSP_FSR_SRC_FSX:
|
||||
set = 1;
|
||||
case OMAP_MCBSP_FSR_SRC_FSR:
|
||||
sel_bit = 4;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (set)
|
||||
omap_ctrl_writel(omap_ctrl_readl(reg) | (1 << sel_bit), reg);
|
||||
else
|
||||
omap_ctrl_writel(omap_ctrl_readl(reg) & ~(1 << sel_bit), reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
|
||||
int clk_id, unsigned int freq,
|
||||
int dir)
|
||||
|
@ -703,6 +615,14 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
|
|||
struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs;
|
||||
int err = 0;
|
||||
|
||||
/* The McBSP signal muxing functions are only available on McBSP1 */
|
||||
if (clk_id == OMAP_MCBSP_CLKR_SRC_CLKR ||
|
||||
clk_id == OMAP_MCBSP_CLKR_SRC_CLKX ||
|
||||
clk_id == OMAP_MCBSP_FSR_SRC_FSR ||
|
||||
clk_id == OMAP_MCBSP_FSR_SRC_FSX)
|
||||
if (cpu_class_is_omap1() || mcbsp_data->bus_id != 0)
|
||||
return -EINVAL;
|
||||
|
||||
mcbsp_data->in_freq = freq;
|
||||
|
||||
switch (clk_id) {
|
||||
|
@ -710,8 +630,20 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
|
|||
regs->srgr2 |= CLKSM;
|
||||
break;
|
||||
case OMAP_MCBSP_SYSCLK_CLKS_FCLK:
|
||||
if (cpu_class_is_omap1()) {
|
||||
err = -EINVAL;
|
||||
break;
|
||||
}
|
||||
err = omap2_mcbsp_set_clks_src(mcbsp_data->bus_id,
|
||||
MCBSP_CLKS_PRCM_SRC);
|
||||
break;
|
||||
case OMAP_MCBSP_SYSCLK_CLKS_EXT:
|
||||
err = omap_mcbsp_dai_set_clks_src(mcbsp_data, clk_id);
|
||||
if (cpu_class_is_omap1()) {
|
||||
err = 0;
|
||||
break;
|
||||
}
|
||||
err = omap2_mcbsp_set_clks_src(mcbsp_data->bus_id,
|
||||
MCBSP_CLKS_PAD_SRC);
|
||||
break;
|
||||
|
||||
case OMAP_MCBSP_SYSCLK_CLKX_EXT:
|
||||
|
@ -720,11 +652,18 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
|
|||
regs->pcr0 |= SCLKME;
|
||||
break;
|
||||
|
||||
|
||||
case OMAP_MCBSP_CLKR_SRC_CLKR:
|
||||
omap2_mcbsp1_mux_clkr_src(CLKR_SRC_CLKR);
|
||||
break;
|
||||
case OMAP_MCBSP_CLKR_SRC_CLKX:
|
||||
omap2_mcbsp1_mux_clkr_src(CLKR_SRC_CLKX);
|
||||
break;
|
||||
case OMAP_MCBSP_FSR_SRC_FSR:
|
||||
omap2_mcbsp1_mux_fsr_src(FSR_SRC_FSR);
|
||||
break;
|
||||
case OMAP_MCBSP_FSR_SRC_FSX:
|
||||
err = omap_mcbsp_dai_set_rcvr_src(mcbsp_data, clk_id);
|
||||
omap2_mcbsp1_mux_fsr_src(FSR_SRC_FSX);
|
||||
break;
|
||||
default:
|
||||
err = -ENODEV;
|
||||
|
|
Loading…
Reference in a new issue