From a8856ff88ee8b6026782c70f71f0c95c45c57992 Mon Sep 17 00:00:00 2001 From: Mike Rapoport Date: Sun, 17 Jan 2016 20:04:19 +0200 Subject: [PATCH] staging: sm750fb: change definition of SYSTEM_CTRL multi-bit fields Use more straight-forward definitions for multi-bit fields of SYSTEM_CTRL register and replace FIELD_GET/SET for these fields with open-coded implementation. Signed-off-by: Mike Rapoport Signed-off-by: Greg Kroah-Hartman --- drivers/staging/sm750fb/ddk750_power.c | 2 +- drivers/staging/sm750fb/ddk750_reg.h | 20 ++++++++++---------- drivers/staging/sm750fb/sm750_hw.c | 18 +++++++++--------- 3 files changed, 20 insertions(+), 20 deletions(-) diff --git a/drivers/staging/sm750fb/ddk750_power.c b/drivers/staging/sm750fb/ddk750_power.c index 667e4f822544..1c5001c0a44e 100644 --- a/drivers/staging/sm750fb/ddk750_power.c +++ b/drivers/staging/sm750fb/ddk750_power.c @@ -12,7 +12,7 @@ void ddk750_setDPMS(DPMS_t state) DPMS, state)); } else { value = PEEK32(SYSTEM_CTRL); - value = FIELD_VALUE(value, SYSTEM_CTRL, DPMS, state); + value = (value & ~SYSTEM_CTRL_DPMS_MASK) | state; POKE32(SYSTEM_CTRL, value); } } diff --git a/drivers/staging/sm750fb/ddk750_reg.h b/drivers/staging/sm750fb/ddk750_reg.h index 351a1dc67900..75a20e70ebc3 100644 --- a/drivers/staging/sm750fb/ddk750_reg.h +++ b/drivers/staging/sm750fb/ddk750_reg.h @@ -11,11 +11,11 @@ #define DE_STATE2_DE_MEM_FIFO_EMPTY BIT(1) #define SYSTEM_CTRL 0x000000 -#define SYSTEM_CTRL_DPMS 31:30 -#define SYSTEM_CTRL_DPMS_VPHP 0 -#define SYSTEM_CTRL_DPMS_VPHN 1 -#define SYSTEM_CTRL_DPMS_VNHP 2 -#define SYSTEM_CTRL_DPMS_VNHN 3 +#define SYSTEM_CTRL_DPMS_MASK (0x3 << 30) +#define SYSTEM_CTRL_DPMS_VPHP (0x0 << 30) +#define SYSTEM_CTRL_DPMS_VPHN (0x1 << 30) +#define SYSTEM_CTRL_DPMS_VNHP (0x2 << 30) +#define SYSTEM_CTRL_DPMS_VNHN (0x3 << 30) #define SYSTEM_CTRL_PCI_BURST BIT(29) #define SYSTEM_CTRL_PCI_MASTER BIT(25) #define SYSTEM_CTRL_LATENCY_TIMER_OFF BIT(24) @@ -31,11 +31,11 @@ #define SYSTEM_CTRL_DE_ABORT BIT(13) #define SYSTEM_CTRL_PCI_SUBSYS_ID_LOCK BIT(11) #define SYSTEM_CTRL_PCI_RETRY_OFF BIT(7) -#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE 5:4 -#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_1 0 -#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_2 1 -#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_4 2 -#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_8 3 +#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_MASK (0x3 << 4) +#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_1 (0x0 << 4) +#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_2 (0x1 << 4) +#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_4 (0x2 << 4) +#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_8 (0x3 << 4) #define SYSTEM_CTRL_CRT_TRISTATE BIT(3) #define SYSTEM_CTRL_PCIMEM_TRISTATE BIT(2) #define SYSTEM_CTRL_LOCALMEM_TRISTATE BIT(1) diff --git a/drivers/staging/sm750fb/sm750_hw.c b/drivers/staging/sm750fb/sm750_hw.c index 59adeb669644..357ee5654d4d 100644 --- a/drivers/staging/sm750fb/sm750_hw.c +++ b/drivers/staging/sm750fb/sm750_hw.c @@ -112,6 +112,7 @@ int hw_sm750_inithw(struct sm750_dev *sm750_dev, struct pci_dev *pdev) } if (getChipType() != SM750LE) { + unsigned int val; /* does user need CRT ?*/ if (sm750_dev->nocrt) { POKE32(MISC_CTRL, @@ -119,20 +120,18 @@ int hw_sm750_inithw(struct sm750_dev *sm750_dev, struct pci_dev *pdev) MISC_CTRL, DAC_POWER, OFF)); /* shut off dpms */ - POKE32(SYSTEM_CTRL, - FIELD_SET(PEEK32(SYSTEM_CTRL), - SYSTEM_CTRL, - DPMS, VNHN)); + val = PEEK32(SYSTEM_CTRL) & ~SYSTEM_CTRL_DPMS_MASK; + val |= SYSTEM_CTRL_DPMS_VPHN; + POKE32(SYSTEM_CTRL, val); } else { POKE32(MISC_CTRL, FIELD_SET(PEEK32(MISC_CTRL), MISC_CTRL, DAC_POWER, ON)); /* turn on dpms */ - POKE32(SYSTEM_CTRL, - FIELD_SET(PEEK32(SYSTEM_CTRL), - SYSTEM_CTRL, - DPMS, VPHP)); + val = PEEK32(SYSTEM_CTRL) & ~SYSTEM_CTRL_DPMS_MASK; + val |= SYSTEM_CTRL_DPMS_VPHP; + POKE32(SYSTEM_CTRL, val); } switch (sm750_dev->pnltype) { @@ -448,8 +447,9 @@ int hw_sm750_setBLANK(struct lynxfb_output *output, int blank) } if (output->paths & sm750_crt) { + unsigned int val = PEEK32(SYSTEM_CTRL) & ~SYSTEM_CTRL_DPMS_MASK; - POKE32(SYSTEM_CTRL, FIELD_VALUE(PEEK32(SYSTEM_CTRL), SYSTEM_CTRL, DPMS, dpms)); + POKE32(SYSTEM_CTRL, val | dpms); POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, BLANK, crtdb)); }