drm/radeon: fix endian swap on hawaii clear state buffer setup
Need to swap on BE. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
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@ -6542,8 +6542,8 @@ void cik_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer)
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buffer[count++] = cpu_to_le32(0x00000000);
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break;
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case CHIP_HAWAII:
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buffer[count++] = 0x3a00161a;
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buffer[count++] = 0x0000002e;
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buffer[count++] = cpu_to_le32(0x3a00161a);
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buffer[count++] = cpu_to_le32(0x0000002e);
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break;
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default:
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buffer[count++] = cpu_to_le32(0x00000000);
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