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drm/nouveau/vga: require nvkm_device pointer in accessor functions 

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
hifive-unleashed-5.1
Ben Skeggs 2015-08-20 14:54:14 +10:00
parent 95cf469cc3
commit a8dae9fe0e
9 changed files with 98 additions and 102 deletions
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26
drivers/gpu/drm/nouveau/include/nvkm/subdev/vga.h
View File

@ -3,26 +3,26 @@
#include <core/subdev.h> #include <core/subdev.h>
/* access to various legacy io ports */ /* access to various legacy io ports */
u8 nv_rdport(void *obj, int head, u16 port); u8 nvkm_rdport(struct nvkm_device *, int head, u16 port);
void nv_wrport(void *obj, int head, u16 port, u8 value); void nvkm_wrport(struct nvkm_device *, int head, u16 port, u8 value);
/* VGA Sequencer */ /* VGA Sequencer */
u8 nv_rdvgas(void *obj, int head, u8 index); u8 nvkm_rdvgas(struct nvkm_device *, int head, u8 index);
void nv_wrvgas(void *obj, int head, u8 index, u8 value); void nvkm_wrvgas(struct nvkm_device *, int head, u8 index, u8 value);
/* VGA Graphics */ /* VGA Graphics */
u8 nv_rdvgag(void *obj, int head, u8 index); u8 nvkm_rdvgag(struct nvkm_device *, int head, u8 index);
void nv_wrvgag(void *obj, int head, u8 index, u8 value); void nvkm_wrvgag(struct nvkm_device *, int head, u8 index, u8 value);
/* VGA CRTC */ /* VGA CRTC */
u8 nv_rdvgac(void *obj, int head, u8 index); u8 nvkm_rdvgac(struct nvkm_device *, int head, u8 index);
void nv_wrvgac(void *obj, int head, u8 index, u8 value); void nvkm_wrvgac(struct nvkm_device *, int head, u8 index, u8 value);
/* VGA indexed port access dispatcher */ /* VGA indexed port access dispatcher */
u8 nv_rdvgai(void *obj, int head, u16 port, u8 index); u8 nvkm_rdvgai(struct nvkm_device *, int head, u16 port, u8 index);
void nv_wrvgai(void *obj, int head, u16 port, u8 index, u8 value); void nvkm_wrvgai(struct nvkm_device *, int head, u16 port, u8 index, u8 value);
bool nv_lockvgac(void *obj, bool lock); bool nvkm_lockvgac(struct nvkm_device *, bool lock);
u8 nv_rdvgaowner(void *obj); u8 nvkm_rdvgaowner(struct nvkm_device *);
void nv_wrvgaowner(void *obj, u8); void nvkm_wrvgaowner(struct nvkm_device *, u8);
#endif #endif

105
drivers/gpu/drm/nouveau/nvkm/engine/disp/vga.c
View File

@ -24,10 +24,8 @@
#include <subdev/vga.h> #include <subdev/vga.h>
u8 u8
nv_rdport(void *obj, int head, u16 port) nvkm_rdport(struct nvkm_device *device, int head, u16 port)
{ {
struct nvkm_device *device = nv_device(obj);
if (device->card_type >= NV_50) if (device->card_type >= NV_50)
return nvkm_rd08(device, 0x601000 + port); return nvkm_rd08(device, 0x601000 + port);
@ -48,10 +46,8 @@ nv_rdport(void *obj, int head, u16 port)
} }
void void
nv_wrport(void *obj, int head, u16 port, u8 data) nvkm_wrport(struct nvkm_device *device, int head, u16 port, u8 data)
{ {
struct nvkm_device *device = nv_device(obj);
if (device->card_type >= NV_50) if (device->card_type >= NV_50)
nvkm_wr08(device, 0x601000 + port, data); nvkm_wr08(device, 0x601000 + port, data);
else else
@ -70,78 +66,76 @@ nv_wrport(void *obj, int head, u16 port, u8 data)
} }
u8 u8
nv_rdvgas(void *obj, int head, u8 index) nvkm_rdvgas(struct nvkm_device *device, int head, u8 index)
{ {
nv_wrport(obj, head, 0x03c4, index); nvkm_wrport(device, head, 0x03c4, index);
return nv_rdport(obj, head, 0x03c5); return nvkm_rdport(device, head, 0x03c5);
} }
void void
nv_wrvgas(void *obj, int head, u8 index, u8 value) nvkm_wrvgas(struct nvkm_device *device, int head, u8 index, u8 value)
{ {
nv_wrport(obj, head, 0x03c4, index); nvkm_wrport(device, head, 0x03c4, index);
nv_wrport(obj, head, 0x03c5, value); nvkm_wrport(device, head, 0x03c5, value);
} }
u8 u8
nv_rdvgag(void *obj, int head, u8 index) nvkm_rdvgag(struct nvkm_device *device, int head, u8 index)
{ {
nv_wrport(obj, head, 0x03ce, index); nvkm_wrport(device, head, 0x03ce, index);
return nv_rdport(obj, head, 0x03cf); return nvkm_rdport(device, head, 0x03cf);
} }
void void
nv_wrvgag(void *obj, int head, u8 index, u8 value) nvkm_wrvgag(struct nvkm_device *device, int head, u8 index, u8 value)
{ {
nv_wrport(obj, head, 0x03ce, index); nvkm_wrport(device, head, 0x03ce, index);
nv_wrport(obj, head, 0x03cf, value); nvkm_wrport(device, head, 0x03cf, value);
} }
u8 u8
nv_rdvgac(void *obj, int head, u8 index) nvkm_rdvgac(struct nvkm_device *device, int head, u8 index)
{ {
nv_wrport(obj, head, 0x03d4, index); nvkm_wrport(device, head, 0x03d4, index);
return nv_rdport(obj, head, 0x03d5); return nvkm_rdport(device, head, 0x03d5);
} }
void void
nv_wrvgac(void *obj, int head, u8 index, u8 value) nvkm_wrvgac(struct nvkm_device *device, int head, u8 index, u8 value)
{ {
nv_wrport(obj, head, 0x03d4, index); nvkm_wrport(device, head, 0x03d4, index);
nv_wrport(obj, head, 0x03d5, value); nvkm_wrport(device, head, 0x03d5, value);
} }
u8 u8
nv_rdvgai(void *obj, int head, u16 port, u8 index) nvkm_rdvgai(struct nvkm_device *device, int head, u16 port, u8 index)
{ {
if (port == 0x03c4) return nv_rdvgas(obj, head, index); if (port == 0x03c4) return nvkm_rdvgas(device, head, index);
if (port == 0x03ce) return nv_rdvgag(obj, head, index); if (port == 0x03ce) return nvkm_rdvgag(device, head, index);
if (port == 0x03d4) return nv_rdvgac(obj, head, index); if (port == 0x03d4) return nvkm_rdvgac(device, head, index);
return 0x00; return 0x00;
} }
void void
nv_wrvgai(void *obj, int head, u16 port, u8 index, u8 value) nvkm_wrvgai(struct nvkm_device *device, int head, u16 port, u8 index, u8 value)
{ {
if (port == 0x03c4) nv_wrvgas(obj, head, index, value); if (port == 0x03c4) nvkm_wrvgas(device, head, index, value);
else if (port == 0x03ce) nv_wrvgag(obj, head, index, value); else if (port == 0x03ce) nvkm_wrvgag(device, head, index, value);
else if (port == 0x03d4) nv_wrvgac(obj, head, index, value); else if (port == 0x03d4) nvkm_wrvgac(device, head, index, value);
} }
bool bool
nv_lockvgac(void *obj, bool lock) nvkm_lockvgac(struct nvkm_device *device, bool lock)
{ {
struct nvkm_device *device = nv_device(obj); bool locked = !nvkm_rdvgac(device, 0, 0x1f);
bool locked = !nv_rdvgac(obj, 0, 0x1f);
u8 data = lock ? 0x99 : 0x57; u8 data = lock ? 0x99 : 0x57;
if (device->card_type < NV_50) if (device->card_type < NV_50)
nv_wrvgac(obj, 0, 0x1f, data); nvkm_wrvgac(device, 0, 0x1f, data);
else else
nv_wrvgac(obj, 0, 0x3f, data); nvkm_wrvgac(device, 0, 0x3f, data);
if (device->chipset == 0x11) { if (device->chipset == 0x11) {
if (!(nvkm_rd32(device, 0x001084) & 0x10000000)) if (!(nvkm_rd32(device, 0x001084) & 0x10000000))
nv_wrvgac(obj, 1, 0x1f, data); nvkm_wrvgac(device, 1, 0x1f, data);
} }
return locked; return locked;
} }
@ -165,17 +159,16 @@ nv_lockvgac(void *obj, bool lock)
* other values are treated as literal values to set * other values are treated as literal values to set
*/ */
u8 u8
nv_rdvgaowner(void *obj) nvkm_rdvgaowner(struct nvkm_device *device)
{ {
struct nvkm_device *device = nv_device(obj);
if (device->card_type < NV_50) { if (device->card_type < NV_50) {
if (nv_device(obj)->chipset == 0x11) { if (device->chipset == 0x11) {
u32 tied = nvkm_rd32(device, 0x001084) & 0x10000000; u32 tied = nvkm_rd32(device, 0x001084) & 0x10000000;
if (tied == 0) { if (tied == 0) {
u8 slA = nv_rdvgac(obj, 0, 0x28) & 0x80; u8 slA = nvkm_rdvgac(device, 0, 0x28) & 0x80;
u8 tvA = nv_rdvgac(obj, 0, 0x33) & 0x01; u8 tvA = nvkm_rdvgac(device, 0, 0x33) & 0x01;
u8 slB = nv_rdvgac(obj, 1, 0x28) & 0x80; u8 slB = nvkm_rdvgac(device, 1, 0x28) & 0x80;
u8 tvB = nv_rdvgac(obj, 1, 0x33) & 0x01; u8 tvB = nvkm_rdvgac(device, 1, 0x33) & 0x01;
if (slA && !tvA) return 0x00; if (slA && !tvA) return 0x00;
if (slB && !tvB) return 0x03; if (slB && !tvB) return 0x03;
if (slA) return 0x00; if (slA) return 0x00;
@ -185,28 +178,28 @@ nv_rdvgaowner(void *obj)
return 0x04; return 0x04;
} }
return nv_rdvgac(obj, 0, 0x44); return nvkm_rdvgac(device, 0, 0x44);
} }
return 0x00; return 0x00;
} }
void void
nv_wrvgaowner(void *obj, u8 select) nvkm_wrvgaowner(struct nvkm_device *device, u8 select)
{ {
if (nv_device(obj)->card_type < NV_50) { if (device->card_type < NV_50) {
u8 owner = (select == 1) ? 3 : select; u8 owner = (select == 1) ? 3 : select;
if (nv_device(obj)->chipset == 0x11) { if (device->chipset == 0x11) {
/* workaround hw lockup bug */ /* workaround hw lockup bug */
nv_rdvgac(obj, 0, 0x1f); nvkm_rdvgac(device, 0, 0x1f);
nv_rdvgac(obj, 1, 0x1f); nvkm_rdvgac(device, 1, 0x1f);
} }
nv_wrvgac(obj, 0, 0x44, owner); nvkm_wrvgac(device, 0, 0x44, owner);
if (nv_device(obj)->chipset == 0x11) { if (device->chipset == 0x11) {
nv_wrvgac(obj, 0, 0x2e, owner); nvkm_wrvgac(device, 0, 0x2e, owner);
nv_wrvgac(obj, 0, 0x2e, owner); nvkm_wrvgac(device, 0, 0x2e, owner);
} }
} }
} }

14
drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c
View File

@ -214,7 +214,7 @@ static u8
init_rdport(struct nvbios_init *init, u16 port) init_rdport(struct nvbios_init *init, u16 port)
{ {
if (init_exec(init)) if (init_exec(init))
return nv_rdport(init->subdev, init->crtc, port); return nvkm_rdport(init->subdev->device, init->crtc, port);
return 0x00; return 0x00;
} }
@ -222,7 +222,7 @@ static void
init_wrport(struct nvbios_init *init, u16 port, u8 value) init_wrport(struct nvbios_init *init, u16 port, u8 value)
{ {
if (init_exec(init)) if (init_exec(init))
nv_wrport(init->subdev, init->crtc, port, value); nvkm_wrport(init->subdev->device, init->crtc, port, value);
} }
static u8 static u8
@ -231,7 +231,7 @@ init_rdvgai(struct nvbios_init *init, u16 port, u8 index)
struct nvkm_subdev *subdev = init->subdev; struct nvkm_subdev *subdev = init->subdev;
if (init_exec(init)) { if (init_exec(init)) {
int head = init->crtc < 0 ? 0 : init->crtc; int head = init->crtc < 0 ? 0 : init->crtc;
return nv_rdvgai(subdev, head, port, index); return nvkm_rdvgai(subdev->device, head, port, index);
} }
return 0x00; return 0x00;
} }
@ -239,19 +239,21 @@ init_rdvgai(struct nvbios_init *init, u16 port, u8 index)
static void static void
init_wrvgai(struct nvbios_init *init, u16 port, u8 index, u8 value) init_wrvgai(struct nvbios_init *init, u16 port, u8 index, u8 value)
{ {
struct nvkm_device *device = init->subdev->device;
/* force head 0 for updates to cr44, it only exists on first head */ /* force head 0 for updates to cr44, it only exists on first head */
if (nv_device(init->subdev)->card_type < NV_50) { if (device->card_type < NV_50) {
if (port == 0x03d4 && index == 0x44) if (port == 0x03d4 && index == 0x44)
init->crtc = 0; init->crtc = 0;
} }
if (init_exec(init)) { if (init_exec(init)) {
int head = init->crtc < 0 ? 0 : init->crtc; int head = init->crtc < 0 ? 0 : init->crtc;
nv_wrvgai(init->subdev, head, port, index, value); nvkm_wrvgai(device, head, port, index, value);
} }
/* select head 1 if cr44 write selected it */ /* select head 1 if cr44 write selected it */
if (nv_device(init->subdev)->card_type < NV_50) { if (device->card_type < NV_50) {
if (port == 0x03d4 && index == 0x44 && value == 3) if (port == 0x03d4 && index == 0x44 && value == 3)
init->crtc = 1; init->crtc = 1;
} }

2
drivers/gpu/drm/nouveau/nvkm/subdev/bios/pll.c
View File

@ -367,7 +367,7 @@ nvbios_pll_parse(struct nvkm_bios *bios, u32 type, struct nvbios_pll *info)
u32 sel_clk = nvkm_rd32(device, 0x680524); u32 sel_clk = nvkm_rd32(device, 0x680524);
if ((info->reg == 0x680508 && sel_clk & 0x20) || if ((info->reg == 0x680508 && sel_clk & 0x20) ||
(info->reg == 0x680520 && sel_clk & 0x80)) { (info->reg == 0x680520 && sel_clk & 0x80)) {
if (nv_rdvgac(bios, 0, 0x27) < 0xa3) if (nvkm_rdvgac(device, 0, 0x27) < 0xa3)
info->refclk = 200000; info->refclk = 200000;
else else
info->refclk = 25000; info->refclk = 25000;

4
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/base.c
View File

@ -36,7 +36,7 @@ _nvkm_devinit_fini(struct nvkm_object *object, bool suspend)
init->post = true; init->post = true;
/* unlock the extended vga crtc regs */ /* unlock the extended vga crtc regs */
nv_lockvgac(init, false); nvkm_lockvgac(init->subdev.device, false);
return nvkm_subdev_fini(&init->subdev, suspend); return nvkm_subdev_fini(&init->subdev, suspend);
} }
@ -67,7 +67,7 @@ _nvkm_devinit_dtor(struct nvkm_object *object)
struct nvkm_devinit *init = (void *)object; struct nvkm_devinit *init = (void *)object;
/* lock crtc regs */ /* lock crtc regs */
nv_lockvgac(init, true); nvkm_lockvgac(init->subdev.device, true);
nvkm_subdev_destroy(&init->subdev); nvkm_subdev_destroy(&init->subdev);
} }

21
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c
View File

@ -49,7 +49,7 @@ nv04_devinit_meminit(struct nvkm_devinit *init)
} }
/* Sequencer and refresh off */ /* Sequencer and refresh off */
nv_wrvgas(init, 0, 1, nv_rdvgas(init, 0, 1) | 0x20); nvkm_wrvgas(device, 0, 1, nvkm_rdvgas(device, 0, 1) | 0x20);
nvkm_mask(device, NV04_PFB_DEBUG_0, 0, NV04_PFB_DEBUG_0_REFRESH_OFF); nvkm_mask(device, NV04_PFB_DEBUG_0, 0, NV04_PFB_DEBUG_0_REFRESH_OFF);
nvkm_mask(device, NV04_PFB_BOOT_0, ~0, nvkm_mask(device, NV04_PFB_BOOT_0, ~0,
@ -105,7 +105,7 @@ nv04_devinit_meminit(struct nvkm_devinit *init)
/* Refresh on, sequencer on */ /* Refresh on, sequencer on */
nvkm_mask(device, NV04_PFB_DEBUG_0, NV04_PFB_DEBUG_0_REFRESH_OFF, 0); nvkm_mask(device, NV04_PFB_DEBUG_0, NV04_PFB_DEBUG_0_REFRESH_OFF, 0);
nv_wrvgas(init, 0, 1, nv_rdvgas(init, 0, 1) & ~0x20); nvkm_wrvgas(device, 0, 1, nvkm_rdvgas(device, 0, 1) & ~0x20);
fbmem_fini(fb); fbmem_fini(fb);
} }
@ -406,8 +406,8 @@ nv04_devinit_fini(struct nvkm_object *object, bool suspend)
/* unslave crtcs */ /* unslave crtcs */
if (init->owner < 0) if (init->owner < 0)
init->owner = nv_rdvgaowner(init); init->owner = nvkm_rdvgaowner(device);
nv_wrvgaowner(init, 0); nvkm_wrvgaowner(device, 0);
return 0; return 0;
} }
@ -416,13 +416,14 @@ nv04_devinit_init(struct nvkm_object *object)
{ {
struct nv04_devinit *init = (void *)object; struct nv04_devinit *init = (void *)object;
struct nvkm_subdev *subdev = &init->base.subdev; struct nvkm_subdev *subdev = &init->base.subdev;
struct nvkm_device *device = subdev->device;
if (!init->base.post) { if (!init->base.post) {
u32 htotal = nv_rdvgac(init, 0, 0x06); u32 htotal = nvkm_rdvgac(device, 0, 0x06);
htotal |= (nv_rdvgac(init, 0, 0x07) & 0x01) << 8; htotal |= (nvkm_rdvgac(device, 0, 0x07) & 0x01) << 8;
htotal |= (nv_rdvgac(init, 0, 0x07) & 0x20) << 4; htotal |= (nvkm_rdvgac(device, 0, 0x07) & 0x20) << 4;
htotal |= (nv_rdvgac(init, 0, 0x25) & 0x01) << 10; htotal |= (nvkm_rdvgac(device, 0, 0x25) & 0x01) << 10;
htotal |= (nv_rdvgac(init, 0, 0x41) & 0x01) << 11; htotal |= (nvkm_rdvgac(device, 0, 0x41) & 0x01) << 11;
if (!htotal) { if (!htotal) {
nvkm_debug(subdev, "adaptor not initialised\n"); nvkm_debug(subdev, "adaptor not initialised\n");
init->base.post = true; init->base.post = true;
@ -438,7 +439,7 @@ nv04_devinit_dtor(struct nvkm_object *object)
struct nv04_devinit *init = (void *)object; struct nv04_devinit *init = (void *)object;
/* restore vga owner saved at first init */ /* restore vga owner saved at first init */
nv_wrvgaowner(init, init->owner); nvkm_wrvgaowner(init->base.subdev.device, init->owner);
nvkm_devinit_destroy(&init->base); nvkm_devinit_destroy(&init->base);
} }

4
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv05.c
View File

@ -70,7 +70,7 @@ nv05_devinit_meminit(struct nvkm_devinit *init)
} }
/* Sequencer off */ /* Sequencer off */
nv_wrvgas(init, 0, 1, nv_rdvgas(init, 0, 1) | 0x20); nvkm_wrvgas(device, 0, 1, nvkm_rdvgas(device, 0, 1) | 0x20);
if (nvkm_rd32(device, NV04_PFB_BOOT_0) & NV04_PFB_BOOT_0_UMA_ENABLE) if (nvkm_rd32(device, NV04_PFB_BOOT_0) & NV04_PFB_BOOT_0_UMA_ENABLE)
goto out; goto out;
@ -122,7 +122,7 @@ nv05_devinit_meminit(struct nvkm_devinit *init)
out: out:
/* Sequencer on */ /* Sequencer on */
nv_wrvgas(init, 0, 1, nv_rdvgas(init, 0, 1) & ~0x20); nvkm_wrvgas(device, 0, 1, nvkm_rdvgas(device, 0, 1) & ~0x20);
fbmem_fini(fb); fbmem_fini(fb);
} }

4
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c
View File

@ -105,8 +105,8 @@ nv50_devinit_init(struct nvkm_object *object)
int ret, i = 0; int ret, i = 0;
if (!init->base.post) { if (!init->base.post) {
if (!nv_rdvgac(init, 0, 0x00) && if (!nvkm_rdvgac(device, 0, 0x00) &&
!nv_rdvgac(init, 0, 0x1a)) { !nvkm_rdvgac(device, 0, 0x1a)) {
nvkm_debug(subdev, "adaptor not initialised\n"); nvkm_debug(subdev, "adaptor not initialised\n");
init->base.post = true; init->base.post = true;
} }

20
drivers/gpu/drm/nouveau/nvkm/subdev/i2c/nv04.c
View File

@ -34,39 +34,39 @@ struct nv04_i2c_port {
static void static void
nv04_i2c_drive_scl(struct nvkm_i2c_port *base, int state) nv04_i2c_drive_scl(struct nvkm_i2c_port *base, int state)
{ {
struct nvkm_i2c *i2c = (void *)nvkm_i2c(base); struct nvkm_device *device = nvkm_i2c(base)->subdev.device;
struct nv04_i2c_port *port = (void *)base; struct nv04_i2c_port *port = (void *)base;
u8 val = nv_rdvgac(i2c, 0, port->drive); u8 val = nvkm_rdvgac(device, 0, port->drive);
if (state) val |= 0x20; if (state) val |= 0x20;
else val &= 0xdf; else val &= 0xdf;
nv_wrvgac(i2c, 0, port->drive, val | 0x01); nvkm_wrvgac(device, 0, port->drive, val | 0x01);
} }
static void static void
nv04_i2c_drive_sda(struct nvkm_i2c_port *base, int state) nv04_i2c_drive_sda(struct nvkm_i2c_port *base, int state)
{ {
struct nvkm_i2c *i2c = (void *)nvkm_i2c(base); struct nvkm_device *device = nvkm_i2c(base)->subdev.device;
struct nv04_i2c_port *port = (void *)base; struct nv04_i2c_port *port = (void *)base;
u8 val = nv_rdvgac(i2c, 0, port->drive); u8 val = nvkm_rdvgac(device, 0, port->drive);
if (state) val |= 0x10; if (state) val |= 0x10;
else val &= 0xef; else val &= 0xef;
nv_wrvgac(i2c, 0, port->drive, val | 0x01); nvkm_wrvgac(device, 0, port->drive, val | 0x01);
} }
static int static int
nv04_i2c_sense_scl(struct nvkm_i2c_port *base) nv04_i2c_sense_scl(struct nvkm_i2c_port *base)
{ {
struct nvkm_i2c *i2c = (void *)nvkm_i2c(base); struct nvkm_device *device = nvkm_i2c(base)->subdev.device;
struct nv04_i2c_port *port = (void *)base; struct nv04_i2c_port *port = (void *)base;
return !!(nv_rdvgac(i2c, 0, port->sense) & 0x04); return !!(nvkm_rdvgac(device, 0, port->sense) & 0x04);
} }
static int static int
nv04_i2c_sense_sda(struct nvkm_i2c_port *base) nv04_i2c_sense_sda(struct nvkm_i2c_port *base)
{ {
struct nvkm_i2c *i2c = (void *)nvkm_i2c(base); struct nvkm_device *device = nvkm_i2c(base)->subdev.device;
struct nv04_i2c_port *port = (void *)base; struct nv04_i2c_port *port = (void *)base;
return !!(nv_rdvgac(i2c, 0, port->sense) & 0x08); return !!(nvkm_rdvgac(device, 0, port->sense) & 0x08);
} }
static const struct nvkm_i2c_func static const struct nvkm_i2c_func