i2c: tegra: Better handle case where CPU0 is busy for a long time
Boot CPU0 always handle I2C interrupt and under some rare circumstances (like running KASAN + NFS root) it may stuck in uninterruptible state for a significant time. In this case we will get timeout if I2C transfer is running on a sibling CPU, despite of IRQ being raised. In order to handle this rare condition, the IRQ status needs to be checked after completion timeout. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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@ -996,14 +996,13 @@ tegra_i2c_poll_completion_timeout(struct tegra_i2c_dev *i2c_dev,
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do {
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u32 status = i2c_readl(i2c_dev, I2C_INT_STATUS);
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if (status) {
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if (status)
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tegra_i2c_isr(i2c_dev->irq, i2c_dev);
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if (completion_done(complete)) {
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s64 delta = ktime_ms_delta(ktimeout, ktime);
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if (completion_done(complete)) {
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s64 delta = ktime_ms_delta(ktimeout, ktime);
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return msecs_to_jiffies(delta) ?: 1;
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}
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return msecs_to_jiffies(delta) ?: 1;
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}
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ktime = ktime_get();
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@ -1030,14 +1029,18 @@ tegra_i2c_wait_completion_timeout(struct tegra_i2c_dev *i2c_dev,
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disable_irq(i2c_dev->irq);
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/*
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* There is a chance that completion may happen after IRQ
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* synchronization, which is done by disable_irq().
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* Under some rare circumstances (like running KASAN +
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* NFS root) CPU, which handles interrupt, may stuck in
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* uninterruptible state for a significant time. In this
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* case we will get timeout if I2C transfer is running on
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* a sibling CPU, despite of IRQ being raised.
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*
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* In order to handle this rare condition, the IRQ status
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* needs to be checked after timeout.
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*/
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if (ret == 0 && completion_done(complete)) {
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dev_warn(i2c_dev->dev,
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"completion done after timeout\n");
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ret = 1;
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}
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if (ret == 0)
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ret = tegra_i2c_poll_completion_timeout(i2c_dev,
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complete, 0);
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}
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return ret;
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