redonkable/alistair23-linux
redonkable/alistair23-linux
1
0
Fork 0
Code Releases Activity

goldfish: clean up the pipe driver 64bit ifdefs

Browse source 
Use the 64bit helper method to scrub most of the ifdefs from the driver. The
pipe reading has a funny case we can't scrub completely.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Alan 2014-05-12 16:57:22 +01:00 committed by Greg Kroah-Hartman
parent d78055dc9c
commit a99698facd
1 changed files with 11 additions and 22 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

29
drivers/platform/goldfish/goldfish_pipe.c
View file

@ -56,6 +56,7 @@
#include <linux/bitops.h> #include <linux/bitops.h>
#include <linux/slab.h> #include <linux/slab.h>
#include <linux/io.h> #include <linux/io.h>
#include <linux/goldfish.h>
/* /*
* IMPORTANT: The following constants must match the ones used and defined * IMPORTANT: The following constants must match the ones used and defined
@ -66,14 +67,10 @@
#define PIPE_REG_COMMAND 0x00 /* write: value = command */ #define PIPE_REG_COMMAND 0x00 /* write: value = command */
#define PIPE_REG_STATUS 0x04 /* read */ #define PIPE_REG_STATUS 0x04 /* read */
#define PIPE_REG_CHANNEL 0x08 /* read/write: channel id */ #define PIPE_REG_CHANNEL 0x08 /* read/write: channel id */
#ifdef CONFIG_64BIT
#define PIPE_REG_CHANNEL_HIGH 0x30 /* read/write: channel id */ #define PIPE_REG_CHANNEL_HIGH 0x30 /* read/write: channel id */
#endif
#define PIPE_REG_SIZE 0x0c /* read/write: buffer size */ #define PIPE_REG_SIZE 0x0c /* read/write: buffer size */
#define PIPE_REG_ADDRESS 0x10 /* write: physical address */ #define PIPE_REG_ADDRESS 0x10 /* write: physical address */
#ifdef CONFIG_64BIT
#define PIPE_REG_ADDRESS_HIGH 0x34 /* write: physical address */ #define PIPE_REG_ADDRESS_HIGH 0x34 /* write: physical address */
#endif
#define PIPE_REG_WAKES 0x14 /* read: wake flags */ #define PIPE_REG_WAKES 0x14 /* read: wake flags */
#define PIPE_REG_PARAMS_ADDR_LOW 0x18 /* read/write: batch data address */ #define PIPE_REG_PARAMS_ADDR_LOW 0x18 /* read/write: batch data address */
#define PIPE_REG_PARAMS_ADDR_HIGH 0x1c /* read/write: batch data address */ #define PIPE_REG_PARAMS_ADDR_HIGH 0x1c /* read/write: batch data address */
@ -161,10 +158,8 @@ static u32 goldfish_cmd_status(struct goldfish_pipe *pipe, u32 cmd)
struct goldfish_pipe_dev *dev = pipe->dev; struct goldfish_pipe_dev *dev = pipe->dev;
spin_lock_irqsave(&dev->lock, flags); spin_lock_irqsave(&dev->lock, flags);
writel((u32)(u64)pipe, dev->base + PIPE_REG_CHANNEL); gf_write64((u64)pipe, dev->base + PIPE_REG_CHANNEL,
#ifdef CONFIG_64BIT dev->base + PIPE_REG_CHANNEL_HIGH);
writel((u32)((u64)pipe >> 32), dev->base + PIPE_REG_CHANNEL_HIGH);
#endif
writel(cmd, dev->base + PIPE_REG_COMMAND); writel(cmd, dev->base + PIPE_REG_COMMAND);
status = readl(dev->base + PIPE_REG_STATUS); status = readl(dev->base + PIPE_REG_STATUS);
spin_unlock_irqrestore(&dev->lock, flags); spin_unlock_irqrestore(&dev->lock, flags);
@ -177,10 +172,8 @@ static void goldfish_cmd(struct goldfish_pipe *pipe, u32 cmd)
struct goldfish_pipe_dev *dev = pipe->dev; struct goldfish_pipe_dev *dev = pipe->dev;
spin_lock_irqsave(&dev->lock, flags); spin_lock_irqsave(&dev->lock, flags);
writel((u32)(u64)pipe, dev->base + PIPE_REG_CHANNEL); gf_write64((u64)pipe, dev->base + PIPE_REG_CHANNEL,
#ifdef CONFIG_64BIT dev->base + PIPE_REG_CHANNEL_HIGH);
writel((u32)((u64)pipe >> 32), dev->base + PIPE_REG_CHANNEL_HIGH);
#endif
writel(cmd, dev->base + PIPE_REG_COMMAND); writel(cmd, dev->base + PIPE_REG_COMMAND);
spin_unlock_irqrestore(&dev->lock, flags); spin_unlock_irqrestore(&dev->lock, flags);
} }
@ -334,15 +327,11 @@ static ssize_t goldfish_pipe_read_write(struct file *filp, char __user *buffer,
spin_lock_irqsave(&dev->lock, irq_flags); spin_lock_irqsave(&dev->lock, irq_flags);
if (access_with_param(dev, CMD_WRITE_BUFFER + cmd_offset, if (access_with_param(dev, CMD_WRITE_BUFFER + cmd_offset,
address, avail, pipe, &status)) { address, avail, pipe, &status)) {
writel((u32)(u64)pipe, dev->base + PIPE_REG_CHANNEL); gf_write64((u64)pipe, dev->base + PIPE_REG_CHANNEL,
#ifdef CONFIG_64BIT dev->base + PIPE_REG_CHANNEL_HIGH);
writel((u32)((u64)pipe >> 32), dev->base + PIPE_REG_CHANNEL_HIGH);
#endif
writel(avail, dev->base + PIPE_REG_SIZE); writel(avail, dev->base + PIPE_REG_SIZE);
writel(address, dev->base + PIPE_REG_ADDRESS); gf_write64(address, dev->base + PIPE_REG_ADDRESS,
#ifdef CONFIG_64BIT dev->base + PIPE_REG_ADDRESS_HIGH);
writel((u32)((u64)address >> 32), dev->base + PIPE_REG_ADDRESS_HIGH);
#endif
writel(CMD_WRITE_BUFFER + cmd_offset, writel(CMD_WRITE_BUFFER + cmd_offset,
dev->base + PIPE_REG_COMMAND); dev->base + PIPE_REG_COMMAND);
status = readl(dev->base + PIPE_REG_STATUS); status = readl(dev->base + PIPE_REG_STATUS);