From a9efeca613a8fe5281d7c91f5c8c9ea46f2312f6 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 21 Aug 2015 20:02:26 +0200 Subject: [PATCH] serial: sh-sci: Prevent compiler warnings on 64-bit Expressions involving "BIT(...)" create values of type "long", which is 64-bit on 64-bit. Hence "~BIT(...)" no longer fits in 32-bit, which will cause future compiler warnings when assigning to 32-bit variables: drivers/tty/serial/sh-sci.c: In function 'sci_init_single': drivers/tty/serial/sh-sci.h:58:25: warning: large integer implicitly truncated to unsigned type [-Woverflow] #define SCI_ERROR_CLEAR ~(SCI_RESERVED | SCI_PER | SCI_FER | SCI_ORER) ^ drivers/tty/serial/sh-sci.c:2325:27: note: in expansion of macro 'SCI_ERROR_CLEAR' sci_port->error_clear = SCI_ERROR_CLEAR; As these values are (at most) 32-bit register values anyway, cast them to "u32" at the definition level to prevent such compiler warnings. Reported-by: kbuild test robot Signed-off-by: Geert Uytterhoeven Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/sh-sci.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/tty/serial/sh-sci.h b/drivers/tty/serial/sh-sci.h index 1e1edbd15267..fe7108bc022a 100644 --- a/drivers/tty/serial/sh-sci.h +++ b/drivers/tty/serial/sh-sci.h @@ -54,10 +54,10 @@ enum { #define SCI_DEFAULT_ERROR_MASK (SCI_PER | SCI_FER) -#define SCI_RDxF_CLEAR ~(SCI_RESERVED | SCI_RDRF) -#define SCI_ERROR_CLEAR ~(SCI_RESERVED | SCI_PER | SCI_FER | SCI_ORER) -#define SCI_TDxE_CLEAR ~(SCI_RESERVED | SCI_TEND | SCI_TDRE) -#define SCI_BREAK_CLEAR ~(SCI_RESERVED | SCI_PER | SCI_FER | SCI_ORER) +#define SCI_RDxF_CLEAR (u32)(~(SCI_RESERVED | SCI_RDRF)) +#define SCI_ERROR_CLEAR (u32)(~(SCI_RESERVED | SCI_PER | SCI_FER | SCI_ORER)) +#define SCI_TDxE_CLEAR (u32)(~(SCI_RESERVED | SCI_TEND | SCI_TDRE)) +#define SCI_BREAK_CLEAR (u32)(~(SCI_RESERVED | SCI_PER | SCI_FER | SCI_ORER)) /* SCxSR (Serial Status Register) on SCIF, SCIFA, SCIFB, HSCIF */ #define SCIF_ER BIT(7) /* Receive Error */ @@ -76,10 +76,10 @@ enum { #define SCIF_DEFAULT_ERROR_MASK (SCIF_PER | SCIF_FER | SCIF_BRK | SCIF_ER) -#define SCIF_RDxF_CLEAR ~(SCIF_DR | SCIF_RDF) -#define SCIF_ERROR_CLEAR ~(SCIFA_ORER | SCIF_PER | SCIF_FER | SCIF_ER) -#define SCIF_TDxE_CLEAR ~(SCIF_TDFE) -#define SCIF_BREAK_CLEAR ~(SCIF_PER | SCIF_FER | SCIF_BRK) +#define SCIF_RDxF_CLEAR (u32)(~(SCIF_DR | SCIF_RDF)) +#define SCIF_ERROR_CLEAR (u32)(~(SCIFA_ORER | SCIF_PER | SCIF_FER | SCIF_ER)) +#define SCIF_TDxE_CLEAR (u32)(~(SCIF_TDFE)) +#define SCIF_BREAK_CLEAR (u32)(~(SCIF_PER | SCIF_FER | SCIF_BRK)) /* SCFCR (FIFO Control Register) */ #define SCFCR_MCE BIT(3) /* Modem Control Enable */