ASoC: dt-bindings: tegra: Add json-schema for Tegra audio graph card
Add YAML schema for Tegra audio graph sound card DT bindings. It uses the same DT bindings provided by generic audio graph driver. Along with this few standard clock DT bindings are added which are specifically required for Tegra audio. Signed-off-by: Sameer Pujar <spujar@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Link: https://lore.kernel.org/r/1611048496-24650-3-git-send-email-spujar@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
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Sameer Pujar
Mark Brown
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-graph-card.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Audio Graph based Tegra sound card driver
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description: |
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This is based on generic audio graph card driver along with additional
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customizations for Tegra platforms. It uses the same bindings with
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additional standard clock DT bindings required for Tegra.
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maintainers:
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- Jon Hunter <jonathanh@nvidia.com>
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- Sameer Pujar <spujar@nvidia.com>
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allOf:
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- $ref: audio-graph.yaml#
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properties:
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compatible:
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enum:
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- nvidia,tegra210-audio-graph-card
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- nvidia,tegra186-audio-graph-card
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clocks:
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minItems: 2
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clock-names:
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minItems: 2
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items:
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- const: pll_a
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- const: plla_out0
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assigned-clocks:
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minItems: 1
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maxItems: 3
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assigned-clock-parents:
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minItems: 1
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maxItems: 3
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assigned-clock-rates:
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minItems: 1
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maxItems: 3
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required:
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- clocks
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- clock-names
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- assigned-clocks
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- assigned-clock-parents
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unevaluatedProperties: false
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examples:
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- |
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#include<dt-bindings/clock/tegra210-car.h>
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tegra_sound {
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compatible = "nvidia,tegra210-audio-graph-card";
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clocks = <&tegra_car TEGRA210_CLK_PLL_A>,
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<&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
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clock-names = "pll_a", "plla_out0";
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assigned-clocks = <&tegra_car TEGRA210_CLK_PLL_A>,
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<&tegra_car TEGRA210_CLK_PLL_A_OUT0>,
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<&tegra_car TEGRA210_CLK_EXTERN1>;
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assigned-clock-parents = <0>, <0>, <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
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assigned-clock-rates = <368640000>, <49152000>, <12288000>;
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dais = /* FE */
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<&admaif1_port>,
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/* Router */
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<&xbar_i2s1_port>,
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/* I/O DAP Ports */
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<&i2s1_port>;
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label = "jetson-tx1-ape";
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};
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// The ports are defined for AHUB and its child devices.
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ahub@702d0800 {
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compatible = "nvidia,tegra210-ahub";
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reg = <0x702d0800 0x800>;
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clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
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clock-names = "ahub";
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assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
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assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x702d0000 0x702d0000 0x0000e400>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0x0>;
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xbar_admaif1_ep: endpoint {
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remote-endpoint = <&admaif1_ep>;
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};
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};
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// ...
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xbar_i2s1_port: port@a {
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reg = <0xa>;
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xbar_i2s1_ep: endpoint {
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remote-endpoint = <&i2s1_cif_ep>;
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};
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};
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};
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admaif@702d0000 {
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compatible = "nvidia,tegra210-admaif";
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reg = <0x702d0000 0x800>;
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dmas = <&adma 1>, <&adma 1>,
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<&adma 2>, <&adma 2>,
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<&adma 3>, <&adma 3>,
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<&adma 4>, <&adma 4>,
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<&adma 5>, <&adma 5>,
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<&adma 6>, <&adma 6>,
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<&adma 7>, <&adma 7>,
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<&adma 8>, <&adma 8>,
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<&adma 9>, <&adma 9>,
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<&adma 10>, <&adma 10>;
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dma-names = "rx1", "tx1",
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"rx2", "tx2",
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"rx3", "tx3",
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"rx4", "tx4",
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"rx5", "tx5",
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"rx6", "tx6",
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"rx7", "tx7",
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"rx8", "tx8",
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"rx9", "tx9",
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"rx10", "tx10";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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admaif1_port: port@0 {
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reg = <0x0>;
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admaif1_ep: endpoint {
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remote-endpoint = <&xbar_admaif1_ep>;
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};
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};
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// More ADMAIF ports to follow
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};
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};
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i2s@702d1000 {
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compatible = "nvidia,tegra210-i2s";
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clocks = <&tegra_car TEGRA210_CLK_I2S0>;
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clock-names = "i2s";
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assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
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assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
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assigned-clock-rates = <1536000>;
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reg = <0x702d1000 0x100>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0x0>;
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i2s1_cif_ep: endpoint {
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remote-endpoint = <&xbar_i2s1_ep>;
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};
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};
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i2s1_port: port@1 {
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reg = <0x1>;
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i2s1_dap: endpoint {
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dai-format = "i2s";
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};
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};
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};
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};
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};
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...
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