mmc: sh_mmcif: switch to completion, fix flags
In sh_mmcif.c an event is used as a completion, switch over. When a wait_for_completion*_timeout() returns, it suffices to check the remaining time, setting an additional flag before waking up the waiting task only reduces the race window, but does not eliminate it. This patch switches the driver to use a completion to signal an interrupt, the only case, when an interrupt should not wake up the waiter, is when an automatic CMD12 completes. Also fix MODULE_ALIAS. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>hifive-unleashed-5.1
Guennadi Liakhovetski
Paul Mundt
parent
2d3e4e7652
commit
aa0787a90c
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@ -16,6 +16,8 @@
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*
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*/
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#include <linux/clk.h>
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#include <linux/completion.h>
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#include <linux/dma-mapping.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/card.h>
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@ -24,7 +26,6 @@
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#include <linux/mmc/sdio.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/mmc/sh_mmcif.h>
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#define DRIVER_NAME "sh_mmcif"
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@ -158,11 +159,10 @@ struct sh_mmcif_host {
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struct clk *hclk;
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unsigned int clk;
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int bus_width;
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u16 wait_int;
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u16 sd_error;
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bool sd_error;
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long timeout;
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void __iomem *addr;
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wait_queue_head_t intr_wait;
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struct completion intr_wait;
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};
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@ -216,8 +216,7 @@ static int sh_mmcif_error_manage(struct sh_mmcif_host *host)
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u32 state1, state2;
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int ret, timeout = 10000000;
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host->sd_error = 0;
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host->wait_int = 0;
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host->sd_error = false;
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state1 = sh_mmcif_readl(host->addr, MMCIF_CE_HOST_STS1);
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state2 = sh_mmcif_readl(host->addr, MMCIF_CE_HOST_STS2);
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@ -264,17 +263,13 @@ static int sh_mmcif_single_read(struct sh_mmcif_host *host,
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long time;
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u32 blocksize, i, *p = sg_virt(data->sg);
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host->wait_int = 0;
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/* buf read enable */
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sh_mmcif_bitset(host, MMCIF_CE_INT_MASK, MASK_MBUFREN);
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time = wait_event_interruptible_timeout(host->intr_wait,
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host->wait_int == 1 ||
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host->sd_error == 1, host->timeout);
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if (host->wait_int != 1 && (time == 0 || host->sd_error != 0))
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time = wait_for_completion_interruptible_timeout(&host->intr_wait,
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host->timeout);
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if (time <= 0 || host->sd_error)
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return sh_mmcif_error_manage(host);
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host->wait_int = 0;
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blocksize = (BLOCK_SIZE_MASK &
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sh_mmcif_readl(host->addr, MMCIF_CE_BLOCK_SET)) + 3;
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for (i = 0; i < blocksize / 4; i++)
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@ -282,13 +277,11 @@ static int sh_mmcif_single_read(struct sh_mmcif_host *host,
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/* buffer read end */
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sh_mmcif_bitset(host, MMCIF_CE_INT_MASK, MASK_MBUFRE);
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time = wait_event_interruptible_timeout(host->intr_wait,
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host->wait_int == 1 ||
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host->sd_error == 1, host->timeout);
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if (host->wait_int != 1 && (time == 0 || host->sd_error != 0))
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time = wait_for_completion_interruptible_timeout(&host->intr_wait,
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host->timeout);
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if (time <= 0 || host->sd_error)
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return sh_mmcif_error_manage(host);
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host->wait_int = 0;
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return 0;
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}
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@ -303,19 +296,15 @@ static int sh_mmcif_multi_read(struct sh_mmcif_host *host,
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MMCIF_CE_BLOCK_SET);
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for (j = 0; j < data->sg_len; j++) {
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p = sg_virt(data->sg);
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host->wait_int = 0;
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for (sec = 0; sec < data->sg->length / blocksize; sec++) {
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sh_mmcif_bitset(host, MMCIF_CE_INT_MASK, MASK_MBUFREN);
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/* buf read enable */
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time = wait_event_interruptible_timeout(host->intr_wait,
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host->wait_int == 1 ||
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host->sd_error == 1, host->timeout);
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time = wait_for_completion_interruptible_timeout(&host->intr_wait,
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host->timeout);
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if (host->wait_int != 1 &&
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(time == 0 || host->sd_error != 0))
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if (time <= 0 || host->sd_error)
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return sh_mmcif_error_manage(host);
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host->wait_int = 0;
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for (i = 0; i < blocksize / 4; i++)
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*p++ = sh_mmcif_readl(host->addr,
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MMCIF_CE_DATA);
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@ -333,17 +322,14 @@ static int sh_mmcif_single_write(struct sh_mmcif_host *host,
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long time;
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u32 blocksize, i, *p = sg_virt(data->sg);
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host->wait_int = 0;
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sh_mmcif_bitset(host, MMCIF_CE_INT_MASK, MASK_MBUFWEN);
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/* buf write enable */
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time = wait_event_interruptible_timeout(host->intr_wait,
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host->wait_int == 1 ||
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host->sd_error == 1, host->timeout);
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if (host->wait_int != 1 && (time == 0 || host->sd_error != 0))
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time = wait_for_completion_interruptible_timeout(&host->intr_wait,
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host->timeout);
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if (time <= 0 || host->sd_error)
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return sh_mmcif_error_manage(host);
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host->wait_int = 0;
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blocksize = (BLOCK_SIZE_MASK &
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sh_mmcif_readl(host->addr, MMCIF_CE_BLOCK_SET)) + 3;
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for (i = 0; i < blocksize / 4; i++)
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@ -352,13 +338,11 @@ static int sh_mmcif_single_write(struct sh_mmcif_host *host,
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/* buffer write end */
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sh_mmcif_bitset(host, MMCIF_CE_INT_MASK, MASK_MDTRANE);
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time = wait_event_interruptible_timeout(host->intr_wait,
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host->wait_int == 1 ||
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host->sd_error == 1, host->timeout);
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if (host->wait_int != 1 && (time == 0 || host->sd_error != 0))
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time = wait_for_completion_interruptible_timeout(&host->intr_wait,
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host->timeout);
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if (time <= 0 || host->sd_error)
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return sh_mmcif_error_manage(host);
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host->wait_int = 0;
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return 0;
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}
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@ -374,19 +358,15 @@ static int sh_mmcif_multi_write(struct sh_mmcif_host *host,
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for (j = 0; j < data->sg_len; j++) {
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p = sg_virt(data->sg);
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host->wait_int = 0;
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for (sec = 0; sec < data->sg->length / blocksize; sec++) {
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sh_mmcif_bitset(host, MMCIF_CE_INT_MASK, MASK_MBUFWEN);
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/* buf write enable*/
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time = wait_event_interruptible_timeout(host->intr_wait,
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host->wait_int == 1 ||
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host->sd_error == 1, host->timeout);
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time = wait_for_completion_interruptible_timeout(&host->intr_wait,
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host->timeout);
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if (host->wait_int != 1 &&
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(time == 0 || host->sd_error != 0))
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if (time <= 0 || host->sd_error)
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return sh_mmcif_error_manage(host);
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host->wait_int = 0;
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for (i = 0; i < blocksize / 4; i++)
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sh_mmcif_writel(host->addr,
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MMCIF_CE_DATA, *p++);
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@ -556,13 +536,12 @@ static void sh_mmcif_start_cmd(struct sh_mmcif_host *host,
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sh_mmcif_writel(host->addr, MMCIF_CE_INT_MASK, mask);
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/* set arg */
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sh_mmcif_writel(host->addr, MMCIF_CE_ARG, cmd->arg);
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host->wait_int = 0;
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/* set cmd */
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sh_mmcif_writel(host->addr, MMCIF_CE_CMD_SET, opc);
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time = wait_event_interruptible_timeout(host->intr_wait,
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host->wait_int == 1 || host->sd_error == 1, host->timeout);
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if (host->wait_int != 1 && time == 0) {
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time = wait_for_completion_interruptible_timeout(&host->intr_wait,
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host->timeout);
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if (time <= 0) {
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cmd->error = sh_mmcif_error_manage(host);
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return;
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}
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@ -579,19 +558,14 @@ static void sh_mmcif_start_cmd(struct sh_mmcif_host *host,
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cmd->error = sh_mmcif_error_manage(host);
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break;
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}
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host->sd_error = 0;
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host->wait_int = 0;
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host->sd_error = false;
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return;
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}
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if (!(cmd->flags & MMC_RSP_PRESENT)) {
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cmd->error = ret;
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host->wait_int = 0;
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return;
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}
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if (host->wait_int == 1) {
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sh_mmcif_get_response(host, cmd);
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host->wait_int = 0;
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}
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sh_mmcif_get_response(host, cmd);
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if (host->data) {
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ret = sh_mmcif_data_trans(host, mrq, cmd->opcode);
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if (ret < 0)
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@ -618,15 +592,13 @@ static void sh_mmcif_stop_cmd(struct sh_mmcif_host *host,
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return;
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}
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time = wait_event_interruptible_timeout(host->intr_wait,
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host->wait_int == 1 ||
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host->sd_error == 1, host->timeout);
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if (host->wait_int != 1 && (time == 0 || host->sd_error != 0)) {
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time = wait_for_completion_interruptible_timeout(&host->intr_wait,
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host->timeout);
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if (time <= 0 || host->sd_error) {
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cmd->error = sh_mmcif_error_manage(host);
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return;
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}
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sh_mmcif_get_cmd12response(host, cmd);
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host->wait_int = 0;
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cmd->error = 0;
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}
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@ -712,7 +684,7 @@ static void sh_mmcif_detect(struct mmc_host *mmc)
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static irqreturn_t sh_mmcif_intr(int irq, void *dev_id)
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{
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struct sh_mmcif_host *host = dev_id;
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u32 state = 0;
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u32 state;
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int err = 0;
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state = sh_mmcif_readl(host->addr, MMCIF_CE_INT);
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@ -757,11 +729,13 @@ static irqreturn_t sh_mmcif_intr(int irq, void *dev_id)
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err = 1;
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}
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if (err) {
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host->sd_error = 1;
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host->sd_error = true;
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pr_debug("%s: int err state = %08x\n", DRIVER_NAME, state);
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}
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host->wait_int = 1;
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wake_up(&host->intr_wait);
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if (state & ~(INT_CMD12RBE | INT_CMD12CRE))
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complete(&host->intr_wait);
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else
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dev_dbg(&host->pd->dev, "Unexpected IRQ 0x%x\n", state);
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return IRQ_HANDLED;
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}
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@ -819,7 +793,7 @@ static int __devinit sh_mmcif_probe(struct platform_device *pdev)
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host->clk = clk_get_rate(host->hclk);
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host->pd = pdev;
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init_waitqueue_head(&host->intr_wait);
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init_completion(&host->intr_wait);
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mmc->ops = &sh_mmcif_ops;
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mmc->f_max = host->clk;
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@ -880,20 +854,21 @@ static int __devexit sh_mmcif_remove(struct platform_device *pdev)
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struct sh_mmcif_host *host = platform_get_drvdata(pdev);
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int irq[2];
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mmc_remove_host(host->mmc);
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if (host->addr)
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iounmap(host->addr);
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sh_mmcif_writel(host->addr, MMCIF_CE_INT_MASK, MASK_ALL);
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irq[0] = platform_get_irq(pdev, 0);
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irq[1] = platform_get_irq(pdev, 1);
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if (host->addr)
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iounmap(host->addr);
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platform_set_drvdata(pdev, NULL);
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mmc_remove_host(host->mmc);
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free_irq(irq[0], host);
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free_irq(irq[1], host);
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platform_set_drvdata(pdev, NULL);
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clk_disable(host->hclk);
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mmc_free_host(host->mmc);
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@ -924,5 +899,5 @@ module_exit(sh_mmcif_exit);
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MODULE_DESCRIPTION("SuperH on-chip MMC/eMMC interface driver");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS(DRIVER_NAME);
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MODULE_ALIAS("platform:" DRIVER_NAME);
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MODULE_AUTHOR("Yusuke Goda <yusuke.goda.sx@renesas.com>");
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