[PATCH] w100fb: Rewrite for platform independence
The code w100fb was based on was horribly Sharp SL-C7x0 specific and there was little else that could be done as I had no access to anything else with a w100 in it. There is no real documentation about this chipset available. Ian Molton has access to other platforms with the w100 (Toshiba e-series) and so between us, we've improved w100fb and made it platform independent. Ian Molton also added support for the very similar w3220 and w3200 chipsets. There are a lot of changes here and it nearly amounts to a rewrite of the driver but it has been extensively tested and is being used in preference to the original driver in the Zaurus community. I'd therefore like to update the mainline code to reflect this. Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Acked-by: Antonino Daplas <adaplas@pol.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>hifive-unleashed-5.1
Richard Purdie
Linus Torvalds
parent
8cc3c7af42
commit
aac51f09d9
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@ -5,9 +5,12 @@
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*
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* Copyright (C) 2002, ATI Corp.
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* Copyright (C) 2004-2005 Richard Purdie
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* Copyright (c) 2005 Ian Molton <spyro@f2s.com>
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*
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* Modified to work with 2.6 by Richard Purdie <rpurdie@rpsys.net>
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*
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* w32xx support by Ian Molton
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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@ -157,6 +160,22 @@
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#define mmMC_PERF_COUNTERS 0x01B4
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/* Block MC End: */
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/* Block BM Start: */
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#define mmBM_EXT_MEM_BANDWIDTH 0x0A00
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#define mmBM_OFFSET 0x0A04
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#define mmBM_MEM_EXT_TIMING_CNTL 0x0A08
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#define mmBM_MEM_EXT_CNTL 0x0A0C
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#define mmBM_MEM_MODE_REG 0x0A10
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#define mmBM_MEM_IO_CNTL 0x0A18
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#define mmBM_CONFIG 0x0A1C
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#define mmBM_STATUS 0x0A20
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#define mmBM_DEBUG 0x0A24
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#define mmBM_PERF_MON_CNTL 0x0A28
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#define mmBM_PERF_COUNTERS 0x0A2C
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#define mmBM_PERF2_MON_CNTL 0x0A30
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#define mmBM_PERF2_COUNTERS 0x0A34
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/* Block BM End: */
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/* Block RBBM Start: */
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#define mmWAIT_UNTIL 0x1400
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#define mmISYNC_CNTL 0x1404
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@ -191,14 +210,19 @@
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#define W100_REG_BASE 0x10000
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#define W100_REG_LEN 0x2000
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#define MEM_INT_BASE_VALUE 0x100000
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#define MEM_INT_TOP_VALUE_W100 0x15ffff
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#define MEM_EXT_BASE_VALUE 0x800000
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#define MEM_EXT_TOP_VALUE 0x9fffff
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#define MEM_INT_SIZE 0x05ffff
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#define MEM_WINDOW_BASE 0x100000
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#define MEM_WINDOW_SIZE 0xf00000
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#define WRAP_BUF_BASE_VALUE 0x80000
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#define WRAP_BUF_TOP_VALUE 0xbffff
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#define CHIP_ID_W100 0x57411002
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#define CHIP_ID_W3200 0x56441002
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#define CHIP_ID_W3220 0x57441002
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/* data structure definitions */
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/* Register structure definitions */
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struct wrap_top_dir_t {
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unsigned long top_addr : 23;
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@ -364,8 +388,8 @@ union intf_cntl_u {
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struct cpu_defaults_t {
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unsigned char unpack_rd_data : 1;
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unsigned char access_ind_addr_a: 1;
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unsigned char access_ind_addr_b: 1;
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unsigned char access_ind_addr_a : 1;
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unsigned char access_ind_addr_b : 1;
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unsigned char access_scratch_reg : 1;
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unsigned char pack_wr_data : 1;
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unsigned char transition_size : 1;
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@ -378,6 +402,120 @@ union cpu_defaults_u {
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struct cpu_defaults_t f;
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} __attribute__((packed));
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struct crtc_total_t {
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unsigned long crtc_h_total : 10;
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unsigned long : 6;
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unsigned long crtc_v_total : 10;
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unsigned long : 6;
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} __attribute__((packed));
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union crtc_total_u {
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unsigned long val : 32;
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struct crtc_total_t f;
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} __attribute__((packed));
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struct crtc_ss_t {
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unsigned long ss_start : 10;
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unsigned long : 6;
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unsigned long ss_end : 10;
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unsigned long : 2;
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unsigned long ss_align : 1;
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unsigned long ss_pol : 1;
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unsigned long ss_run_mode : 1;
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unsigned long ss_en : 1;
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} __attribute__((packed));
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union crtc_ss_u {
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unsigned long val : 32;
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struct crtc_ss_t f;
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} __attribute__((packed));
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struct active_h_disp_t {
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unsigned long active_h_start : 10;
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unsigned long : 6;
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unsigned long active_h_end : 10;
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unsigned long : 6;
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} __attribute__((packed));
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union active_h_disp_u {
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unsigned long val : 32;
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struct active_h_disp_t f;
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} __attribute__((packed));
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struct active_v_disp_t {
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unsigned long active_v_start : 10;
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unsigned long : 6;
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unsigned long active_v_end : 10;
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unsigned long : 6;
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} __attribute__((packed));
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union active_v_disp_u {
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unsigned long val : 32;
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struct active_v_disp_t f;
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} __attribute__((packed));
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struct graphic_h_disp_t {
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unsigned long graphic_h_start : 10;
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unsigned long : 6;
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unsigned long graphic_h_end : 10;
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unsigned long : 6;
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} __attribute__((packed));
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union graphic_h_disp_u {
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unsigned long val : 32;
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struct graphic_h_disp_t f;
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} __attribute__((packed));
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struct graphic_v_disp_t {
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unsigned long graphic_v_start : 10;
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unsigned long : 6;
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unsigned long graphic_v_end : 10;
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unsigned long : 6;
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} __attribute__((packed));
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union graphic_v_disp_u{
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unsigned long val : 32;
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struct graphic_v_disp_t f;
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} __attribute__((packed));
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struct graphic_ctrl_t_w100 {
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unsigned long color_depth : 3;
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unsigned long portrait_mode : 2;
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unsigned long low_power_on : 1;
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unsigned long req_freq : 4;
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unsigned long en_crtc : 1;
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unsigned long en_graphic_req : 1;
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unsigned long en_graphic_crtc : 1;
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unsigned long total_req_graphic : 9;
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unsigned long lcd_pclk_on : 1;
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unsigned long lcd_sclk_on : 1;
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unsigned long pclk_running : 1;
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unsigned long sclk_running : 1;
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unsigned long : 6;
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} __attribute__((packed));
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struct graphic_ctrl_t_w32xx {
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unsigned long color_depth : 3;
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unsigned long portrait_mode : 2;
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unsigned long low_power_on : 1;
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unsigned long req_freq : 4;
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unsigned long en_crtc : 1;
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unsigned long en_graphic_req : 1;
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unsigned long en_graphic_crtc : 1;
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unsigned long total_req_graphic : 10;
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unsigned long lcd_pclk_on : 1;
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unsigned long lcd_sclk_on : 1;
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unsigned long pclk_running : 1;
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unsigned long sclk_running : 1;
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unsigned long : 5;
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} __attribute__((packed));
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union graphic_ctrl_u {
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unsigned long val : 32;
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struct graphic_ctrl_t_w100 f_w100;
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struct graphic_ctrl_t_w32xx f_w32xx;
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} __attribute__((packed));
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struct video_ctrl_t {
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unsigned long video_mode : 1;
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unsigned long keyer_en : 1;
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@ -480,6 +618,16 @@ union mc_ext_mem_location_u {
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struct mc_ext_mem_location_t f;
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} __attribute__((packed));
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struct mc_fb_location_t {
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unsigned long mc_fb_start : 16;
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unsigned long mc_fb_top : 16;
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} __attribute__((packed));
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union mc_fb_location_u {
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unsigned long val : 32;
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struct mc_fb_location_t f;
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} __attribute__((packed));
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struct clk_pin_cntl_t {
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unsigned long osc_en : 1;
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unsigned long osc_gain : 5;
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@ -579,6 +727,13 @@ union pclk_cntl_u {
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struct pclk_cntl_t f;
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} __attribute__((packed));
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#define TESTCLK_SRC_PLL 0x01
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#define TESTCLK_SRC_SCLK 0x02
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#define TESTCLK_SRC_PCLK 0x03
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/* 4 and 5 seem to by XTAL/M */
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#define TESTCLK_SRC_XTAL 0x06
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struct clk_test_cntl_t {
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unsigned long testclk_sel : 4;
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unsigned long : 3;
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@ -1,21 +1,149 @@
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/*
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* Support for the w100 frame buffer.
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*
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* Copyright (c) 2004 Richard Purdie
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* Copyright (c) 2004-2005 Richard Purdie
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* Copyright (c) 2005 Ian Molton
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define W100_GPIO_PORT_A 0
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#define W100_GPIO_PORT_B 1
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#define CLK_SRC_XTAL 0
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#define CLK_SRC_PLL 1
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struct w100fb_par;
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unsigned long w100fb_gpio_read(int port);
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void w100fb_gpio_write(int port, unsigned long value);
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/* LCD Specific Routines and Config */
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struct w100_tg_info {
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void (*change)(struct w100fb_par*);
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void (*suspend)(struct w100fb_par*);
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void (*resume)(struct w100fb_par*);
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};
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/* General Platform Specific w100 Register Values */
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struct w100_gen_regs {
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unsigned long lcd_format;
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unsigned long lcdd_cntl1;
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unsigned long lcdd_cntl2;
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unsigned long genlcd_cntl1;
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unsigned long genlcd_cntl2;
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unsigned long genlcd_cntl3;
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};
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struct w100_gpio_regs {
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unsigned long init_data1;
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unsigned long init_data2;
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unsigned long gpio_dir1;
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unsigned long gpio_oe1;
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unsigned long gpio_dir2;
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unsigned long gpio_oe2;
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};
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/* Optional External Memory Configuration */
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struct w100_mem_info {
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unsigned long ext_cntl;
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unsigned long sdram_mode_reg;
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unsigned long ext_timing_cntl;
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unsigned long io_cntl;
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unsigned int size;
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};
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struct w100_bm_mem_info {
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unsigned long ext_mem_bw;
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unsigned long offset;
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unsigned long ext_timing_ctl;
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unsigned long ext_cntl;
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unsigned long mode_reg;
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unsigned long io_cntl;
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unsigned long config;
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};
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/* LCD Mode definition */
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struct w100_mode {
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unsigned int xres;
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unsigned int yres;
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unsigned short left_margin;
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unsigned short right_margin;
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unsigned short upper_margin;
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unsigned short lower_margin;
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unsigned long crtc_ss;
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unsigned long crtc_ls;
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unsigned long crtc_gs;
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unsigned long crtc_vpos_gs;
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unsigned long crtc_rev;
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unsigned long crtc_dclk;
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unsigned long crtc_gclk;
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unsigned long crtc_goe;
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unsigned long crtc_ps1_active;
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char pll_freq;
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char fast_pll_freq;
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int sysclk_src;
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int sysclk_divider;
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int pixclk_src;
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int pixclk_divider;
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int pixclk_divider_rotated;
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};
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struct w100_pll_info {
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uint16_t freq; /* desired Fout for PLL (Mhz) */
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uint8_t M; /* input divider */
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uint8_t N_int; /* VCO multiplier */
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uint8_t N_fac; /* VCO multiplier fractional part */
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uint8_t tfgoal;
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uint8_t lock_time;
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};
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/* Initial Video mode orientation flags */
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#define INIT_MODE_ROTATED 0x1
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#define INIT_MODE_FLIPPED 0x2
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/*
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* This structure describes the machine which we are running on.
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* It is set by machine specific code and used in the probe routine
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* of drivers/video/w100fb.c
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*/
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struct w100fb_mach_info {
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void (*w100fb_ssp_send)(u8 adrs, u8 data);
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int comadj;
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int phadadj;
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/* General Platform Specific Registers */
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struct w100_gen_regs *regs;
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/* Table of modes the LCD is capable of */
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struct w100_mode *modelist;
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unsigned int num_modes;
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/* Hooks for any platform specific tg/lcd code (optional) */
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struct w100_tg_info *tg;
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/* External memory definition (if present) */
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struct w100_mem_info *mem;
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/* Additional External memory definition (if present) */
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struct w100_bm_mem_info *bm_mem;
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/* GPIO definitions (optional) */
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struct w100_gpio_regs *gpio;
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/* Initial Mode flags */
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unsigned int init_mode;
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/* Xtal Frequency */
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unsigned int xtal_freq;
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/* Enable Xtal input doubler (1 == enable) */
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unsigned int xtal_dbl;
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};
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/* General frame buffer data structure */
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struct w100fb_par {
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unsigned int chip_id;
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unsigned int xres;
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unsigned int yres;
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unsigned int extmem_active;
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unsigned int flip;
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unsigned int blanked;
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unsigned int fastpll_mode;
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unsigned long hsync_len;
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struct w100_mode *mode;
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struct w100_pll_info *pll_table;
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struct w100fb_mach_info *mach;
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uint32_t *saved_intmem;
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uint32_t *saved_extmem;
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};
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