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MLK-23215-1 CLK: imx8mp: add the rpmsg support 

Add the MU clock mandatory required by MU module and mailbox
would be used in RPMSG.
Check M core is enabled or not, to make sure M core's uart consol
work well.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Andy Duan <fugang.duan@nxp.com>
5.4-rM2-2.2.x-imx-squashed
Richard Zhu 2020-01-07 17:35:26 +08:00
parent 2b26c0dade
commit ac27cfd234
1 changed files with 4 additions and 0 deletions
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4
drivers/clk/imx/clk-imx8mp.c
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@ -13,6 +13,7 @@
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/types.h>
#include <soc/imx/soc.h>
#include "clk.h"
@ -522,6 +523,8 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
void __iomem *base;
int ret;
check_m4_enabled();
clks[IMX8MP_CLK_DUMMY] = imx_clk_fixed("dummy", 0);
clks[IMX8MP_CLK_24M] = of_clk_get_by_name(np, "osc_24m");
clks[IMX8MP_CLK_32K] = of_clk_get_by_name(np, "osc_32k");
@ -771,6 +774,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
clks[IMX8MP_CLK_I2C2_ROOT] = imx_clk_gate4("i2c2_root_clk", "i2c2", base + 0x4180, 0);
clks[IMX8MP_CLK_I2C3_ROOT] = imx_clk_gate4("i2c3_root_clk", "i2c3", base + 0x4190, 0);
clks[IMX8MP_CLK_I2C4_ROOT] = imx_clk_gate4("i2c4_root_clk", "i2c4", base + 0x41a0, 0);
clks[IMX8MP_CLK_MU_ROOT] = imx_clk_gate4("mu_root_clk", "ipg_root", base + 0x4210, 0);
clks[IMX8MP_CLK_PCIE_ROOT] = imx_clk_gate4("pcie_root_clk", "pcie_aux", base + 0x4250, 0);
clks[IMX8MP_CLK_PWM1_ROOT] = imx_clk_gate4("pwm1_root_clk", "pwm1", base + 0x4280, 0);
clks[IMX8MP_CLK_PWM2_ROOT] = imx_clk_gate4("pwm2_root_clk", "pwm2", base + 0x4290, 0);