drm/gma500/mrst: Add SDVO clock calculation
We start off by adding SDVO limits and converting all limits to the generic gma_limit_t stuct. Then we separate clock calculations for LVDS and SDVO. This will be cleaned up later but keep it simple for now. Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
This commit is contained in:
Patrik Jakobsson
parent
86bd410325
commit
ac6113ebb7
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@ -26,24 +26,10 @@
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#include "gma_display.h"
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#include "power.h"
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struct psb_intel_range_t {
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int min, max;
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};
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struct oaktrail_limit_t {
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struct psb_intel_range_t dot, m, p1;
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};
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struct oaktrail_clock_t {
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/* derived values */
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int dot;
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int m;
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int p1;
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};
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#define MRST_LIMIT_LVDS_100L 0
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#define MRST_LIMIT_LVDS_83 1
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#define MRST_LIMIT_LVDS_100 2
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#define MRST_LIMIT_LVDS_100L 0
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#define MRST_LIMIT_LVDS_83 1
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#define MRST_LIMIT_LVDS_100 2
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#define MRST_LIMIT_SDVO 3
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#define MRST_DOT_MIN 19750
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#define MRST_DOT_MAX 120000
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@ -57,21 +43,40 @@ struct oaktrail_clock_t {
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#define MRST_P1_MAX_0 7
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#define MRST_P1_MAX_1 8
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static const struct oaktrail_limit_t oaktrail_limits[] = {
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static bool mrst_lvds_find_best_pll(const struct gma_limit_t *limit,
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struct drm_crtc *crtc, int target,
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int refclk, struct gma_clock_t *best_clock);
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static bool mrst_sdvo_find_best_pll(const struct gma_limit_t *limit,
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struct drm_crtc *crtc, int target,
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int refclk, struct gma_clock_t *best_clock);
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static const struct gma_limit_t mrst_limits[] = {
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{ /* MRST_LIMIT_LVDS_100L */
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.dot = {.min = MRST_DOT_MIN, .max = MRST_DOT_MAX},
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.m = {.min = MRST_M_MIN_100L, .max = MRST_M_MAX_100L},
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.p1 = {.min = MRST_P1_MIN, .max = MRST_P1_MAX_1},
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.find_pll = mrst_lvds_find_best_pll,
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},
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{ /* MRST_LIMIT_LVDS_83L */
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.dot = {.min = MRST_DOT_MIN, .max = MRST_DOT_MAX},
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.m = {.min = MRST_M_MIN_83, .max = MRST_M_MAX_83},
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.p1 = {.min = MRST_P1_MIN, .max = MRST_P1_MAX_0},
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.find_pll = mrst_lvds_find_best_pll,
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},
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{ /* MRST_LIMIT_LVDS_100 */
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.dot = {.min = MRST_DOT_MIN, .max = MRST_DOT_MAX},
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.m = {.min = MRST_M_MIN_100, .max = MRST_M_MAX_100},
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.p1 = {.min = MRST_P1_MIN, .max = MRST_P1_MAX_1},
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.find_pll = mrst_lvds_find_best_pll,
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},
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{ /* MRST_LIMIT_SDVO */
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.vco = {.min = 1400000, .max = 2800000},
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.n = {.min = 3, .max = 7},
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.m = {.min = 80, .max = 137},
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.p1 = {.min = 1, .max = 2},
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.p2 = {.dot_limit = 200000, .p2_slow = 10, .p2_fast = 10},
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.find_pll = mrst_sdvo_find_best_pll,
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},
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};
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@ -82,9 +87,10 @@ static const u32 oaktrail_m_converts[] = {
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0x12, 0x09, 0x24, 0x32, 0x39, 0x1c,
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};
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static const struct oaktrail_limit_t *oaktrail_limit(struct drm_crtc *crtc)
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static const struct gma_limit_t *mrst_limit(struct drm_crtc *crtc,
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int refclk)
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{
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const struct oaktrail_limit_t *limit = NULL;
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const struct gma_limit_t *limit = NULL;
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struct drm_device *dev = crtc->dev;
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struct drm_psb_private *dev_priv = dev->dev_private;
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@ -92,45 +98,100 @@ static const struct oaktrail_limit_t *oaktrail_limit(struct drm_crtc *crtc)
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|| gma_pipe_has_type(crtc, INTEL_OUTPUT_MIPI)) {
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switch (dev_priv->core_freq) {
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case 100:
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limit = &oaktrail_limits[MRST_LIMIT_LVDS_100L];
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limit = &mrst_limits[MRST_LIMIT_LVDS_100L];
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break;
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case 166:
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limit = &oaktrail_limits[MRST_LIMIT_LVDS_83];
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limit = &mrst_limits[MRST_LIMIT_LVDS_83];
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break;
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case 200:
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limit = &oaktrail_limits[MRST_LIMIT_LVDS_100];
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limit = &mrst_limits[MRST_LIMIT_LVDS_100];
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break;
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}
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} else if (gma_pipe_has_type(crtc, INTEL_OUTPUT_SDVO)) {
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limit = &mrst_limits[MRST_LIMIT_SDVO];
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} else {
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limit = NULL;
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dev_err(dev->dev, "oaktrail_limit Wrong display type.\n");
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dev_err(dev->dev, "mrst_limit Wrong display type.\n");
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}
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return limit;
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}
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/** Derive the pixel clock for the given refclk and divisors for 8xx chips. */
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static void oaktrail_clock(int refclk, struct oaktrail_clock_t *clock)
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static void mrst_lvds_clock(int refclk, struct gma_clock_t *clock)
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{
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clock->dot = (refclk * clock->m) / (14 * clock->p1);
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}
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static void mrstPrintPll(char *prefix, struct oaktrail_clock_t *clock)
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static void mrst_print_pll(struct gma_clock_t *clock)
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{
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pr_debug("%s: dotclock = %d, m = %d, p1 = %d.\n",
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prefix, clock->dot, clock->m, clock->p1);
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DRM_DEBUG_DRIVER("dotclock=%d, m=%d, m1=%d, m2=%d, n=%d, p1=%d, p2=%d\n",
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clock->dot, clock->m, clock->m1, clock->m2, clock->n,
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clock->p1, clock->p2);
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}
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static bool mrst_sdvo_find_best_pll(const struct gma_limit_t *limit,
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struct drm_crtc *crtc, int target,
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int refclk, struct gma_clock_t *best_clock)
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{
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struct gma_clock_t clock;
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u32 target_vco, actual_freq;
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s32 freq_error, min_error = 100000;
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memset(best_clock, 0, sizeof(*best_clock));
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for (clock.m = limit->m.min; clock.m <= limit->m.max; clock.m++) {
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for (clock.n = limit->n.min; clock.n <= limit->n.max;
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clock.n++) {
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for (clock.p1 = limit->p1.min;
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clock.p1 <= limit->p1.max; clock.p1++) {
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/* p2 value always stored in p2_slow on SDVO */
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clock.p = clock.p1 * limit->p2.p2_slow;
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target_vco = target * clock.p;
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/* VCO will increase at this point so break */
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if (target_vco > limit->vco.max)
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break;
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if (target_vco < limit->vco.min)
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continue;
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actual_freq = (refclk * clock.m) /
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(clock.n * clock.p);
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freq_error = 10000 -
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((target * 10000) / actual_freq);
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if (freq_error < -min_error) {
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/* freq_error will start to decrease at
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this point so break */
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break;
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}
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if (freq_error < 0)
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freq_error = -freq_error;
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if (freq_error < min_error) {
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min_error = freq_error;
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*best_clock = clock;
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}
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}
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}
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if (min_error == 0)
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break;
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}
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return min_error == 0;
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}
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/**
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* Returns a set of divisors for the desired target clock with the given refclk,
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* or FALSE. Divisor values are the actual divisors for
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*/
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static bool
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mrstFindBestPLL(struct drm_crtc *crtc, int target, int refclk,
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struct oaktrail_clock_t *best_clock)
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static bool mrst_lvds_find_best_pll(const struct gma_limit_t *limit,
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struct drm_crtc *crtc, int target,
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int refclk, struct gma_clock_t *best_clock)
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{
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struct oaktrail_clock_t clock;
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const struct oaktrail_limit_t *limit = oaktrail_limit(crtc);
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struct gma_clock_t clock;
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int err = target;
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memset(best_clock, 0, sizeof(*best_clock));
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@ -140,7 +201,7 @@ mrstFindBestPLL(struct drm_crtc *crtc, int target, int refclk,
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clock.p1++) {
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int this_err;
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oaktrail_clock(refclk, &clock);
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mrst_lvds_clock(refclk, &clock);
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this_err = abs(clock.dot - target);
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if (this_err < err) {
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@ -149,7 +210,6 @@ mrstFindBestPLL(struct drm_crtc *crtc, int target, int refclk,
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}
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}
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}
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dev_dbg(crtc->dev->dev, "mrstFindBestPLL err = %d.\n", err);
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return err != target;
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}
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@ -297,7 +357,8 @@ static int oaktrail_crtc_mode_set(struct drm_crtc *crtc,
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int pipe = gma_crtc->pipe;
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const struct psb_offset *map = &dev_priv->regmap[pipe];
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int refclk = 0;
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struct oaktrail_clock_t clock;
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struct gma_clock_t clock;
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const struct gma_limit_t *limit;
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u32 dpll = 0, fp = 0, dspcntr, pipeconf;
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bool ok, is_sdvo = false;
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bool is_lvds = false;
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@ -418,21 +479,30 @@ static int oaktrail_crtc_mode_set(struct drm_crtc *crtc,
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if (is_mipi)
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goto oaktrail_crtc_mode_set_exit;
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refclk = dev_priv->core_freq * 1000;
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dpll = 0; /*BIT16 = 0 for 100MHz reference */
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ok = mrstFindBestPLL(crtc, adjusted_mode->clock, refclk, &clock);
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refclk = is_sdvo ? 96000 : dev_priv->core_freq * 1000;
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limit = mrst_limit(crtc, refclk);
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ok = limit->find_pll(limit, crtc, adjusted_mode->clock,
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refclk, &clock);
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if (!ok) {
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dev_dbg(dev->dev, "mrstFindBestPLL fail in oaktrail_crtc_mode_set.\n");
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} else {
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dev_dbg(dev->dev, "oaktrail_crtc_mode_set pixel clock = %d,"
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"m = %x, p1 = %x.\n", clock.dot, clock.m,
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clock.p1);
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if (is_sdvo) {
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/* Convert calculated values to register values */
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clock.p1 = (1L << (clock.p1 - 1));
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clock.m -= 2;
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clock.n = (1L << (clock.n - 1));
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}
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fp = oaktrail_m_converts[(clock.m - MRST_M_MIN)] << 8;
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if (!ok)
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DRM_ERROR("Failed to find proper PLL settings");
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mrst_print_pll(&clock);
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if (is_sdvo)
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fp = clock.n << 16 | clock.m;
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else
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fp = oaktrail_m_converts[(clock.m - MRST_M_MIN)] << 8;
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dpll |= DPLL_VGA_MODE_DIS;
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@ -456,12 +526,13 @@ static int oaktrail_crtc_mode_set(struct drm_crtc *crtc,
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/* compute bitmask from p1 value */
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dpll |= (1 << (clock.p1 - 2)) << 17;
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if (is_sdvo)
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dpll |= clock.p1 << 16; // dpll |= (1 << (clock.p1 - 1)) << 16;
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else
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dpll |= (1 << (clock.p1 - 2)) << 17;
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dpll |= DPLL_VCO_ENABLE;
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mrstPrintPll("chosen", &clock);
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if (dpll & DPLL_VCO_ENABLE) {
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REG_WRITE(map->fp0, fp);
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REG_WRITE(map->dpll, dpll & ~DPLL_VCO_ENABLE);
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@ -565,3 +636,9 @@ const struct drm_crtc_helper_funcs oaktrail_helper_funcs = {
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.commit = gma_crtc_commit,
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};
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/* Not used yet */
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const struct gma_clock_funcs mrst_clock_funcs = {
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.clock = mrst_lvds_clock,
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.limit = mrst_limit,
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.pll_is_valid = gma_pll_is_valid,
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};
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