Merge branch 'yaml-bindings-for-v4.21' into dt/next
Rob Herring
commit
acc2038738
|
|
@ -15,6 +15,7 @@
|
|||
*.bin
|
||||
*.bz2
|
||||
*.c.[012]*.*
|
||||
*.dt.yaml
|
||||
*.dtb
|
||||
*.dtb.S
|
||||
*.dwo
|
||||
|
|
|
|||
1
.mailmap
1
.mailmap
|
|
@ -159,6 +159,7 @@ Peter Oruba <peter@oruba.de>
|
|||
Peter Oruba <peter.oruba@amd.com>
|
||||
Pratyush Anand <pratyush.anand@gmail.com> <pratyush.anand@st.com>
|
||||
Praveen BP <praveenbp@ti.com>
|
||||
Punit Agrawal <punitagrawal@gmail.com> <punit.agrawal@arm.com>
|
||||
Qais Yousef <qsyousef@gmail.com> <qais.yousef@imgtec.com>
|
||||
Oleksij Rempel <linux@rempel-privat.de> <bug-track@fisher-privat.net>
|
||||
Oleksij Rempel <linux@rempel-privat.de> <external.Oleksij.Rempel@de.bosch.com>
|
||||
|
|
|
|||
|
|
@ -37,8 +37,8 @@ Description:
|
|||
0-| / \/ \/
|
||||
+---0----1----2----3----4----5----6------------> time (s)
|
||||
|
||||
2. To make the LED go instantly from one brigntess value to another,
|
||||
we should use use zero-time lengths (the brightness must be same as
|
||||
2. To make the LED go instantly from one brightness value to another,
|
||||
we should use zero-time lengths (the brightness must be same as
|
||||
the previous tuple's). So the format should be:
|
||||
"brightness_1 duration_1 brightness_1 0 brightness_2 duration_2
|
||||
brightness_2 0 ...". For example:
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
# Makefile for Sphinx documentation
|
||||
#
|
||||
|
||||
subdir-y :=
|
||||
subdir-y := devicetree/bindings/
|
||||
|
||||
# You can set these variables from the command line.
|
||||
SPHINXBUILD = sphinx-build
|
||||
|
|
|
|||
|
|
@ -0,0 +1,2 @@
|
|||
*.example.dts
|
||||
processed-schema.yaml
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
DT_DOC_CHECKER ?= dt-doc-validate
|
||||
DT_EXTRACT_EX ?= dt-extract-example
|
||||
DT_MK_SCHEMA ?= dt-mk-schema
|
||||
DT_MK_SCHEMA_FLAGS := $(if $(DT_SCHEMA_FILES), -u)
|
||||
|
||||
quiet_cmd_chk_binding = CHKDT $(patsubst $(srctree)/%,%,$<)
|
||||
cmd_chk_binding = $(DT_DOC_CHECKER) $< ; \
|
||||
$(DT_EXTRACT_EX) $< > $@
|
||||
|
||||
$(obj)/%.example.dts: $(src)/%.yaml FORCE
|
||||
$(call if_changed,chk_binding)
|
||||
|
||||
DT_TMP_SCHEMA := processed-schema.yaml
|
||||
extra-y += $(DT_TMP_SCHEMA)
|
||||
|
||||
quiet_cmd_mk_schema = SCHEMA $@
|
||||
cmd_mk_schema = $(DT_MK_SCHEMA) $(DT_MK_SCHEMA_FLAGS) -o $@ $(filter-out FORCE, $^)
|
||||
|
||||
DT_DOCS = $(shell cd $(srctree)/$(src) && find * -name '*.yaml')
|
||||
DT_SCHEMA_FILES ?= $(addprefix $(src)/,$(DT_DOCS))
|
||||
|
||||
extra-y += $(patsubst $(src)/%.yaml,%.example.dts, $(DT_SCHEMA_FILES))
|
||||
extra-y += $(patsubst $(src)/%.yaml,%.example.dtb, $(DT_SCHEMA_FILES))
|
||||
|
||||
$(obj)/$(DT_TMP_SCHEMA): $(DT_SCHEMA_FILES) FORCE
|
||||
$(call if_changed,mk_schema)
|
||||
|
|
@ -1,14 +0,0 @@
|
|||
Altera's SoCFPGA platform device tree bindings
|
||||
---------------------------------------------
|
||||
|
||||
Boards with Cyclone 5 SoC:
|
||||
Required root node properties:
|
||||
compatible = "altr,socfpga-cyclone5", "altr,socfpga";
|
||||
|
||||
Boards with Arria 5 SoC:
|
||||
Required root node properties:
|
||||
compatible = "altr,socfpga-arria5", "altr,socfpga";
|
||||
|
||||
Boards with Arria 10 SoC:
|
||||
Required root node properties:
|
||||
compatible = "altr,socfpga-arria10", "altr,socfpga";
|
||||
|
|
@ -0,0 +1,20 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/altera.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Altera's SoCFPGA platform device tree bindings
|
||||
|
||||
maintainers:
|
||||
- Dinh Nguyen <dinguyen@kernel.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- altr,socfpga-cyclone5
|
||||
- altr,socfpga-arria5
|
||||
- altr,socfpga-arria10
|
||||
- const: altr,socfpga
|
||||
...
|
||||
|
|
@ -1,11 +0,0 @@
|
|||
Altera SOCFPGA Clock Manager
|
||||
|
||||
Required properties:
|
||||
- compatible : "altr,clk-mgr"
|
||||
- reg : Should contain base address and length for Clock Manager
|
||||
|
||||
Example:
|
||||
clkmgr@ffd04000 {
|
||||
compatible = "altr,clk-mgr";
|
||||
reg = <0xffd04000 0x1000>;
|
||||
};
|
||||
|
|
@ -0,0 +1,31 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/altera/socfpga-clk-manager.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Altera SOCFPGA Clock Manager
|
||||
|
||||
maintainers:
|
||||
- Dinh Nguyen <dinguyen@kernel.org>
|
||||
|
||||
description: test
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: altr,clk-mgr
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
examples:
|
||||
- |
|
||||
clkmgr@ffd04000 {
|
||||
compatible = "altr,clk-mgr";
|
||||
reg = <0xffd04000 0x1000>;
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -1,15 +0,0 @@
|
|||
Calxeda Platforms Device Tree Bindings
|
||||
-----------------------------------------------
|
||||
|
||||
Boards with Calxeda Cortex-A9 based ECX-1000 (Highbank) SOC shall have the
|
||||
following properties.
|
||||
|
||||
Required root node properties:
|
||||
- compatible = "calxeda,highbank";
|
||||
|
||||
|
||||
Boards with Calxeda Cortex-A15 based ECX-2000 SOC shall have the following
|
||||
properties.
|
||||
|
||||
Required root node properties:
|
||||
- compatible = "calxeda,ecx-2000";
|
||||
|
|
@ -0,0 +1,22 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/calxeda.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Calxeda Platforms Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Rob Herring <robh@kernel.org>
|
||||
description: |+
|
||||
Bindings for boards with Calxeda Cortex-A9 based ECX-1000 (Highbank) SOC
|
||||
or Cortex-A15 based ECX-2000 SOCs
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- calxeda,highbank
|
||||
- calxeda,ecx-2000
|
||||
|
|
@ -1,490 +0,0 @@
|
|||
=================
|
||||
ARM CPUs bindings
|
||||
=================
|
||||
|
||||
The device tree allows to describe the layout of CPUs in a system through
|
||||
the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
|
||||
defining properties for every cpu.
|
||||
|
||||
Bindings for CPU nodes follow the Devicetree Specification, available from:
|
||||
|
||||
https://www.devicetree.org/specifications/
|
||||
|
||||
with updates for 32-bit and 64-bit ARM systems provided in this document.
|
||||
|
||||
================================
|
||||
Convention used in this document
|
||||
================================
|
||||
|
||||
This document follows the conventions described in the Devicetree
|
||||
Specification, with the addition:
|
||||
|
||||
- square brackets define bitfields, eg reg[7:0] value of the bitfield in
|
||||
the reg property contained in bits 7 down to 0
|
||||
|
||||
=====================================
|
||||
cpus and cpu node bindings definition
|
||||
=====================================
|
||||
|
||||
The ARM architecture, in accordance with the Devicetree Specification,
|
||||
requires the cpus and cpu nodes to be present and contain the properties
|
||||
described below.
|
||||
|
||||
- cpus node
|
||||
|
||||
Description: Container of cpu nodes
|
||||
|
||||
The node name must be "cpus".
|
||||
|
||||
A cpus node must define the following properties:
|
||||
|
||||
- #address-cells
|
||||
Usage: required
|
||||
Value type: <u32>
|
||||
|
||||
Definition depends on ARM architecture version and
|
||||
configuration:
|
||||
|
||||
# On uniprocessor ARM architectures previous to v7
|
||||
value must be 1, to enable a simple enumeration
|
||||
scheme for processors that do not have a HW CPU
|
||||
identification register.
|
||||
# On 32-bit ARM 11 MPcore, ARM v7 or later systems
|
||||
value must be 1, that corresponds to CPUID/MPIDR
|
||||
registers sizes.
|
||||
# On ARM v8 64-bit systems value should be set to 2,
|
||||
that corresponds to the MPIDR_EL1 register size.
|
||||
If MPIDR_EL1[63:32] value is equal to 0 on all CPUs
|
||||
in the system, #address-cells can be set to 1, since
|
||||
MPIDR_EL1[63:32] bits are not used for CPUs
|
||||
identification.
|
||||
- #size-cells
|
||||
Usage: required
|
||||
Value type: <u32>
|
||||
Definition: must be set to 0
|
||||
|
||||
- cpu node
|
||||
|
||||
Description: Describes a CPU in an ARM based system
|
||||
|
||||
PROPERTIES
|
||||
|
||||
- device_type
|
||||
Usage: required
|
||||
Value type: <string>
|
||||
Definition: must be "cpu"
|
||||
- reg
|
||||
Usage and definition depend on ARM architecture version and
|
||||
configuration:
|
||||
|
||||
# On uniprocessor ARM architectures previous to v7
|
||||
this property is required and must be set to 0.
|
||||
|
||||
# On ARM 11 MPcore based systems this property is
|
||||
required and matches the CPUID[11:0] register bits.
|
||||
|
||||
Bits [11:0] in the reg cell must be set to
|
||||
bits [11:0] in CPU ID register.
|
||||
|
||||
All other bits in the reg cell must be set to 0.
|
||||
|
||||
# On 32-bit ARM v7 or later systems this property is
|
||||
required and matches the CPU MPIDR[23:0] register
|
||||
bits.
|
||||
|
||||
Bits [23:0] in the reg cell must be set to
|
||||
bits [23:0] in MPIDR.
|
||||
|
||||
All other bits in the reg cell must be set to 0.
|
||||
|
||||
# On ARM v8 64-bit systems this property is required
|
||||
and matches the MPIDR_EL1 register affinity bits.
|
||||
|
||||
* If cpus node's #address-cells property is set to 2
|
||||
|
||||
The first reg cell bits [7:0] must be set to
|
||||
bits [39:32] of MPIDR_EL1.
|
||||
|
||||
The second reg cell bits [23:0] must be set to
|
||||
bits [23:0] of MPIDR_EL1.
|
||||
|
||||
* If cpus node's #address-cells property is set to 1
|
||||
|
||||
The reg cell bits [23:0] must be set to bits [23:0]
|
||||
of MPIDR_EL1.
|
||||
|
||||
All other bits in the reg cells must be set to 0.
|
||||
|
||||
- compatible:
|
||||
Usage: required
|
||||
Value type: <string>
|
||||
Definition: should be one of:
|
||||
"arm,arm710t"
|
||||
"arm,arm720t"
|
||||
"arm,arm740t"
|
||||
"arm,arm7ej-s"
|
||||
"arm,arm7tdmi"
|
||||
"arm,arm7tdmi-s"
|
||||
"arm,arm9es"
|
||||
"arm,arm9ej-s"
|
||||
"arm,arm920t"
|
||||
"arm,arm922t"
|
||||
"arm,arm925"
|
||||
"arm,arm926e-s"
|
||||
"arm,arm926ej-s"
|
||||
"arm,arm940t"
|
||||
"arm,arm946e-s"
|
||||
"arm,arm966e-s"
|
||||
"arm,arm968e-s"
|
||||
"arm,arm9tdmi"
|
||||
"arm,arm1020e"
|
||||
"arm,arm1020t"
|
||||
"arm,arm1022e"
|
||||
"arm,arm1026ej-s"
|
||||
"arm,arm1136j-s"
|
||||
"arm,arm1136jf-s"
|
||||
"arm,arm1156t2-s"
|
||||
"arm,arm1156t2f-s"
|
||||
"arm,arm1176jzf"
|
||||
"arm,arm1176jz-s"
|
||||
"arm,arm1176jzf-s"
|
||||
"arm,arm11mpcore"
|
||||
"arm,cortex-a5"
|
||||
"arm,cortex-a7"
|
||||
"arm,cortex-a8"
|
||||
"arm,cortex-a9"
|
||||
"arm,cortex-a12"
|
||||
"arm,cortex-a15"
|
||||
"arm,cortex-a17"
|
||||
"arm,cortex-a53"
|
||||
"arm,cortex-a57"
|
||||
"arm,cortex-a72"
|
||||
"arm,cortex-a73"
|
||||
"arm,cortex-m0"
|
||||
"arm,cortex-m0+"
|
||||
"arm,cortex-m1"
|
||||
"arm,cortex-m3"
|
||||
"arm,cortex-m4"
|
||||
"arm,cortex-r4"
|
||||
"arm,cortex-r5"
|
||||
"arm,cortex-r7"
|
||||
"brcm,brahma-b15"
|
||||
"brcm,brahma-b53"
|
||||
"brcm,vulcan"
|
||||
"cavium,thunder"
|
||||
"cavium,thunder2"
|
||||
"faraday,fa526"
|
||||
"intel,sa110"
|
||||
"intel,sa1100"
|
||||
"marvell,feroceon"
|
||||
"marvell,mohawk"
|
||||
"marvell,pj4a"
|
||||
"marvell,pj4b"
|
||||
"marvell,sheeva-v5"
|
||||
"nvidia,tegra132-denver"
|
||||
"nvidia,tegra186-denver"
|
||||
"nvidia,tegra194-carmel"
|
||||
"qcom,krait"
|
||||
"qcom,kryo"
|
||||
"qcom,kryo385"
|
||||
"qcom,scorpion"
|
||||
- enable-method
|
||||
Value type: <stringlist>
|
||||
Usage and definition depend on ARM architecture version.
|
||||
# On ARM v8 64-bit this property is required and must
|
||||
be one of:
|
||||
"psci"
|
||||
"spin-table"
|
||||
# On ARM 32-bit systems this property is optional and
|
||||
can be one of:
|
||||
"actions,s500-smp"
|
||||
"allwinner,sun6i-a31"
|
||||
"allwinner,sun8i-a23"
|
||||
"allwinner,sun9i-a80-smp"
|
||||
"amlogic,meson8-smp"
|
||||
"amlogic,meson8b-smp"
|
||||
"arm,realview-smp"
|
||||
"brcm,bcm11351-cpu-method"
|
||||
"brcm,bcm23550"
|
||||
"brcm,bcm2836-smp"
|
||||
"brcm,bcm-nsp-smp"
|
||||
"brcm,brahma-b15"
|
||||
"marvell,armada-375-smp"
|
||||
"marvell,armada-380-smp"
|
||||
"marvell,armada-390-smp"
|
||||
"marvell,armada-xp-smp"
|
||||
"marvell,98dx3236-smp"
|
||||
"mediatek,mt6589-smp"
|
||||
"mediatek,mt81xx-tz-smp"
|
||||
"qcom,gcc-msm8660"
|
||||
"qcom,kpss-acc-v1"
|
||||
"qcom,kpss-acc-v2"
|
||||
"renesas,apmu"
|
||||
"renesas,r9a06g032-smp"
|
||||
"rockchip,rk3036-smp"
|
||||
"rockchip,rk3066-smp"
|
||||
"ste,dbx500-smp"
|
||||
|
||||
- cpu-release-addr
|
||||
Usage: required for systems that have an "enable-method"
|
||||
property value of "spin-table".
|
||||
Value type: <prop-encoded-array>
|
||||
Definition:
|
||||
# On ARM v8 64-bit systems must be a two cell
|
||||
property identifying a 64-bit zero-initialised
|
||||
memory location.
|
||||
|
||||
- qcom,saw
|
||||
Usage: required for systems that have an "enable-method"
|
||||
property value of "qcom,kpss-acc-v1" or
|
||||
"qcom,kpss-acc-v2"
|
||||
Value type: <phandle>
|
||||
Definition: Specifies the SAW[1] node associated with this CPU.
|
||||
|
||||
- qcom,acc
|
||||
Usage: required for systems that have an "enable-method"
|
||||
property value of "qcom,kpss-acc-v1" or
|
||||
"qcom,kpss-acc-v2"
|
||||
Value type: <phandle>
|
||||
Definition: Specifies the ACC[2] node associated with this CPU.
|
||||
|
||||
- cpu-idle-states
|
||||
Usage: Optional
|
||||
Value type: <prop-encoded-array>
|
||||
Definition:
|
||||
# List of phandles to idle state nodes supported
|
||||
by this cpu [3].
|
||||
|
||||
- capacity-dmips-mhz
|
||||
Usage: Optional
|
||||
Value type: <u32>
|
||||
Definition:
|
||||
# u32 value representing CPU capacity [4] in
|
||||
DMIPS/MHz, relative to highest capacity-dmips-mhz
|
||||
in the system.
|
||||
|
||||
- rockchip,pmu
|
||||
Usage: optional for systems that have an "enable-method"
|
||||
property value of "rockchip,rk3066-smp"
|
||||
While optional, it is the preferred way to get access to
|
||||
the cpu-core power-domains.
|
||||
Value type: <phandle>
|
||||
Definition: Specifies the syscon node controlling the cpu core
|
||||
power domains.
|
||||
|
||||
- dynamic-power-coefficient
|
||||
Usage: optional
|
||||
Value type: <prop-encoded-array>
|
||||
Definition: A u32 value that represents the running time dynamic
|
||||
power coefficient in units of uW/MHz/V^2. The
|
||||
coefficient can either be calculated from power
|
||||
measurements or derived by analysis.
|
||||
|
||||
The dynamic power consumption of the CPU is
|
||||
proportional to the square of the Voltage (V) and
|
||||
the clock frequency (f). The coefficient is used to
|
||||
calculate the dynamic power as below -
|
||||
|
||||
Pdyn = dynamic-power-coefficient * V^2 * f
|
||||
|
||||
where voltage is in V, frequency is in MHz.
|
||||
|
||||
Example 1 (dual-cluster big.LITTLE system 32-bit):
|
||||
|
||||
cpus {
|
||||
#size-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x1>;
|
||||
};
|
||||
|
||||
cpu@100 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
reg = <0x100>;
|
||||
};
|
||||
|
||||
cpu@101 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
reg = <0x101>;
|
||||
};
|
||||
};
|
||||
|
||||
Example 2 (Cortex-A8 uniprocessor 32-bit system):
|
||||
|
||||
cpus {
|
||||
#size-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a8";
|
||||
reg = <0x0>;
|
||||
};
|
||||
};
|
||||
|
||||
Example 3 (ARM 926EJ-S uniprocessor 32-bit system):
|
||||
|
||||
cpus {
|
||||
#size-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,arm926ej-s";
|
||||
reg = <0x0>;
|
||||
};
|
||||
};
|
||||
|
||||
Example 4 (ARM Cortex-A57 64-bit system):
|
||||
|
||||
cpus {
|
||||
#size-cells = <0>;
|
||||
#address-cells = <2>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x0>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x1>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@100 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x100>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@101 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x101>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@10000 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x10000>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@10001 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x10001>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@10100 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x10100>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@10101 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x10101>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@100000000 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x0>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@100000001 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x1>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@100000100 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x100>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@100000101 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x101>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@100010000 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x10000>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@100010001 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x10001>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@100010100 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x10100>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@100010101 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x10101>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
};
|
||||
|
||||
--
|
||||
[1] arm/msm/qcom,saw2.txt
|
||||
[2] arm/msm/qcom,kpss-acc.txt
|
||||
[3] ARM Linux kernel documentation - idle states bindings
|
||||
Documentation/devicetree/bindings/arm/idle-states.txt
|
||||
[4] ARM Linux kernel documentation - cpu capacity bindings
|
||||
Documentation/devicetree/bindings/arm/cpu-capacity.txt
|
||||
|
|
@ -0,0 +1,507 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/cpus.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM CPUs bindings
|
||||
|
||||
maintainers:
|
||||
- Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
|
||||
|
||||
description: |+
|
||||
The device tree allows to describe the layout of CPUs in a system through
|
||||
the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
|
||||
defining properties for every cpu.
|
||||
|
||||
Bindings for CPU nodes follow the Devicetree Specification, available from:
|
||||
|
||||
https://www.devicetree.org/specifications/
|
||||
|
||||
with updates for 32-bit and 64-bit ARM systems provided in this document.
|
||||
|
||||
================================
|
||||
Convention used in this document
|
||||
================================
|
||||
|
||||
This document follows the conventions described in the Devicetree
|
||||
Specification, with the addition:
|
||||
|
||||
- square brackets define bitfields, eg reg[7:0] value of the bitfield in
|
||||
the reg property contained in bits 7 down to 0
|
||||
|
||||
=====================================
|
||||
cpus and cpu node bindings definition
|
||||
=====================================
|
||||
|
||||
The ARM architecture, in accordance with the Devicetree Specification,
|
||||
requires the cpus and cpu nodes to be present and contain the properties
|
||||
described below.
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: cpus
|
||||
description: Container of cpu nodes
|
||||
|
||||
'#address-cells':
|
||||
enum: [1, 2]
|
||||
description: |
|
||||
Definition depends on ARM architecture version and configuration:
|
||||
|
||||
On uniprocessor ARM architectures previous to v7
|
||||
value must be 1, to enable a simple enumeration
|
||||
scheme for processors that do not have a HW CPU
|
||||
identification register.
|
||||
On 32-bit ARM 11 MPcore, ARM v7 or later systems
|
||||
value must be 1, that corresponds to CPUID/MPIDR
|
||||
registers sizes.
|
||||
On ARM v8 64-bit systems value should be set to 2,
|
||||
that corresponds to the MPIDR_EL1 register size.
|
||||
If MPIDR_EL1[63:32] value is equal to 0 on all CPUs
|
||||
in the system, #address-cells can be set to 1, since
|
||||
MPIDR_EL1[63:32] bits are not used for CPUs
|
||||
identification.
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
'^cpu@[0-9a-f]+$':
|
||||
properties:
|
||||
device_type:
|
||||
const: cpu
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
description: |
|
||||
Usage and definition depend on ARM architecture version and
|
||||
configuration:
|
||||
|
||||
On uniprocessor ARM architectures previous to v7
|
||||
this property is required and must be set to 0.
|
||||
|
||||
On ARM 11 MPcore based systems this property is
|
||||
required and matches the CPUID[11:0] register bits.
|
||||
|
||||
Bits [11:0] in the reg cell must be set to
|
||||
bits [11:0] in CPU ID register.
|
||||
|
||||
All other bits in the reg cell must be set to 0.
|
||||
|
||||
On 32-bit ARM v7 or later systems this property is
|
||||
required and matches the CPU MPIDR[23:0] register
|
||||
bits.
|
||||
|
||||
Bits [23:0] in the reg cell must be set to
|
||||
bits [23:0] in MPIDR.
|
||||
|
||||
All other bits in the reg cell must be set to 0.
|
||||
|
||||
On ARM v8 64-bit systems this property is required
|
||||
and matches the MPIDR_EL1 register affinity bits.
|
||||
|
||||
* If cpus node's #address-cells property is set to 2
|
||||
|
||||
The first reg cell bits [7:0] must be set to
|
||||
bits [39:32] of MPIDR_EL1.
|
||||
|
||||
The second reg cell bits [23:0] must be set to
|
||||
bits [23:0] of MPIDR_EL1.
|
||||
|
||||
* If cpus node's #address-cells property is set to 1
|
||||
|
||||
The reg cell bits [23:0] must be set to bits [23:0]
|
||||
of MPIDR_EL1.
|
||||
|
||||
All other bits in the reg cells must be set to 0.
|
||||
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- arm,arm710t
|
||||
- arm,arm720t
|
||||
- arm,arm740t
|
||||
- arm,arm7ej-s
|
||||
- arm,arm7tdmi
|
||||
- arm,arm7tdmi-s
|
||||
- arm,arm9es
|
||||
- arm,arm9ej-s
|
||||
- arm,arm920t
|
||||
- arm,arm922t
|
||||
- arm,arm925
|
||||
- arm,arm926e-s
|
||||
- arm,arm926ej-s
|
||||
- arm,arm940t
|
||||
- arm,arm946e-s
|
||||
- arm,arm966e-s
|
||||
- arm,arm968e-s
|
||||
- arm,arm9tdmi
|
||||
- arm,arm1020e
|
||||
- arm,arm1020t
|
||||
- arm,arm1022e
|
||||
- arm,arm1026ej-s
|
||||
- arm,arm1136j-s
|
||||
- arm,arm1136jf-s
|
||||
- arm,arm1156t2-s
|
||||
- arm,arm1156t2f-s
|
||||
- arm,arm1176jzf
|
||||
- arm,arm1176jz-s
|
||||
- arm,arm1176jzf-s
|
||||
- arm,arm11mpcore
|
||||
- arm,armv8 # Only for s/w models
|
||||
- arm,cortex-a5
|
||||
- arm,cortex-a7
|
||||
- arm,cortex-a8
|
||||
- arm,cortex-a9
|
||||
- arm,cortex-a12
|
||||
- arm,cortex-a15
|
||||
- arm,cortex-a17
|
||||
- arm,cortex-a53
|
||||
- arm,cortex-a57
|
||||
- arm,cortex-a72
|
||||
- arm,cortex-a73
|
||||
- arm,cortex-m0
|
||||
- arm,cortex-m0+
|
||||
- arm,cortex-m1
|
||||
- arm,cortex-m3
|
||||
- arm,cortex-m4
|
||||
- arm,cortex-r4
|
||||
- arm,cortex-r5
|
||||
- arm,cortex-r7
|
||||
- brcm,brahma-b15
|
||||
- brcm,brahma-b53
|
||||
- brcm,vulcan
|
||||
- cavium,thunder
|
||||
- cavium,thunder2
|
||||
- faraday,fa526
|
||||
- intel,sa110
|
||||
- intel,sa1100
|
||||
- marvell,feroceon
|
||||
- marvell,mohawk
|
||||
- marvell,pj4a
|
||||
- marvell,pj4b
|
||||
- marvell,sheeva-v5
|
||||
- marvell,sheeva-v7
|
||||
- nvidia,tegra132-denver
|
||||
- nvidia,tegra186-denver
|
||||
- nvidia,tegra194-carmel
|
||||
- qcom,krait
|
||||
- qcom,kryo
|
||||
- qcom,kryo385
|
||||
- qcom,scorpion
|
||||
|
||||
enable-method:
|
||||
allOf:
|
||||
- $ref: '/schemas/types.yaml#/definitions/string'
|
||||
- oneOf:
|
||||
# On ARM v8 64-bit this property is required
|
||||
- enum:
|
||||
- psci
|
||||
- spin-table
|
||||
# On ARM 32-bit systems this property is optional
|
||||
- enum:
|
||||
- actions,s500-smp
|
||||
- allwinner,sun6i-a31
|
||||
- allwinner,sun8i-a23
|
||||
- allwinner,sun9i-a80-smp
|
||||
- allwinner,sun8i-a83t-smp
|
||||
- amlogic,meson8-smp
|
||||
- amlogic,meson8b-smp
|
||||
- arm,realview-smp
|
||||
- brcm,bcm11351-cpu-method
|
||||
- brcm,bcm23550
|
||||
- brcm,bcm2836-smp
|
||||
- brcm,bcm63138
|
||||
- brcm,bcm-nsp-smp
|
||||
- brcm,brahma-b15
|
||||
- marvell,armada-375-smp
|
||||
- marvell,armada-380-smp
|
||||
- marvell,armada-390-smp
|
||||
- marvell,armada-xp-smp
|
||||
- marvell,98dx3236-smp
|
||||
- mediatek,mt6589-smp
|
||||
- mediatek,mt81xx-tz-smp
|
||||
- qcom,gcc-msm8660
|
||||
- qcom,kpss-acc-v1
|
||||
- qcom,kpss-acc-v2
|
||||
- renesas,apmu
|
||||
- renesas,r9a06g032-smp
|
||||
- rockchip,rk3036-smp
|
||||
- rockchip,rk3066-smp
|
||||
- ste,dbx500-smp
|
||||
|
||||
cpu-release-addr:
|
||||
$ref: '/schemas/types.yaml#/definitions/uint64'
|
||||
|
||||
description:
|
||||
Required for systems that have an "enable-method"
|
||||
property value of "spin-table".
|
||||
On ARM v8 64-bit systems must be a two cell
|
||||
property identifying a 64-bit zero-initialised
|
||||
memory location.
|
||||
|
||||
cpu-idle-states:
|
||||
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
||||
description: |
|
||||
List of phandles to idle state nodes supported
|
||||
by this cpu (see ./idle-states.txt).
|
||||
|
||||
capacity-dmips-mhz:
|
||||
$ref: '/schemas/types.yaml#/definitions/uint32'
|
||||
description:
|
||||
u32 value representing CPU capacity (see ./cpu-capacity.txt) in
|
||||
DMIPS/MHz, relative to highest capacity-dmips-mhz
|
||||
in the system.
|
||||
|
||||
dynamic-power-coefficient:
|
||||
$ref: '/schemas/types.yaml#/definitions/uint32'
|
||||
description:
|
||||
A u32 value that represents the running time dynamic
|
||||
power coefficient in units of uW/MHz/V^2. The
|
||||
coefficient can either be calculated from power
|
||||
measurements or derived by analysis.
|
||||
|
||||
The dynamic power consumption of the CPU is
|
||||
proportional to the square of the Voltage (V) and
|
||||
the clock frequency (f). The coefficient is used to
|
||||
calculate the dynamic power as below -
|
||||
|
||||
Pdyn = dynamic-power-coefficient * V^2 * f
|
||||
|
||||
where voltage is in V, frequency is in MHz.
|
||||
|
||||
qcom,saw:
|
||||
$ref: '/schemas/types.yaml#/definitions/phandle'
|
||||
description: |
|
||||
Specifies the SAW* node associated with this CPU.
|
||||
|
||||
Required for systems that have an "enable-method" property
|
||||
value of "qcom,kpss-acc-v1" or "qcom,kpss-acc-v2"
|
||||
|
||||
* arm/msm/qcom,saw2.txt
|
||||
|
||||
qcom,acc:
|
||||
$ref: '/schemas/types.yaml#/definitions/phandle'
|
||||
description: |
|
||||
Specifies the ACC* node associated with this CPU.
|
||||
|
||||
Required for systems that have an "enable-method" property
|
||||
value of "qcom,kpss-acc-v1" or "qcom,kpss-acc-v2"
|
||||
|
||||
* arm/msm/qcom,kpss-acc.txt
|
||||
|
||||
rockchip,pmu:
|
||||
$ref: '/schemas/types.yaml#/definitions/phandle'
|
||||
description: |
|
||||
Specifies the syscon node controlling the cpu core power domains.
|
||||
|
||||
Optional for systems that have an "enable-method"
|
||||
property value of "rockchip,rk3066-smp"
|
||||
While optional, it is the preferred way to get access to
|
||||
the cpu-core power-domains.
|
||||
|
||||
required:
|
||||
- device_type
|
||||
- reg
|
||||
- compatible
|
||||
|
||||
dependencies:
|
||||
cpu-release-addr: [enable-method]
|
||||
rockchip,pmu: [enable-method]
|
||||
|
||||
required:
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
|
||||
examples:
|
||||
- |
|
||||
cpus {
|
||||
#size-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x1>;
|
||||
};
|
||||
|
||||
cpu@100 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
reg = <0x100>;
|
||||
};
|
||||
|
||||
cpu@101 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
reg = <0x101>;
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
// Example 2 (Cortex-A8 uniprocessor 32-bit system):
|
||||
cpus {
|
||||
#size-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a8";
|
||||
reg = <0x0>;
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
// Example 3 (ARM 926EJ-S uniprocessor 32-bit system):
|
||||
cpus {
|
||||
#size-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,arm926ej-s";
|
||||
reg = <0x0>;
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
// Example 4 (ARM Cortex-A57 64-bit system):
|
||||
cpus {
|
||||
#size-cells = <0>;
|
||||
#address-cells = <2>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x0>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x1>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@100 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x100>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@101 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x101>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@10000 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x10000>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@10001 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x10001>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@10100 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x10100>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@10101 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x10101>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@100000000 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x0>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@100000001 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x1>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@100000100 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x100>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@100000101 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x101>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@100010000 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x10000>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@100010001 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x10001>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@100010100 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x10100>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
cpu@100010101 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x10101>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
};
|
||||
...
|
||||
|
|
@ -1,25 +0,0 @@
|
|||
Texas Instruments DaVinci Platforms Device Tree Bindings
|
||||
--------------------------------------------------------
|
||||
|
||||
DA850/OMAP-L138/AM18x Evaluation Module (EVM) board
|
||||
Required root node properties:
|
||||
- compatible = "ti,da850-evm", "ti,da850";
|
||||
|
||||
DA850/OMAP-L138/AM18x L138/C6748 Development Kit (LCDK) board
|
||||
Required root node properties:
|
||||
- compatible = "ti,da850-lcdk", "ti,da850";
|
||||
|
||||
EnBW AM1808 based CMC board
|
||||
Required root node properties:
|
||||
- compatible = "enbw,cmc", "ti,da850;
|
||||
|
||||
LEGO MINDSTORMS EV3 (AM1808 based)
|
||||
Required root node properties:
|
||||
- compatible = "lego,ev3", "ti,da850";
|
||||
|
||||
Generic DaVinci Boards
|
||||
----------------------
|
||||
|
||||
DA850/OMAP-L138/AM18x generic board
|
||||
Required root node properties:
|
||||
- compatible = "ti,da850";
|
||||
|
|
@ -1,14 +0,0 @@
|
|||
TI-NSPIRE calculators
|
||||
|
||||
Required properties:
|
||||
- compatible: Compatible property value should contain "ti,nspire".
|
||||
CX models should have "ti,nspire-cx"
|
||||
Touchpad models should have "ti,nspire-tp"
|
||||
Clickpad models should have "ti,nspire-clp"
|
||||
|
||||
Example:
|
||||
|
||||
/ {
|
||||
model = "TI-NSPIRE CX";
|
||||
compatible = "ti,nspire-cx";
|
||||
...
|
||||
|
|
@ -1,46 +0,0 @@
|
|||
* ARM Primecell Peripherals
|
||||
|
||||
ARM, Ltd. Primecell peripherals have a standard id register that can be used to
|
||||
identify the peripheral type, vendor, and revision. This value can be used for
|
||||
driver matching.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : should be a specific name for the peripheral and
|
||||
"arm,primecell". The specific name will match the ARM
|
||||
engineering name for the logic block in the form: "arm,pl???"
|
||||
|
||||
Optional properties:
|
||||
|
||||
- arm,primecell-periphid : Value to override the h/w value with
|
||||
- clocks : From common clock binding. First clock is phandle to clock for apb
|
||||
pclk. Additional clocks are optional and specific to those peripherals.
|
||||
- clock-names : From common clock binding. Shall be "apb_pclk" for first clock.
|
||||
- dmas : From common DMA binding. If present, refers to one or more dma channels.
|
||||
- dma-names : From common DMA binding, needs to match the 'dmas' property.
|
||||
Devices with exactly one receive and transmit channel shall name
|
||||
these "rx" and "tx", respectively.
|
||||
- pinctrl-<n> : Pinctrl states as described in bindings/pinctrl/pinctrl-bindings.txt
|
||||
- pinctrl-names : Names corresponding to the numbered pinctrl states
|
||||
- interrupts : one or more interrupt specifiers
|
||||
- interrupt-names : names corresponding to the interrupts properties
|
||||
|
||||
Example:
|
||||
|
||||
serial@fff36000 {
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
arm,primecell-periphid = <0x00341011>;
|
||||
|
||||
clocks = <&pclk>;
|
||||
clock-names = "apb_pclk";
|
||||
|
||||
dmas = <&dma-controller 4>, <&dma-controller 5>;
|
||||
dma-names = "rx", "tx";
|
||||
|
||||
pinctrl-0 = <&uart0_default_mux>, <&uart0_default_mode>;
|
||||
pinctrl-1 = <&uart0_sleep_mode>;
|
||||
pinctrl-names = "default","sleep";
|
||||
|
||||
interrupts = <0 11 0x4>;
|
||||
};
|
||||
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/primecell.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM Primecell Peripherals
|
||||
|
||||
maintainers:
|
||||
- Rob Herring <robh@kernel.org>
|
||||
|
||||
description: |+
|
||||
ARM, Ltd. Primecell peripherals have a standard id register that can be used to
|
||||
identify the peripheral type, vendor, and revision. This value can be used for
|
||||
driver matching.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: arm,primecell
|
||||
description:
|
||||
Should be a specific name for the peripheral followed by "arm,primecell".
|
||||
The specific name will match the ARM engineering name for the logic block
|
||||
in the form "arm,pl???"
|
||||
|
||||
arm,primecell-periphid:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: Value to override the h/w ID value
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 32
|
||||
clock-names:
|
||||
contains:
|
||||
const: apb_pclk
|
||||
additionalItems: true
|
||||
...
|
||||
|
|
@ -1,57 +0,0 @@
|
|||
QCOM device tree bindings
|
||||
-------------------------
|
||||
|
||||
Some qcom based bootloaders identify the dtb blob based on a set of
|
||||
device properties like SoC and platform and revisions of those components.
|
||||
To support this scheme, we encode this information into the board compatible
|
||||
string.
|
||||
|
||||
Each board must specify a top-level board compatible string with the following
|
||||
format:
|
||||
|
||||
compatible = "qcom,<SoC>[-<soc_version>][-<foundry_id>]-<board>[/<subtype>][-<board_version>]"
|
||||
|
||||
The 'SoC' and 'board' elements are required. All other elements are optional.
|
||||
|
||||
The 'SoC' element must be one of the following strings:
|
||||
|
||||
apq8016
|
||||
apq8074
|
||||
apq8084
|
||||
apq8096
|
||||
msm8916
|
||||
msm8974
|
||||
msm8992
|
||||
msm8994
|
||||
msm8996
|
||||
mdm9615
|
||||
ipq8074
|
||||
sdm845
|
||||
|
||||
The 'board' element must be one of the following strings:
|
||||
|
||||
cdp
|
||||
liquid
|
||||
dragonboard
|
||||
mtp
|
||||
sbc
|
||||
hk01
|
||||
|
||||
The 'soc_version' and 'board_version' elements take the form of v<Major>.<Minor>
|
||||
where the minor number may be omitted when it's zero, i.e. v1.0 is the same
|
||||
as v1. If all versions of the 'board_version' elements match, then a
|
||||
wildcard '*' should be used, e.g. 'v*'.
|
||||
|
||||
The 'foundry_id' and 'subtype' elements are one or more digits from 0 to 9.
|
||||
|
||||
Examples:
|
||||
|
||||
"qcom,msm8916-v1-cdp-pm8916-v2.1"
|
||||
|
||||
A CDP board with an msm8916 SoC, version 1 paired with a pm8916 PMIC of version
|
||||
2.1.
|
||||
|
||||
"qcom,apq8074-v2.0-2-dragonboard/1-v0.1"
|
||||
|
||||
A dragonboard board v0.1 of subtype 1 with an apq8074 SoC version 2, made in
|
||||
foundry 2.
|
||||
|
|
@ -0,0 +1,125 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/bindings/arm/qcom.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: QCOM device tree bindings
|
||||
|
||||
maintainers:
|
||||
- Stephen Boyd <sboyd@codeaurora.org>
|
||||
|
||||
description: |
|
||||
Some qcom based bootloaders identify the dtb blob based on a set of
|
||||
device properties like SoC and platform and revisions of those components.
|
||||
To support this scheme, we encode this information into the board compatible
|
||||
string.
|
||||
|
||||
Each board must specify a top-level board compatible string with the following
|
||||
format:
|
||||
|
||||
compatible = "qcom,<SoC>[-<soc_version>][-<foundry_id>]-<board>[/<subtype>][-<board_version>]"
|
||||
|
||||
The 'SoC' and 'board' elements are required. All other elements are optional.
|
||||
|
||||
The 'SoC' element must be one of the following strings:
|
||||
|
||||
apq8016
|
||||
apq8074
|
||||
apq8084
|
||||
apq8096
|
||||
msm8916
|
||||
msm8974
|
||||
msm8992
|
||||
msm8994
|
||||
msm8996
|
||||
mdm9615
|
||||
ipq8074
|
||||
sdm845
|
||||
|
||||
The 'board' element must be one of the following strings:
|
||||
|
||||
cdp
|
||||
liquid
|
||||
dragonboard
|
||||
mtp
|
||||
sbc
|
||||
hk01
|
||||
|
||||
The 'soc_version' and 'board_version' elements take the form of v<Major>.<Minor>
|
||||
where the minor number may be omitted when it's zero, i.e. v1.0 is the same
|
||||
as v1. If all versions of the 'board_version' elements match, then a
|
||||
wildcard '*' should be used, e.g. 'v*'.
|
||||
|
||||
The 'foundry_id' and 'subtype' elements are one or more digits from 0 to 9.
|
||||
|
||||
Examples:
|
||||
|
||||
"qcom,msm8916-v1-cdp-pm8916-v2.1"
|
||||
|
||||
A CDP board with an msm8916 SoC, version 1 paired with a pm8916 PMIC of version
|
||||
2.1.
|
||||
|
||||
"qcom,apq8074-v2.0-2-dragonboard/1-v0.1"
|
||||
|
||||
A dragonboard board v0.1 of subtype 1 with an apq8074 SoC version 2, made in
|
||||
foundry 2.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,apq8016-sbc
|
||||
- const: qcom,apq8016
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,apq8064-cm-qs600
|
||||
- qcom,apq8064-ifc6410
|
||||
- const: qcom,apq8064
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,apq8074-dragonboard
|
||||
- const: qcom,apq8074
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,apq8060-dragonboard
|
||||
- qcom,msm8660-surf
|
||||
- const: qcom,msm8660
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,apq8084-mtp
|
||||
- qcom,apq8084-sbc
|
||||
- const: qcom,apq8084
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,msm8960-cdp
|
||||
- const: qcom,msm8960
|
||||
|
||||
- items:
|
||||
- const: qcom,msm8916-mtp/1
|
||||
- const: qcom,msm8916-mtp
|
||||
- const: qcom,msm8916
|
||||
|
||||
- items:
|
||||
- const: qcom,msm8996-mtp
|
||||
|
||||
- items:
|
||||
- const: qcom,ipq4019
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,ipq8064-ap148
|
||||
- const: qcom,ipq8064
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,ipq8074-hk01
|
||||
- const: qcom,ipq8074
|
||||
|
||||
...
|
||||
|
|
@ -27,7 +27,7 @@ SoCs:
|
|||
compatible = "renesas,r8a77470"
|
||||
- RZ/G2M (R8A774A1)
|
||||
compatible = "renesas,r8a774a1"
|
||||
- RZ/G2E (RA8774C0)
|
||||
- RZ/G2E (R8A774C0)
|
||||
compatible = "renesas,r8a774c0"
|
||||
- R-Car M1A (R8A77781)
|
||||
compatible = "renesas,r8a7778"
|
||||
|
|
|
|||
|
|
@ -1,11 +0,0 @@
|
|||
CSR SiRFprimaII and SiRFmarco device tree bindings.
|
||||
========================================
|
||||
|
||||
Required root node properties:
|
||||
- compatible:
|
||||
- "sirf,atlas6-cb" : atlas6 "cb" evaluation board
|
||||
- "sirf,atlas6" : atlas6 device based board
|
||||
- "sirf,atlas7-cb" : atlas7 "cb" evaluation board
|
||||
- "sirf,atlas7" : atlas7 device based board
|
||||
- "sirf,prima2-cb" : prima2 "cb" evaluation board
|
||||
- "sirf,prima2" : prima2 device based board
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/sirf.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: CSR SiRFprimaII and SiRFmarco device tree bindings.
|
||||
|
||||
maintainers:
|
||||
- Binghua Duan <binghua.duan@csr.com>
|
||||
- Barry Song <Baohua.Song@csr.com>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- const: sirf,atlas6-cb
|
||||
- const: sirf,atlas6
|
||||
- items:
|
||||
- const: sirf,atlas7-cb
|
||||
- const: sirf,atlas7
|
||||
- items:
|
||||
- const: sirf,prima2-cb
|
||||
- const: sirf,prima2
|
||||
...
|
||||
|
|
@ -1,26 +0,0 @@
|
|||
ST SPEAr Platforms Device Tree Bindings
|
||||
---------------------------------------
|
||||
|
||||
Boards with the ST SPEAr600 SoC shall have the following properties:
|
||||
Required root node property:
|
||||
compatible = "st,spear600";
|
||||
|
||||
Boards with the ST SPEAr300 SoC shall have the following properties:
|
||||
Required root node property:
|
||||
compatible = "st,spear300";
|
||||
|
||||
Boards with the ST SPEAr310 SoC shall have the following properties:
|
||||
Required root node property:
|
||||
compatible = "st,spear310";
|
||||
|
||||
Boards with the ST SPEAr320 SoC shall have the following properties:
|
||||
Required root node property:
|
||||
compatible = "st,spear320";
|
||||
|
||||
Boards with the ST SPEAr1310 SoC shall have the following properties:
|
||||
Required root node property:
|
||||
compatible = "st,spear1310";
|
||||
|
||||
Boards with the ST SPEAr1340 SoC shall have the following properties:
|
||||
Required root node property:
|
||||
compatible = "st,spear1340";
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/spear.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ST SPEAr Platforms Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Viresh Kumar <vireshk@kernel.org>
|
||||
- Stefan Roese <sr@denx.de>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- st,spear600
|
||||
- st,spear300
|
||||
- st,spear310
|
||||
- st,spear320
|
||||
- st,spear1310
|
||||
- st,spear1340
|
||||
...
|
||||
|
|
@ -1,23 +0,0 @@
|
|||
ST STi Platforms Device Tree Bindings
|
||||
---------------------------------------
|
||||
|
||||
Boards with the ST STiH415 SoC shall have the following properties:
|
||||
Required root node property:
|
||||
compatible = "st,stih415";
|
||||
|
||||
Boards with the ST STiH416 SoC shall have the following properties:
|
||||
Required root node property:
|
||||
compatible = "st,stih416";
|
||||
|
||||
Boards with the ST STiH407 SoC shall have the following properties:
|
||||
Required root node property:
|
||||
compatible = "st,stih407";
|
||||
|
||||
Boards with the ST STiH410 SoC shall have the following properties:
|
||||
Required root node property:
|
||||
compatible = "st,stih410";
|
||||
|
||||
Boards with the ST STiH418 SoC shall have the following properties:
|
||||
Required root node property:
|
||||
compatible = "st,stih418";
|
||||
|
||||
|
|
@ -0,0 +1,23 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/sti.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ST STi Platforms Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Patrice Chotard <patrice.chotard@st.com>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- st,stih415
|
||||
- st,stih416
|
||||
- st,stih407
|
||||
- st,stih410
|
||||
- st,stih418
|
||||
...
|
||||
|
|
@ -1,65 +0,0 @@
|
|||
NVIDIA Tegra device tree bindings
|
||||
-------------------------------------------
|
||||
|
||||
SoCs
|
||||
-------------------------------------------
|
||||
|
||||
Each device tree must specify which Tegra SoC it uses, using one of the
|
||||
following compatible values:
|
||||
|
||||
nvidia,tegra20
|
||||
nvidia,tegra30
|
||||
nvidia,tegra114
|
||||
nvidia,tegra124
|
||||
nvidia,tegra132
|
||||
nvidia,tegra210
|
||||
nvidia,tegra186
|
||||
nvidia,tegra194
|
||||
|
||||
Boards
|
||||
-------------------------------------------
|
||||
|
||||
Each device tree must specify which one or more of the following
|
||||
board-specific compatible values:
|
||||
|
||||
ad,medcom-wide
|
||||
ad,plutux
|
||||
ad,tamonten
|
||||
ad,tec
|
||||
compal,paz00
|
||||
compulab,trimslice
|
||||
nvidia,beaver
|
||||
nvidia,cardhu
|
||||
nvidia,cardhu-a02
|
||||
nvidia,cardhu-a04
|
||||
nvidia,dalmore
|
||||
nvidia,harmony
|
||||
nvidia,jetson-tk1
|
||||
nvidia,norrin
|
||||
nvidia,p2371-0000
|
||||
nvidia,p2371-2180
|
||||
nvidia,p2571
|
||||
nvidia,p2771-0000
|
||||
nvidia,p2972-0000
|
||||
nvidia,roth
|
||||
nvidia,seaboard
|
||||
nvidia,tn7
|
||||
nvidia,ventana
|
||||
toradex,apalis_t30
|
||||
toradex,apalis_t30-eval
|
||||
toradex,apalis_t30-v1.1
|
||||
toradex,apalis_t30-v1.1-eval
|
||||
toradex,apalis-tk1
|
||||
toradex,apalis-tk1-eval
|
||||
toradex,apalis-tk1-v1.2
|
||||
toradex,apalis-tk1-v1.2-eval
|
||||
toradex,colibri_t20
|
||||
toradex,colibri_t20-eval-v3
|
||||
toradex,colibri_t20-iris
|
||||
toradex,colibri_t30
|
||||
toradex,colibri_t30-eval-v3
|
||||
|
||||
Trusted Foundations
|
||||
-------------------------------------------
|
||||
Tegra supports the Trusted Foundation secure monitor. See the
|
||||
"tlm,trusted-foundations" binding's documentation for more details.
|
||||
|
|
@ -0,0 +1,101 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/tegra.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra device tree bindings
|
||||
|
||||
maintainers:
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
- Jonathan Hunter <jonathanh@nvidia.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- compal,paz00
|
||||
- compulab,trimslice
|
||||
- nvidia,harmony
|
||||
- nvidia,seaboard
|
||||
- nvidia,ventana
|
||||
- const: nvidia,tegra20
|
||||
- items:
|
||||
- enum:
|
||||
- ad,medcom-wide
|
||||
- ad,plutux
|
||||
- ad,tec
|
||||
- const: ad,tamonten
|
||||
- const: nvidia,tegra20
|
||||
- items:
|
||||
- enum:
|
||||
- toradex,colibri_t20-eval-v3
|
||||
- toradex,colibri_t20-iris
|
||||
- const: toradex,colibri_t20
|
||||
- const: nvidia,tegra20
|
||||
- items:
|
||||
- enum:
|
||||
- nvidia,beaver
|
||||
- const: nvidia,tegra30
|
||||
- items:
|
||||
- enum:
|
||||
- nvidia,cardhu-a02
|
||||
- nvidia,cardhu-a04
|
||||
- const: nvidia,cardhu
|
||||
- const: nvidia,tegra30
|
||||
- items:
|
||||
- const: toradex,apalis_t30-eval
|
||||
- const: toradex,apalis_t30
|
||||
- const: nvidia,tegra30
|
||||
- items:
|
||||
- const: toradex,apalis_t30-eval-v1.1
|
||||
- const: toradex,apalis_t30-eval
|
||||
- const: toradex,apalis_t30-v1.1
|
||||
- const: toradex,apalis_t30
|
||||
- const: nvidia,tegra30
|
||||
- items:
|
||||
- enum:
|
||||
- toradex,colibri_t30-eval-v3
|
||||
- const: toradex,colibri_t30
|
||||
- const: nvidia,tegra30
|
||||
- items:
|
||||
- enum:
|
||||
- nvidia,dalmore
|
||||
- nvidia,roth
|
||||
- nvidia,tn7
|
||||
- const: nvidia,tegra114
|
||||
- items:
|
||||
- enum:
|
||||
- nvidia,jetson-tk1
|
||||
- nvidia,venice2
|
||||
- const: nvidia,tegra124
|
||||
- items:
|
||||
- const: toradex,apalis-tk1-eval
|
||||
- const: toradex,apalis-tk1
|
||||
- const: nvidia,tegra124
|
||||
- items:
|
||||
- const: toradex,apalis-tk1-v1.2-eval
|
||||
- const: toradex,apalis-tk1-eval
|
||||
- const: toradex,apalis-tk1-v1.2
|
||||
- const: toradex,apalis-tk1
|
||||
- const: nvidia,tegra124
|
||||
- items:
|
||||
- enum:
|
||||
- nvidia,norrin
|
||||
- const: nvidia,tegra132
|
||||
- const: nvidia,tegra124
|
||||
- items:
|
||||
- enum:
|
||||
- nvidia,p2371-0000
|
||||
- nvidia,p2371-2180
|
||||
- nvidia,p2571
|
||||
- const: nvidia,tegra210
|
||||
- items:
|
||||
- enum:
|
||||
- nvidia,p2771-0000
|
||||
- const: nvidia,tegra186
|
||||
- items:
|
||||
- enum:
|
||||
- nvidia,p2972-0000
|
||||
- const: nvidia,tegra194
|
||||
|
|
@ -0,0 +1,24 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/ti/nspire.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: TI-NSPIRE calculators
|
||||
|
||||
maintainers:
|
||||
- Daniel Tang <dt.tangr@gmail.com>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
# CX models
|
||||
- ti,nspire-cx
|
||||
# Touchpad models
|
||||
- ti,nspire-tp
|
||||
# Clickpad models
|
||||
- ti,nspire-clp
|
||||
...
|
||||
|
|
@ -0,0 +1,26 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/ti/davinci.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Texas Instruments DaVinci Platforms Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Sekhar Nori <nsekhar@ti.com>
|
||||
|
||||
description:
|
||||
DA850/OMAP-L138/AM18x based boards
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- ti,da850-evm # DA850/OMAP-L138/AM18x Evaluation Module (EVM) board
|
||||
- ti,da850-lcdk # DA850/OMAP-L138/AM18x L138/C6748 Development Kit (LCDK) board
|
||||
- enbw,cmc # EnBW AM1808 based CMC board
|
||||
- lego,ev3 # LEGO MINDSTORMS EV3 (AM1808 based)
|
||||
- const: ti,da850
|
||||
...
|
||||
|
|
@ -1,22 +0,0 @@
|
|||
VIA/Wondermedia VT8500 Platforms Device Tree Bindings
|
||||
---------------------------------------
|
||||
|
||||
Boards with the VIA VT8500 SoC shall have the following properties:
|
||||
Required root node property:
|
||||
compatible = "via,vt8500";
|
||||
|
||||
Boards with the Wondermedia WM8505 SoC shall have the following properties:
|
||||
Required root node property:
|
||||
compatible = "wm,wm8505";
|
||||
|
||||
Boards with the Wondermedia WM8650 SoC shall have the following properties:
|
||||
Required root node property:
|
||||
compatible = "wm,wm8650";
|
||||
|
||||
Boards with the Wondermedia WM8750 SoC shall have the following properties:
|
||||
Required root node property:
|
||||
compatible = "wm,wm8750";
|
||||
|
||||
Boards with the Wondermedia WM8850 SoC shall have the following properties:
|
||||
Required root node property:
|
||||
compatible = "wm,wm8850";
|
||||
|
|
@ -0,0 +1,23 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/vt8500.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: VIA/Wondermedia VT8500 Platforms Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Tony Prisk <linux@prisktech.co.nz>
|
||||
description: test
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- via,vt8500
|
||||
- wm,wm8505
|
||||
- wm,wm8650
|
||||
- wm,wm8750
|
||||
- wm,wm8850
|
||||
|
|
@ -1,83 +0,0 @@
|
|||
Xilinx Zynq Platforms Device Tree Bindings
|
||||
|
||||
Boards with Zynq-7000 SOC based on an ARM Cortex A9 processor
|
||||
shall have the following properties.
|
||||
|
||||
Required root node properties:
|
||||
- compatible = "xlnx,zynq-7000";
|
||||
|
||||
Additional compatible strings:
|
||||
|
||||
- Adapteva Parallella board
|
||||
"adapteva,parallella"
|
||||
|
||||
- Avnet MicroZed board
|
||||
"avnet,zynq-microzed"
|
||||
"xlnx,zynq-microzed"
|
||||
|
||||
- Avnet ZedBoard board
|
||||
"avnet,zynq-zed"
|
||||
"xlnx,zynq-zed"
|
||||
|
||||
- Digilent Zybo board
|
||||
"digilent,zynq-zybo"
|
||||
|
||||
- Digilent Zybo Z7 board
|
||||
"digilent,zynq-zybo-z7"
|
||||
|
||||
- Xilinx CC108 internal board
|
||||
"xlnx,zynq-cc108"
|
||||
|
||||
- Xilinx ZC702 internal board
|
||||
"xlnx,zynq-zc702"
|
||||
|
||||
- Xilinx ZC706 internal board
|
||||
"xlnx,zynq-zc706"
|
||||
|
||||
- Xilinx ZC770 internal board, with different FMC cards
|
||||
"xlnx,zynq-zc770-xm010"
|
||||
"xlnx,zynq-zc770-xm011"
|
||||
"xlnx,zynq-zc770-xm012"
|
||||
"xlnx,zynq-zc770-xm013"
|
||||
|
||||
---------------------------------------------------------------
|
||||
|
||||
Xilinx Zynq UltraScale+ MPSoC Platforms Device Tree Bindings
|
||||
|
||||
Boards with ZynqMP SOC based on an ARM Cortex A53 processor
|
||||
shall have the following properties.
|
||||
|
||||
Required root node properties:
|
||||
- compatible = "xlnx,zynqmp";
|
||||
|
||||
|
||||
Additional compatible strings:
|
||||
|
||||
- Xilinx internal board zc1232
|
||||
"xlnx,zynqmp-zc1232-revA", "xlnx,zynqmp-zc1232"
|
||||
|
||||
- Xilinx internal board zc1254
|
||||
"xlnx,zynqmp-zc1254-revA", "xlnx,zynqmp-zc1254"
|
||||
|
||||
- Xilinx internal board zc1275
|
||||
"xlnx,zynqmp-zc1275-revA", "xlnx,zynqmp-zc1275"
|
||||
|
||||
- Xilinx internal board zc1751
|
||||
"xlnx,zynqmp-zc1751"
|
||||
|
||||
- Xilinx 96boards compatible board zcu100
|
||||
"xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100"
|
||||
|
||||
- Xilinx evaluation board zcu102
|
||||
"xlnx,zynqmp-zcu102-revA", "xlnx,zynqmp-zcu102"
|
||||
"xlnx,zynqmp-zcu102-revB", "xlnx,zynqmp-zcu102"
|
||||
"xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102"
|
||||
|
||||
- Xilinx evaluation board zcu104
|
||||
"xlnx,zynqmp-zcu104-revA", "xlnx,zynqmp-zcu104"
|
||||
|
||||
- Xilinx evaluation board zcu106
|
||||
"xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106"
|
||||
|
||||
- Xilinx evaluation board zcu111
|
||||
"xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111"
|
||||
|
|
@ -0,0 +1,114 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/xilinx.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Xilinx Zynq Platforms Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Michal Simek <michal.simek@xilinx.com>
|
||||
|
||||
description: |
|
||||
Xilinx boards with Zynq-7000 SOC or Zynq UltraScale+ MPSoC
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- adapteva,parallella
|
||||
- digilent,zynq-zybo
|
||||
- digilent,zynq-zybo-z7
|
||||
- xlnx,zynq-cc108
|
||||
- xlnx,zynq-zc702
|
||||
- xlnx,zynq-zc706
|
||||
- xlnx,zynq-zc770-xm010
|
||||
- xlnx,zynq-zc770-xm011
|
||||
- xlnx,zynq-zc770-xm012
|
||||
- xlnx,zynq-zc770-xm013
|
||||
- const: xlnx,zynq-7000
|
||||
|
||||
- items:
|
||||
- const: avnet,zynq-microzed
|
||||
- const: xlnx,zynq-microzed
|
||||
- const: xlnx,zynq-7000
|
||||
|
||||
- items:
|
||||
- const: avnet,zynq-zed
|
||||
- const: xlnx,zynq-zed
|
||||
- const: xlnx,zynq-7000
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- xlnx,zynqmp-zc1751
|
||||
- const: xlnx,zynqmp
|
||||
|
||||
- description: Xilinx internal board zc1232
|
||||
items:
|
||||
- const: xlnx,zynqmp-zc1232-revA
|
||||
- const: xlnx,zynqmp-zc1232
|
||||
- const: xlnx,zynqmp
|
||||
|
||||
- description: Xilinx internal board zc1254
|
||||
items:
|
||||
- const: xlnx,zynqmp-zc1254-revA
|
||||
- const: xlnx,zynqmp-zc1254
|
||||
- const: xlnx,zynqmp
|
||||
|
||||
- description: Xilinx internal board zc1275
|
||||
items:
|
||||
- const: xlnx,zynqmp-zc1275-revA
|
||||
- const: xlnx,zynqmp-zc1275
|
||||
- const: xlnx,zynqmp
|
||||
|
||||
- description: Xilinx 96boards compatible board zcu100
|
||||
items:
|
||||
- const: xlnx,zynqmp-zcu100-revC
|
||||
- const: xlnx,zynqmp-zcu100
|
||||
- const: xlnx,zynqmp
|
||||
|
||||
- description: Xilinx 96boards compatible board Ultra96
|
||||
items:
|
||||
- const: avnet,ultra96-rev1
|
||||
- const: avnet,ultra96
|
||||
- const: xlnx,zynqmp-zcu100-revC
|
||||
- const: xlnx,zynqmp-zcu100
|
||||
- const: xlnx,zynqmp
|
||||
|
||||
- description: Xilinx evaluation board zcu102
|
||||
items:
|
||||
- enum:
|
||||
- xlnx,zynqmp-zcu102-revA
|
||||
- xlnx,zynqmp-zcu102-revB
|
||||
- xlnx,zynqmp-zcu102-rev1.0
|
||||
- const: xlnx,zynqmp-zcu102
|
||||
- const: xlnx,zynqmp
|
||||
|
||||
- description: Xilinx evaluation board zcu104
|
||||
items:
|
||||
- enum:
|
||||
- xlnx,zynqmp-zcu104-revA
|
||||
- xlnx,zynqmp-zcu104-rev1.0
|
||||
- const: xlnx,zynqmp-zcu104
|
||||
- const: xlnx,zynqmp
|
||||
|
||||
- description: Xilinx evaluation board zcu106
|
||||
items:
|
||||
- enum:
|
||||
- xlnx,zynqmp-zcu106-revA
|
||||
- xlnx,zynqmp-zcu106-rev1.0
|
||||
- const: xlnx,zynqmp-zcu106
|
||||
- const: xlnx,zynqmp
|
||||
|
||||
- description: Xilinx evaluation board zcu111
|
||||
items:
|
||||
- enum:
|
||||
- xlnx,zynqmp-zcu111-revA
|
||||
- xlnx,zynqmp-zcu11-rev1.0
|
||||
- const: xlnx,zynqmp-zcu111
|
||||
- const: xlnx,zynqmp
|
||||
|
||||
...
|
||||
|
|
@ -1,14 +0,0 @@
|
|||
ZTE platforms device tree bindings
|
||||
|
||||
---------------------------------------
|
||||
- ZX296702 board:
|
||||
Required root node properties:
|
||||
- compatible = "zte,zx296702-ad1", "zte,zx296702"
|
||||
|
||||
---------------------------------------
|
||||
- ZX296718 SoC:
|
||||
Required root node properties:
|
||||
- compatible = "zte,zx296718"
|
||||
|
||||
ZX296718 EVB board:
|
||||
- "zte,zx296718-evb"
|
||||
|
|
@ -0,0 +1,26 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/zte.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ZTE platforms device tree bindings
|
||||
|
||||
maintainers:
|
||||
- Jun Nie <jun.nie@linaro.org>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- zte,zx296702-ad1
|
||||
- const: zte,zx296702
|
||||
- items:
|
||||
- enum:
|
||||
- zte,zx296718-evb
|
||||
- const: zte,zx296718
|
||||
|
||||
...
|
||||
|
|
@ -0,0 +1,170 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
# Copyright 2018 Linaro Ltd.
|
||||
%YAML 1.2
|
||||
---
|
||||
# All the top-level keys are standard json-schema keywords except for
|
||||
# 'maintainers' and 'select'
|
||||
|
||||
# $id is a unique idenifier based on the filename. There may or may not be a
|
||||
# file present at the URL.
|
||||
$id: "http://devicetree.org/schemas/example-schema.yaml#"
|
||||
# $schema is the meta-schema this schema should be validated with.
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: An example schema annotated with jsonschema details
|
||||
|
||||
maintainers:
|
||||
- Rob Herring <robh@kernel.org>
|
||||
|
||||
description: |
|
||||
A more detailed multi-line description of the binding.
|
||||
|
||||
Details about the hardware device and any links to datasheets can go here.
|
||||
|
||||
Literal blocks are marked with the '|' at the beginning. The end is marked by
|
||||
indentation less than the first line of the literal block. Lines also cannot
|
||||
begin with a tab character.
|
||||
|
||||
select: false
|
||||
# 'select' is a schema applied to a DT node to determine if this binding
|
||||
# schema should be applied to the node. It is optional and by default the
|
||||
# possible compatible strings are extracted and used to match.
|
||||
|
||||
# In this case, a 'false' schema will never match.
|
||||
|
||||
properties:
|
||||
# A dictionary of DT properties for this binding schema
|
||||
compatible:
|
||||
# More complicated schema can use oneOf (XOR), anyOf (OR), or allOf (AND)
|
||||
# to handle different conditions.
|
||||
# In this case, it's needed to handle a variable number of values as there
|
||||
# isn't another way to express a constraint of the last string value.
|
||||
# The boolean schema must be a list of schemas.
|
||||
oneOf:
|
||||
- items:
|
||||
# items is a list of possible values for the property. The number of
|
||||
# values is determined by the number of elements in the list.
|
||||
# Order in lists is significant, order in dicts is not
|
||||
# Must be one of the 1st enums followed by the 2nd enum
|
||||
#
|
||||
# Each element in items should be 'enum' or 'const'
|
||||
- enum:
|
||||
- vendor,soc4-ip
|
||||
- vendor,soc3-ip
|
||||
- vendor,soc2-ip
|
||||
- enum:
|
||||
- vendor,soc1-ip
|
||||
# additionalItems being false is implied
|
||||
# minItems/maxItems equal to 2 is implied
|
||||
- items:
|
||||
# 'const' is just a special case of an enum with a single possible value
|
||||
- const: vendor,soc1-ip
|
||||
|
||||
reg:
|
||||
# The core schema already checks that reg values are numbers, so device
|
||||
# specific schema don't need to do those checks.
|
||||
# The description of each element defines the order and implicitly defines
|
||||
# the number of reg entries.
|
||||
items:
|
||||
- description: core registers
|
||||
- description: aux registers
|
||||
# minItems/maxItems equal to 2 is implied
|
||||
|
||||
reg-names:
|
||||
# The core schema enforces this is a string array
|
||||
items:
|
||||
- const: core
|
||||
- const: aux
|
||||
|
||||
clocks:
|
||||
# Cases that have only a single entry just need to express that with maxItems
|
||||
maxItems: 1
|
||||
description: bus clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
|
||||
interrupts:
|
||||
# Either 1 or 2 interrupts can be present
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
items:
|
||||
- description: tx or combined interrupt
|
||||
- description: rx interrupt
|
||||
description:
|
||||
A variable number of interrupts warrants a description of what conditions
|
||||
affect the number of interrupts. Otherwise, descriptions on standard
|
||||
properties are not necessary.
|
||||
|
||||
interrupt-names:
|
||||
# minItems must be specified here because the default would be 2
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
items:
|
||||
- const: tx irq
|
||||
- const: rx irq
|
||||
|
||||
# Property names starting with '#' must be quoted
|
||||
'#interrupt-cells':
|
||||
# A simple case where the value must always be '2'.
|
||||
# The core schema handles that this must be a single integer.
|
||||
const: 2
|
||||
|
||||
interrupt-controller: true
|
||||
# The core checks this is a boolean, so just have to list it here to be
|
||||
# valid for this binding.
|
||||
|
||||
clock-frequency:
|
||||
# The type is set in the core schema. Per device schema only need to set
|
||||
# constraints on the possible values.
|
||||
minimum: 100
|
||||
maximum: 400000
|
||||
# The value that should be used if the property is not present
|
||||
default: 200
|
||||
|
||||
foo-gpios:
|
||||
maxItems: 1
|
||||
description: A connection of the 'foo' gpio line.
|
||||
|
||||
vendor,int-property:
|
||||
description: Vendor specific properties must have a description
|
||||
# 'allOf' is the json-schema way of subclassing a schema. Here the base
|
||||
# type schema is referenced and then additional constraints on the values
|
||||
# are added.
|
||||
allOf:
|
||||
- $ref: /schemas/types.yaml#/definitions/uint32
|
||||
- enum: [2, 4, 6, 8, 10]
|
||||
|
||||
vendor,bool-property:
|
||||
description: Vendor specific properties must have a description
|
||||
# boolean properties is one case where the json-schema 'type' keyword
|
||||
# can be used directly
|
||||
type: boolean
|
||||
|
||||
vendor,string-array-property:
|
||||
description: Vendor specific properties should reference a type in the
|
||||
core schema.
|
||||
allOf:
|
||||
- $ref: /schemas/types.yaml#/definitions/string-array
|
||||
- items:
|
||||
- enum: [ foo, bar ]
|
||||
- enum: [ baz, boo ]
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-controller
|
||||
|
||||
examples:
|
||||
# Examples are now compiled with dtc
|
||||
- |
|
||||
node@1000 {
|
||||
compatible = "vendor,soc4-ip", "vendor,soc1-ip";
|
||||
reg = <0x1000 0x80>,
|
||||
<0x3000 0x80>;
|
||||
reg-names = "core", "aux";
|
||||
interrupts = <10>;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
|
@ -1,46 +0,0 @@
|
|||
Device-Tree bindings for i2c gpio driver
|
||||
|
||||
Required properties:
|
||||
- compatible = "i2c-gpio";
|
||||
- sda-gpios: gpio used for the sda signal, this should be flagged as
|
||||
active high using open drain with (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)
|
||||
from <dt-bindings/gpio/gpio.h> since the signal is by definition
|
||||
open drain.
|
||||
- scl-gpios: gpio used for the scl signal, this should be flagged as
|
||||
active high using open drain with (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)
|
||||
from <dt-bindings/gpio/gpio.h> since the signal is by definition
|
||||
open drain.
|
||||
|
||||
Optional properties:
|
||||
- i2c-gpio,scl-output-only: scl as output only
|
||||
- i2c-gpio,delay-us: delay between GPIO operations (may depend on each platform)
|
||||
- i2c-gpio,timeout-ms: timeout to get data
|
||||
|
||||
Deprecated properties, do not use in new device tree sources:
|
||||
- gpios: sda and scl gpio, alternative for {sda,scl}-gpios
|
||||
- i2c-gpio,sda-open-drain: this means that something outside of our
|
||||
control has put the GPIO line used for SDA into open drain mode, and
|
||||
that something is not the GPIO chip. It is essentially an
|
||||
inconsistency flag.
|
||||
- i2c-gpio,scl-open-drain: this means that something outside of our
|
||||
control has put the GPIO line used for SCL into open drain mode, and
|
||||
that something is not the GPIO chip. It is essentially an
|
||||
inconsistency flag.
|
||||
|
||||
Example nodes:
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
i2c@0 {
|
||||
compatible = "i2c-gpio";
|
||||
sda-gpios = <&pioA 23 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
|
||||
scl-gpios = <&pioA 24 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
|
||||
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
rv3029c2@56 {
|
||||
compatible = "rv3029c2";
|
||||
reg = <0x56>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,73 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/i2c/i2c-gpio.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Bindings for GPIO bitbanged I2C
|
||||
|
||||
maintainers:
|
||||
- Wolfram Sang <wolfram@the-dreams.de>
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/i2c/i2c-controller.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: i2c-gpio
|
||||
|
||||
sda-gpios:
|
||||
description:
|
||||
gpio used for the sda signal, this should be flagged as
|
||||
active high using open drain with (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)
|
||||
from <dt-bindings/gpio/gpio.h> since the signal is by definition
|
||||
open drain.
|
||||
maxItems: 1
|
||||
|
||||
scl-gpios:
|
||||
description:
|
||||
gpio used for the scl signal, this should be flagged as
|
||||
active high using open drain with (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)
|
||||
from <dt-bindings/gpio/gpio.h> since the signal is by definition
|
||||
open drain.
|
||||
maxItems: 1
|
||||
|
||||
i2c-gpio,scl-output-only:
|
||||
description: scl as output only
|
||||
type: boolean
|
||||
|
||||
i2c-gpio,delay-us:
|
||||
description: delay between GPIO operations (may depend on each platform)
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
i2c-gpio,timeout-ms:
|
||||
description: timeout to get data
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
# Deprecated properties, do not use in new device tree sources:
|
||||
gpios:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
description: sda and scl gpio, alternative for {sda,scl}-gpios
|
||||
|
||||
i2c-gpio,sda-open-drain:
|
||||
# Generate a warning if present
|
||||
not: true
|
||||
description: this means that something outside of our control has put
|
||||
the GPIO line used for SDA into open drain mode, and that something is
|
||||
not the GPIO chip. It is essentially an inconsistency flag.
|
||||
|
||||
i2c-gpio,scl-open-drain:
|
||||
# Generate a warning if present
|
||||
not: true
|
||||
description: this means that something outside of our control has put the
|
||||
GPIO line used for SCL into open drain mode, and that something is not
|
||||
the GPIO chip. It is essentially an inconsistency flag.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- sda-gpios
|
||||
- scl-gpios
|
||||
|
||||
...
|
||||
|
|
@ -1,8 +1,12 @@
|
|||
I2C for OMAP platforms
|
||||
|
||||
Required properties :
|
||||
- compatible : Must be "ti,omap2420-i2c", "ti,omap2430-i2c", "ti,omap3-i2c"
|
||||
or "ti,omap4-i2c"
|
||||
- compatible : Must be
|
||||
"ti,omap2420-i2c" for OMAP2420 SoCs
|
||||
"ti,omap2430-i2c" for OMAP2430 SoCs
|
||||
"ti,omap3-i2c" for OMAP3 SoCs
|
||||
"ti,omap4-i2c" for OMAP4+ SoCs
|
||||
"ti,am654-i2c", "ti,omap4-i2c" for AM654 SoCs
|
||||
- ti,hwmods : Must be "i2c<n>", n being the instance number (1-based)
|
||||
- #address-cells = <1>;
|
||||
- #size-cells = <0>;
|
||||
|
|
|
|||
|
|
@ -1,112 +0,0 @@
|
|||
* ARM architected timer
|
||||
|
||||
ARM cores may have a per-core architected timer, which provides per-cpu timers,
|
||||
or a memory mapped architected timer, which provides up to 8 frames with a
|
||||
physical and optional virtual timer per frame.
|
||||
|
||||
The per-core architected timer is attached to a GIC to deliver its
|
||||
per-processor interrupts via PPIs. The memory mapped timer is attached to a GIC
|
||||
to deliver its interrupts via SPIs.
|
||||
|
||||
** CP15 Timer node properties:
|
||||
|
||||
- compatible : Should at least contain one of
|
||||
"arm,armv7-timer"
|
||||
"arm,armv8-timer"
|
||||
|
||||
- interrupts : Interrupt list for secure, non-secure, virtual and
|
||||
hypervisor timers, in that order.
|
||||
|
||||
- clock-frequency : The frequency of the main counter, in Hz. Should be present
|
||||
only where necessary to work around broken firmware which does not configure
|
||||
CNTFRQ on all CPUs to a uniform correct value. Use of this property is
|
||||
strongly discouraged; fix your firmware unless absolutely impossible.
|
||||
|
||||
- always-on : a boolean property. If present, the timer is powered through an
|
||||
always-on power domain, therefore it never loses context.
|
||||
|
||||
- fsl,erratum-a008585 : A boolean property. Indicates the presence of
|
||||
QorIQ erratum A-008585, which says that reading the counter is
|
||||
unreliable unless the same value is returned by back-to-back reads.
|
||||
This also affects writes to the tval register, due to the implicit
|
||||
counter read.
|
||||
|
||||
- hisilicon,erratum-161010101 : A boolean property. Indicates the
|
||||
presence of Hisilicon erratum 161010101, which says that reading the
|
||||
counters is unreliable in some cases, and reads may return a value 32
|
||||
beyond the correct value. This also affects writes to the tval
|
||||
registers, due to the implicit counter read.
|
||||
|
||||
** Optional properties:
|
||||
|
||||
- arm,cpu-registers-not-fw-configured : Firmware does not initialize
|
||||
any of the generic timer CPU registers, which contain their
|
||||
architecturally-defined reset values. Only supported for 32-bit
|
||||
systems which follow the ARMv7 architected reset values.
|
||||
|
||||
- arm,no-tick-in-suspend : The main counter does not tick when the system is in
|
||||
low-power system suspend on some SoCs. This behavior does not match the
|
||||
Architecture Reference Manual's specification that the system counter "must
|
||||
be implemented in an always-on power domain."
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
timer {
|
||||
compatible = "arm,cortex-a15-timer",
|
||||
"arm,armv7-timer";
|
||||
interrupts = <1 13 0xf08>,
|
||||
<1 14 0xf08>,
|
||||
<1 11 0xf08>,
|
||||
<1 10 0xf08>;
|
||||
clock-frequency = <100000000>;
|
||||
};
|
||||
|
||||
** Memory mapped timer node properties:
|
||||
|
||||
- compatible : Should at least contain "arm,armv7-timer-mem".
|
||||
|
||||
- clock-frequency : The frequency of the main counter, in Hz. Should be present
|
||||
only when firmware has not configured the MMIO CNTFRQ registers.
|
||||
|
||||
- reg : The control frame base address.
|
||||
|
||||
Note that #address-cells, #size-cells, and ranges shall be present to ensure
|
||||
the CPU can address a frame's registers.
|
||||
|
||||
A timer node has up to 8 frame sub-nodes, each with the following properties:
|
||||
|
||||
- frame-number: 0 to 7.
|
||||
|
||||
- interrupts : Interrupt list for physical and virtual timers in that order.
|
||||
The virtual timer interrupt is optional.
|
||||
|
||||
- reg : The first and second view base addresses in that order. The second view
|
||||
base address is optional.
|
||||
|
||||
- status : "disabled" indicates the frame is not available for use. Optional.
|
||||
|
||||
Example:
|
||||
|
||||
timer@f0000000 {
|
||||
compatible = "arm,armv7-timer-mem";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
reg = <0xf0000000 0x1000>;
|
||||
clock-frequency = <50000000>;
|
||||
|
||||
frame@f0001000 {
|
||||
frame-number = <0>
|
||||
interrupts = <0 13 0x8>,
|
||||
<0 14 0x8>;
|
||||
reg = <0xf0001000 0x1000>,
|
||||
<0xf0002000 0x1000>;
|
||||
};
|
||||
|
||||
frame@f0003000 {
|
||||
frame-number = <1>
|
||||
interrupts = <0 15 0x8>;
|
||||
reg = <0xf0003000 0x1000>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,103 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/timer/arm,arch_timer.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM architected timer
|
||||
|
||||
maintainers:
|
||||
- Marc Zyngier <marc.zyngier@arm.com>
|
||||
- Mark Rutland <mark.rutland@arm.com>
|
||||
description: |+
|
||||
ARM cores may have a per-core architected timer, which provides per-cpu timers,
|
||||
or a memory mapped architected timer, which provides up to 8 frames with a
|
||||
physical and optional virtual timer per frame.
|
||||
|
||||
The per-core architected timer is attached to a GIC to deliver its
|
||||
per-processor interrupts via PPIs. The memory mapped timer is attached to a GIC
|
||||
to deliver its interrupts via SPIs.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- arm,cortex-a15-timer
|
||||
- enum:
|
||||
- arm,armv7-timer
|
||||
- items:
|
||||
- enum:
|
||||
- arm,armv7-timer
|
||||
- items:
|
||||
- enum:
|
||||
- arm,armv8-timer
|
||||
|
||||
interrupts:
|
||||
items:
|
||||
- description: secure timer irq
|
||||
- description: non-secure timer irq
|
||||
- description: virtual timer irq
|
||||
- description: hypervisor timer irq
|
||||
|
||||
clock-frequency:
|
||||
description: The frequency of the main counter, in Hz. Should be present
|
||||
only where necessary to work around broken firmware which does not configure
|
||||
CNTFRQ on all CPUs to a uniform correct value. Use of this property is
|
||||
strongly discouraged; fix your firmware unless absolutely impossible.
|
||||
|
||||
always-on:
|
||||
type: boolean
|
||||
description: If present, the timer is powered through an always-on power
|
||||
domain, therefore it never loses context.
|
||||
|
||||
fsl,erratum-a008585:
|
||||
type: boolean
|
||||
description: Indicates the presence of QorIQ erratum A-008585, which says
|
||||
that reading the counter is unreliable unless the same value is returned
|
||||
by back-to-back reads. This also affects writes to the tval register, due
|
||||
to the implicit counter read.
|
||||
|
||||
hisilicon,erratum-161010101:
|
||||
type: boolean
|
||||
description: Indicates the presence of Hisilicon erratum 161010101, which
|
||||
says that reading the counters is unreliable in some cases, and reads may
|
||||
return a value 32 beyond the correct value. This also affects writes to
|
||||
the tval registers, due to the implicit counter read.
|
||||
|
||||
arm,cpu-registers-not-fw-configured:
|
||||
type: boolean
|
||||
description: Firmware does not initialize any of the generic timer CPU
|
||||
registers, which contain their architecturally-defined reset values. Only
|
||||
supported for 32-bit systems which follow the ARMv7 architected reset
|
||||
values.
|
||||
|
||||
arm,no-tick-in-suspend:
|
||||
type: boolean
|
||||
description: The main counter does not tick when the system is in
|
||||
low-power system suspend on some SoCs. This behavior does not match the
|
||||
Architecture Reference Manual's specification that the system counter "must
|
||||
be implemented in an always-on power domain."
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
oneOf:
|
||||
- required:
|
||||
- interrupts
|
||||
- required:
|
||||
- interrupts-extended
|
||||
|
||||
examples:
|
||||
- |
|
||||
timer {
|
||||
compatible = "arm,cortex-a15-timer",
|
||||
"arm,armv7-timer";
|
||||
interrupts = <1 13 0xf08>,
|
||||
<1 14 0xf08>,
|
||||
<1 11 0xf08>,
|
||||
<1 10 0xf08>;
|
||||
clock-frequency = <100000000>;
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -0,0 +1,120 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/timer/arm,arch_timer_mmio.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM memory mapped architected timer
|
||||
|
||||
maintainers:
|
||||
- Marc Zyngier <marc.zyngier@arm.com>
|
||||
- Mark Rutland <mark.rutland@arm.com>
|
||||
|
||||
description: |+
|
||||
ARM cores may have a memory mapped architected timer, which provides up to 8
|
||||
frames with a physical and optional virtual timer per frame.
|
||||
|
||||
The memory mapped timer is attached to a GIC to deliver its interrupts via SPIs.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- arm,armv7-timer-mem
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
description: The control frame base address
|
||||
|
||||
'#address-cells':
|
||||
enum: [1, 2]
|
||||
|
||||
'#size-cells':
|
||||
const: 1
|
||||
|
||||
clock-frequency:
|
||||
description: The frequency of the main counter, in Hz. Should be present
|
||||
only where necessary to work around broken firmware which does not configure
|
||||
CNTFRQ on all CPUs to a uniform correct value. Use of this property is
|
||||
strongly discouraged; fix your firmware unless absolutely impossible.
|
||||
|
||||
always-on:
|
||||
type: boolean
|
||||
description: If present, the timer is powered through an always-on power
|
||||
domain, therefore it never loses context.
|
||||
|
||||
arm,cpu-registers-not-fw-configured:
|
||||
type: boolean
|
||||
description: Firmware does not initialize any of the generic timer CPU
|
||||
registers, which contain their architecturally-defined reset values. Only
|
||||
supported for 32-bit systems which follow the ARMv7 architected reset
|
||||
values.
|
||||
|
||||
arm,no-tick-in-suspend:
|
||||
type: boolean
|
||||
description: The main counter does not tick when the system is in
|
||||
low-power system suspend on some SoCs. This behavior does not match the
|
||||
Architecture Reference Manual's specification that the system counter "must
|
||||
be implemented in an always-on power domain."
|
||||
|
||||
patternProperties:
|
||||
'^frame@[0-9a-z]*$':
|
||||
description: A timer node has up to 8 frame sub-nodes, each with the following properties.
|
||||
properties:
|
||||
frame-number:
|
||||
allOf:
|
||||
- $ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
- minimum: 0
|
||||
maximum: 7
|
||||
|
||||
interrupts:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
items:
|
||||
- description: physical timer irq
|
||||
- description: virtual timer irq
|
||||
|
||||
reg :
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
items:
|
||||
- description: 1st view base address
|
||||
- description: 2nd optional view base address
|
||||
|
||||
required:
|
||||
- frame-number
|
||||
- interrupts
|
||||
- reg
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
|
||||
examples:
|
||||
- |
|
||||
timer@f0000000 {
|
||||
compatible = "arm,armv7-timer-mem";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
reg = <0xf0000000 0x1000>;
|
||||
clock-frequency = <50000000>;
|
||||
|
||||
frame@f0001000 {
|
||||
frame-number = <0>;
|
||||
interrupts = <0 13 0x8>,
|
||||
<0 14 0x8>;
|
||||
reg = <0xf0001000 0x1000>,
|
||||
<0xf0002000 0x1000>;
|
||||
};
|
||||
|
||||
frame@f0003000 {
|
||||
frame-number = <1>;
|
||||
interrupts = <0 15 0x8>;
|
||||
reg = <0xf0003000 0x1000>;
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -1,27 +0,0 @@
|
|||
|
||||
* ARM Global Timer
|
||||
Cortex-A9 are often associated with a per-core Global timer.
|
||||
|
||||
** Timer node required properties:
|
||||
|
||||
- compatible : should contain
|
||||
* "arm,cortex-a5-global-timer" for Cortex-A5 global timers.
|
||||
* "arm,cortex-a9-global-timer" for Cortex-A9 global
|
||||
timers or any compatible implementation. Note: driver
|
||||
supports versions r2p0 and above.
|
||||
|
||||
- interrupts : One interrupt to each core
|
||||
|
||||
- reg : Specify the base address and the size of the GT timer
|
||||
register window.
|
||||
|
||||
- clocks : Should be phandle to a clock.
|
||||
|
||||
Example:
|
||||
|
||||
timer@2c000600 {
|
||||
compatible = "arm,cortex-a9-global-timer";
|
||||
reg = <0x2c000600 0x20>;
|
||||
interrupts = <1 13 0xf01>;
|
||||
clocks = <&arm_periph_clk>;
|
||||
};
|
||||
|
|
@ -0,0 +1,46 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/timer/arm,global_timer.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM Global Timer
|
||||
|
||||
maintainers:
|
||||
- Stuart Menefy <stuart.menefy@st.com>
|
||||
|
||||
description:
|
||||
Cortex-A9 are often associated with a per-core Global timer.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- arm,cortex-a5-global-timer
|
||||
- arm,cortex-a9-global-timer
|
||||
|
||||
description: driver supports versions r2p0 and above.
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
|
||||
examples:
|
||||
- |
|
||||
timer@2c000600 {
|
||||
compatible = "arm,cortex-a9-global-timer";
|
||||
reg = <0x2c000600 0x20>;
|
||||
interrupts = <1 13 0xf01>;
|
||||
clocks = <&arm_periph_clk>;
|
||||
};
|
||||
...
|
||||
|
|
@ -1,166 +0,0 @@
|
|||
This is a list of trivial i2c devices that have simple device tree
|
||||
bindings, consisting only of a compatible field, an address and
|
||||
possibly an interrupt line.
|
||||
|
||||
If a device needs more specific bindings, such as properties to
|
||||
describe some aspect of it, there needs to be a specific binding
|
||||
document for it just like any other devices.
|
||||
|
||||
|
||||
Compatible Vendor / Chip
|
||||
========== =============
|
||||
ad,ad7414 SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin
|
||||
ad,adm9240 ADM9240: Complete System Hardware Monitor for uProcessor-Based Systems
|
||||
adi,adt7461 +/-1C TDM Extended Temp Range I.C
|
||||
adt7461 +/-1C TDM Extended Temp Range I.C
|
||||
adi,adt7473 +/-1C TDM Extended Temp Range I.C
|
||||
adi,adt7475 +/-1C TDM Extended Temp Range I.C
|
||||
adi,adt7476 +/-1C TDM Extended Temp Range I.C
|
||||
adi,adt7490 +/-1C TDM Extended Temp Range I.C
|
||||
adi,adxl345 Three-Axis Digital Accelerometer
|
||||
adi,adxl346 Three-Axis Digital Accelerometer (backward-compatibility value "adi,adxl345" must be listed too)
|
||||
ams,iaq-core AMS iAQ-Core VOC Sensor
|
||||
at,24c08 i2c serial eeprom (24cxx)
|
||||
atmel,at97sc3204t i2c trusted platform module (TPM)
|
||||
capella,cm32181 CM32181: Ambient Light Sensor
|
||||
capella,cm3232 CM3232: Ambient Light Sensor
|
||||
dallas,ds1631 High-Precision Digital Thermometer
|
||||
dallas,ds1682 Total-Elapsed-Time Recorder with Alarm
|
||||
dallas,ds1775 Tiny Digital Thermometer and Thermostat
|
||||
dallas,ds4510 CPU Supervisor with Nonvolatile Memory and Programmable I/O
|
||||
dallas,ds75 Digital Thermometer and Thermostat
|
||||
devantech,srf02 Devantech SRF02 ultrasonic ranger in I2C mode
|
||||
devantech,srf08 Devantech SRF08 ultrasonic ranger
|
||||
devantech,srf10 Devantech SRF10 ultrasonic ranger
|
||||
dlg,da9053 DA9053: flexible system level PMIC with multicore support
|
||||
dlg,da9063 DA9063: system PMIC for quad-core application processors
|
||||
domintech,dmard09 DMARD09: 3-axis Accelerometer
|
||||
domintech,dmard10 DMARD10: 3-axis Accelerometer
|
||||
fsl,mag3110 MAG3110: Xtrinsic High Accuracy, 3D Magnetometer
|
||||
fsl,mma7660 MMA7660FC: 3-Axis Orientation/Motion Detection Sensor
|
||||
fsl,mma8450 MMA8450Q: Xtrinsic Low-power, 3-axis Xtrinsic Accelerometer
|
||||
fsl,mpl3115 MPL3115: Absolute Digital Pressure Sensor
|
||||
fsl,mpr121 MPR121: Proximity Capacitive Touch Sensor Controller
|
||||
fsl,sgtl5000 SGTL5000: Ultra Low-Power Audio Codec
|
||||
gmt,g751 G751: Digital Temperature Sensor and Thermal Watchdog with Two-Wire Interface
|
||||
infineon,slb9635tt Infineon SLB9635 (Soft-) I2C TPM (old protocol, max 100khz)
|
||||
infineon,slb9645tt Infineon SLB9645 I2C TPM (new protocol, max 400khz)
|
||||
infineon,tlv493d-a1b6 Infineon TLV493D-A1B6 I2C 3D Magnetic Sensor
|
||||
isil,isl29028 Intersil ISL29028 Ambient Light and Proximity Sensor
|
||||
isil,isl29030 Intersil ISL29030 Ambient Light and Proximity Sensor
|
||||
maxim,ds1050 5 Bit Programmable, Pulse-Width Modulator
|
||||
maxim,max1237 Low-Power, 4-/12-Channel, 2-Wire Serial, 12-Bit ADCs
|
||||
maxim,max6621 PECI-to-I2C translator for PECI-to-SMBus/I2C protocol conversion
|
||||
maxim,max6625 9-Bit/12-Bit Temperature Sensors with I²C-Compatible Serial Interface
|
||||
mcube,mc3230 mCube 3-axis 8-bit digital accelerometer
|
||||
memsic,mxc6225 MEMSIC 2-axis 8-bit digital accelerometer
|
||||
microchip,mcp4017-502 Microchip 7-bit Single I2C Digital POT (5k)
|
||||
microchip,mcp4017-103 Microchip 7-bit Single I2C Digital POT (10k)
|
||||
microchip,mcp4017-503 Microchip 7-bit Single I2C Digital POT (50k)
|
||||
microchip,mcp4017-104 Microchip 7-bit Single I2C Digital POT (100k)
|
||||
microchip,mcp4018-502 Microchip 7-bit Single I2C Digital POT (5k)
|
||||
microchip,mcp4018-103 Microchip 7-bit Single I2C Digital POT (10k)
|
||||
microchip,mcp4018-503 Microchip 7-bit Single I2C Digital POT (50k)
|
||||
microchip,mcp4018-104 Microchip 7-bit Single I2C Digital POT (100k)
|
||||
microchip,mcp4019-502 Microchip 7-bit Single I2C Digital POT (5k)
|
||||
microchip,mcp4019-103 Microchip 7-bit Single I2C Digital POT (10k)
|
||||
microchip,mcp4019-503 Microchip 7-bit Single I2C Digital POT (50k)
|
||||
microchip,mcp4019-104 Microchip 7-bit Single I2C Digital POT (100k)
|
||||
microchip,mcp4531-502 Microchip 7-bit Single I2C Digital Potentiometer (5k)
|
||||
microchip,mcp4531-103 Microchip 7-bit Single I2C Digital Potentiometer (10k)
|
||||
microchip,mcp4531-503 Microchip 7-bit Single I2C Digital Potentiometer (50k)
|
||||
microchip,mcp4531-104 Microchip 7-bit Single I2C Digital Potentiometer (100k)
|
||||
microchip,mcp4532-502 Microchip 7-bit Single I2C Digital Potentiometer (5k)
|
||||
microchip,mcp4532-103 Microchip 7-bit Single I2C Digital Potentiometer (10k)
|
||||
microchip,mcp4532-503 Microchip 7-bit Single I2C Digital Potentiometer (50k)
|
||||
microchip,mcp4532-104 Microchip 7-bit Single I2C Digital Potentiometer (100k)
|
||||
microchip,mcp4541-502 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (5k)
|
||||
microchip,mcp4541-103 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (10k)
|
||||
microchip,mcp4541-503 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (50k)
|
||||
microchip,mcp4541-104 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (100k)
|
||||
microchip,mcp4542-502 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (5k)
|
||||
microchip,mcp4542-103 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (10k)
|
||||
microchip,mcp4542-503 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (50k)
|
||||
microchip,mcp4542-104 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (100k)
|
||||
microchip,mcp4551-502 Microchip 8-bit Single I2C Digital Potentiometer (5k)
|
||||
microchip,mcp4551-103 Microchip 8-bit Single I2C Digital Potentiometer (10k)
|
||||
microchip,mcp4551-503 Microchip 8-bit Single I2C Digital Potentiometer (50k)
|
||||
microchip,mcp4551-104 Microchip 8-bit Single I2C Digital Potentiometer (100k)
|
||||
microchip,mcp4552-502 Microchip 8-bit Single I2C Digital Potentiometer (5k)
|
||||
microchip,mcp4552-103 Microchip 8-bit Single I2C Digital Potentiometer (10k)
|
||||
microchip,mcp4552-503 Microchip 8-bit Single I2C Digital Potentiometer (50k)
|
||||
microchip,mcp4552-104 Microchip 8-bit Single I2C Digital Potentiometer (100k)
|
||||
microchip,mcp4561-502 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (5k)
|
||||
microchip,mcp4561-103 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (10k)
|
||||
microchip,mcp4561-503 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (50k)
|
||||
microchip,mcp4561-104 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (100k)
|
||||
microchip,mcp4562-502 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (5k)
|
||||
microchip,mcp4562-103 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (10k)
|
||||
microchip,mcp4562-503 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (50k)
|
||||
microchip,mcp4562-104 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (100k)
|
||||
microchip,mcp4631-502 Microchip 7-bit Dual I2C Digital Potentiometer (5k)
|
||||
microchip,mcp4631-103 Microchip 7-bit Dual I2C Digital Potentiometer (10k)
|
||||
microchip,mcp4631-503 Microchip 7-bit Dual I2C Digital Potentiometer (50k)
|
||||
microchip,mcp4631-104 Microchip 7-bit Dual I2C Digital Potentiometer (100k)
|
||||
microchip,mcp4632-502 Microchip 7-bit Dual I2C Digital Potentiometer (5k)
|
||||
microchip,mcp4632-103 Microchip 7-bit Dual I2C Digital Potentiometer (10k)
|
||||
microchip,mcp4632-503 Microchip 7-bit Dual I2C Digital Potentiometer (50k)
|
||||
microchip,mcp4632-104 Microchip 7-bit Dual I2C Digital Potentiometer (100k)
|
||||
microchip,mcp4641-502 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (5k)
|
||||
microchip,mcp4641-103 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (10k)
|
||||
microchip,mcp4641-503 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (50k)
|
||||
microchip,mcp4641-104 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (100k)
|
||||
microchip,mcp4642-502 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (5k)
|
||||
microchip,mcp4642-103 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (10k)
|
||||
microchip,mcp4642-503 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (50k)
|
||||
microchip,mcp4642-104 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (100k)
|
||||
microchip,mcp4651-502 Microchip 8-bit Dual I2C Digital Potentiometer (5k)
|
||||
microchip,mcp4651-103 Microchip 8-bit Dual I2C Digital Potentiometer (10k)
|
||||
microchip,mcp4651-503 Microchip 8-bit Dual I2C Digital Potentiometer (50k)
|
||||
microchip,mcp4651-104 Microchip 8-bit Dual I2C Digital Potentiometer (100k)
|
||||
microchip,mcp4652-502 Microchip 8-bit Dual I2C Digital Potentiometer (5k)
|
||||
microchip,mcp4652-103 Microchip 8-bit Dual I2C Digital Potentiometer (10k)
|
||||
microchip,mcp4652-503 Microchip 8-bit Dual I2C Digital Potentiometer (50k)
|
||||
microchip,mcp4652-104 Microchip 8-bit Dual I2C Digital Potentiometer (100k)
|
||||
microchip,mcp4661-502 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (5k)
|
||||
microchip,mcp4661-103 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (10k)
|
||||
microchip,mcp4661-503 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (50k)
|
||||
microchip,mcp4661-104 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (100k)
|
||||
microchip,mcp4662-502 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (5k)
|
||||
microchip,mcp4662-103 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (10k)
|
||||
microchip,mcp4662-503 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (50k)
|
||||
microchip,mcp4662-104 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (100k)
|
||||
microchip,tc654 PWM Fan Speed Controller With Fan Fault Detection
|
||||
microchip,tc655 PWM Fan Speed Controller With Fan Fault Detection
|
||||
miramems,da226 MiraMEMS DA226 2-axis 14-bit digital accelerometer
|
||||
miramems,da280 MiraMEMS DA280 3-axis 14-bit digital accelerometer
|
||||
miramems,da311 MiraMEMS DA311 3-axis 12-bit digital accelerometer
|
||||
national,lm63 Temperature sensor with integrated fan control
|
||||
national,lm75 I2C TEMP SENSOR
|
||||
national,lm80 Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor
|
||||
national,lm85 Temperature sensor with integrated fan control
|
||||
national,lm92 ±0.33°C Accurate, 12-Bit + Sign Temperature Sensor and Thermal Window Comparator with Two-Wire Interface
|
||||
nuvoton,npct501 i2c trusted platform module (TPM)
|
||||
nuvoton,npct601 i2c trusted platform module (TPM2)
|
||||
nuvoton,w83773g Nuvoton Temperature Sensor
|
||||
nxp,pca9556 Octal SMBus and I2C registered interface
|
||||
nxp,pca9557 8-bit I2C-bus and SMBus I/O port with reset
|
||||
oki,ml86v7667 OKI ML86V7667 video decoder
|
||||
ovti,ov5642 OV5642: Color CMOS QSXGA (5-megapixel) Image Sensor with OmniBSI and Embedded TrueFocus
|
||||
plx,pex8648 48-Lane, 12-Port PCI Express Gen 2 (5.0 GT/s) Switch
|
||||
pulsedlight,lidar-lite-v2 Pulsedlight LIDAR range-finding sensor
|
||||
samsung,24ad0xd1 S524AD0XF1 (128K/256K-bit Serial EEPROM for Low Power)
|
||||
sgx,vz89x SGX Sensortech VZ89X Sensors
|
||||
silabs,si7020 Relative Humidity and Temperature Sensors
|
||||
skyworks,sky81452 Skyworks SKY81452: Six-Channel White LED Driver with Touch Panel Bias Supply
|
||||
st,24c256 i2c serial eeprom (24cxx)
|
||||
taos,tsl2550 Ambient Light Sensor with SMBUS/Two Wire Serial Interface
|
||||
ti,ads7828 8-Channels, 12-bit ADC
|
||||
ti,ads7830 8-Channels, 8-bit ADC
|
||||
ti,amc6821 Temperature Monitoring and Fan Control
|
||||
ti,tsc2003 I2C Touch-Screen Controller
|
||||
ti,tmp102 Low Power Digital Temperature Sensor with SMBUS/Two Wire Serial Interface
|
||||
ti,tmp103 Low Power Digital Temperature Sensor with SMBUS/Two Wire Serial Interface
|
||||
ti,tmp275 Digital Temperature Sensor
|
||||
winbond,w83793 Winbond/Nuvoton H/W Monitor
|
||||
winbond,wpct301 i2c trusted platform module (TPM)
|
||||
|
|
@ -0,0 +1,344 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/trivial-devices.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Trivial I2C and SPI devices that have simple device tree bindings
|
||||
|
||||
maintainers:
|
||||
- Rob Herring <robh@kernel.org>
|
||||
|
||||
description: |
|
||||
This is a list of trivial I2C and SPI devices that have simple device tree
|
||||
bindings, consisting only of a compatible field, an address and possibly an
|
||||
interrupt line.
|
||||
|
||||
If a device needs more specific bindings, such as properties to
|
||||
describe some aspect of it, there needs to be a specific binding
|
||||
document for it just like any other devices.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
# SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin
|
||||
- ad,ad7414
|
||||
# ADM9240: Complete System Hardware Monitor for uProcessor-Based Systems
|
||||
- ad,adm9240
|
||||
# +/-1C TDM Extended Temp Range I.C
|
||||
- adi,adt7461
|
||||
# +/-1C TDM Extended Temp Range I.C
|
||||
- adt7461
|
||||
# +/-1C TDM Extended Temp Range I.C
|
||||
- adi,adt7473
|
||||
# +/-1C TDM Extended Temp Range I.C
|
||||
- adi,adt7475
|
||||
# +/-1C TDM Extended Temp Range I.C
|
||||
- adi,adt7476
|
||||
# +/-1C TDM Extended Temp Range I.C
|
||||
- adi,adt7490
|
||||
# Three-Axis Digital Accelerometer
|
||||
- adi,adxl345
|
||||
# Three-Axis Digital Accelerometer (backward-compatibility value "adi,adxl345" must be listed too)
|
||||
- adi,adxl346
|
||||
# AMS iAQ-Core VOC Sensor
|
||||
- ams,iaq-core
|
||||
# i2c serial eeprom (24cxx)
|
||||
- at,24c08
|
||||
# i2c trusted platform module (TPM)
|
||||
- atmel,at97sc3204t
|
||||
# CM32181: Ambient Light Sensor
|
||||
- capella,cm32181
|
||||
# CM3232: Ambient Light Sensor
|
||||
- capella,cm3232
|
||||
# High-Precision Digital Thermometer
|
||||
- dallas,ds1631
|
||||
# Total-Elapsed-Time Recorder with Alarm
|
||||
- dallas,ds1682
|
||||
# Tiny Digital Thermometer and Thermostat
|
||||
- dallas,ds1775
|
||||
# CPU Supervisor with Nonvolatile Memory and Programmable I/O
|
||||
- dallas,ds4510
|
||||
# Digital Thermometer and Thermostat
|
||||
- dallas,ds75
|
||||
# Devantech SRF02 ultrasonic ranger in I2C mode
|
||||
- devantech,srf02
|
||||
# Devantech SRF08 ultrasonic ranger
|
||||
- devantech,srf08
|
||||
# Devantech SRF10 ultrasonic ranger
|
||||
- devantech,srf10
|
||||
# DA9053: flexible system level PMIC with multicore support
|
||||
- dlg,da9053
|
||||
# DA9063: system PMIC for quad-core application processors
|
||||
- dlg,da9063
|
||||
# DMARD09: 3-axis Accelerometer
|
||||
- domintech,dmard09
|
||||
# DMARD10: 3-axis Accelerometer
|
||||
- domintech,dmard10
|
||||
# MAG3110: Xtrinsic High Accuracy, 3D Magnetometer
|
||||
- fsl,mag3110
|
||||
# MMA7660FC: 3-Axis Orientation/Motion Detection Sensor
|
||||
- fsl,mma7660
|
||||
# MMA8450Q: Xtrinsic Low-power, 3-axis Xtrinsic Accelerometer
|
||||
- fsl,mma8450
|
||||
# MPL3115: Absolute Digital Pressure Sensor
|
||||
- fsl,mpl3115
|
||||
# MPR121: Proximity Capacitive Touch Sensor Controller
|
||||
- fsl,mpr121
|
||||
# SGTL5000: Ultra Low-Power Audio Codec
|
||||
- fsl,sgtl5000
|
||||
# G751: Digital Temperature Sensor and Thermal Watchdog with Two-Wire Interface
|
||||
- gmt,g751
|
||||
# Infineon SLB9635 (Soft-) I2C TPM (old protocol, max 100khz)
|
||||
- infineon,slb9635tt
|
||||
# Infineon SLB9645 I2C TPM (new protocol, max 400khz)
|
||||
- infineon,slb9645tt
|
||||
# Infineon TLV493D-A1B6 I2C 3D Magnetic Sensor
|
||||
- infineon,tlv493d-a1b6
|
||||
# Intersil ISL29028 Ambient Light and Proximity Sensor
|
||||
- isil,isl29028
|
||||
# Intersil ISL29030 Ambient Light and Proximity Sensor
|
||||
- isil,isl29030
|
||||
# 5 Bit Programmable, Pulse-Width Modulator
|
||||
- maxim,ds1050
|
||||
# Low-Power, 4-/12-Channel, 2-Wire Serial, 12-Bit ADCs
|
||||
- maxim,max1237
|
||||
# PECI-to-I2C translator for PECI-to-SMBus/I2C protocol conversion
|
||||
- maxim,max6621
|
||||
# 9-Bit/12-Bit Temperature Sensors with I²C-Compatible Serial Interface
|
||||
- maxim,max6625
|
||||
# mCube 3-axis 8-bit digital accelerometer
|
||||
- mcube,mc3230
|
||||
# MEMSIC 2-axis 8-bit digital accelerometer
|
||||
- memsic,mxc6225
|
||||
# Microchip 7-bit Single I2C Digital POT (5k)
|
||||
- microchip,mcp4017-502
|
||||
# Microchip 7-bit Single I2C Digital POT (10k)
|
||||
- microchip,mcp4017-103
|
||||
# Microchip 7-bit Single I2C Digital POT (50k)
|
||||
- microchip,mcp4017-503
|
||||
# Microchip 7-bit Single I2C Digital POT (100k)
|
||||
- microchip,mcp4017-104
|
||||
# Microchip 7-bit Single I2C Digital POT (5k)
|
||||
- microchip,mcp4018-502
|
||||
# Microchip 7-bit Single I2C Digital POT (10k)
|
||||
- microchip,mcp4018-103
|
||||
# Microchip 7-bit Single I2C Digital POT (50k)
|
||||
- microchip,mcp4018-503
|
||||
# Microchip 7-bit Single I2C Digital POT (100k)
|
||||
- microchip,mcp4018-104
|
||||
# Microchip 7-bit Single I2C Digital POT (5k)
|
||||
- microchip,mcp4019-502
|
||||
# Microchip 7-bit Single I2C Digital POT (10k)
|
||||
- microchip,mcp4019-103
|
||||
# Microchip 7-bit Single I2C Digital POT (50k)
|
||||
- microchip,mcp4019-503
|
||||
# Microchip 7-bit Single I2C Digital POT (100k)
|
||||
- microchip,mcp4019-104
|
||||
# Microchip 7-bit Single I2C Digital Potentiometer (5k)
|
||||
- microchip,mcp4531-502
|
||||
# Microchip 7-bit Single I2C Digital Potentiometer (10k)
|
||||
- microchip,mcp4531-103
|
||||
# Microchip 7-bit Single I2C Digital Potentiometer (50k)
|
||||
- microchip,mcp4531-503
|
||||
# Microchip 7-bit Single I2C Digital Potentiometer (100k)
|
||||
- microchip,mcp4531-104
|
||||
# Microchip 7-bit Single I2C Digital Potentiometer (5k)
|
||||
- microchip,mcp4532-502
|
||||
# Microchip 7-bit Single I2C Digital Potentiometer (10k)
|
||||
- microchip,mcp4532-103
|
||||
# Microchip 7-bit Single I2C Digital Potentiometer (50k)
|
||||
- microchip,mcp4532-503
|
||||
# Microchip 7-bit Single I2C Digital Potentiometer (100k)
|
||||
- microchip,mcp4532-104
|
||||
# Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (5k)
|
||||
- microchip,mcp4541-502
|
||||
# Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (10k)
|
||||
- microchip,mcp4541-103
|
||||
# Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (50k)
|
||||
- microchip,mcp4541-503
|
||||
# Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (100k)
|
||||
- microchip,mcp4541-104
|
||||
# Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (5k)
|
||||
- microchip,mcp4542-502
|
||||
# Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (10k)
|
||||
- microchip,mcp4542-103
|
||||
# Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (50k)
|
||||
- microchip,mcp4542-503
|
||||
# Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (100k)
|
||||
- microchip,mcp4542-104
|
||||
# Microchip 8-bit Single I2C Digital Potentiometer (5k)
|
||||
- microchip,mcp4551-502
|
||||
# Microchip 8-bit Single I2C Digital Potentiometer (10k)
|
||||
- microchip,mcp4551-103
|
||||
# Microchip 8-bit Single I2C Digital Potentiometer (50k)
|
||||
- microchip,mcp4551-503
|
||||
# Microchip 8-bit Single I2C Digital Potentiometer (100k)
|
||||
- microchip,mcp4551-104
|
||||
# Microchip 8-bit Single I2C Digital Potentiometer (5k)
|
||||
- microchip,mcp4552-502
|
||||
# Microchip 8-bit Single I2C Digital Potentiometer (10k)
|
||||
- microchip,mcp4552-103
|
||||
# Microchip 8-bit Single I2C Digital Potentiometer (50k)
|
||||
- microchip,mcp4552-503
|
||||
# Microchip 8-bit Single I2C Digital Potentiometer (100k)
|
||||
- microchip,mcp4552-104
|
||||
# Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (5k)
|
||||
- microchip,mcp4561-502
|
||||
# Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (10k)
|
||||
- microchip,mcp4561-103
|
||||
# Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (50k)
|
||||
- microchip,mcp4561-503
|
||||
# Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (100k)
|
||||
- microchip,mcp4561-104
|
||||
# Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (5k)
|
||||
- microchip,mcp4562-502
|
||||
# Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (10k)
|
||||
- microchip,mcp4562-103
|
||||
# Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (50k)
|
||||
- microchip,mcp4562-503
|
||||
# Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (100k)
|
||||
- microchip,mcp4562-104
|
||||
# Microchip 7-bit Dual I2C Digital Potentiometer (5k)
|
||||
- microchip,mcp4631-502
|
||||
# Microchip 7-bit Dual I2C Digital Potentiometer (10k)
|
||||
- microchip,mcp4631-103
|
||||
# Microchip 7-bit Dual I2C Digital Potentiometer (50k)
|
||||
- microchip,mcp4631-503
|
||||
# Microchip 7-bit Dual I2C Digital Potentiometer (100k)
|
||||
- microchip,mcp4631-104
|
||||
# Microchip 7-bit Dual I2C Digital Potentiometer (5k)
|
||||
- microchip,mcp4632-502
|
||||
# Microchip 7-bit Dual I2C Digital Potentiometer (10k)
|
||||
- microchip,mcp4632-103
|
||||
# Microchip 7-bit Dual I2C Digital Potentiometer (50k)
|
||||
- microchip,mcp4632-503
|
||||
# Microchip 7-bit Dual I2C Digital Potentiometer (100k)
|
||||
- microchip,mcp4632-104
|
||||
# Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (5k)
|
||||
- microchip,mcp4641-502
|
||||
# Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (10k)
|
||||
- microchip,mcp4641-103
|
||||
# Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (50k)
|
||||
- microchip,mcp4641-503
|
||||
# Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (100k)
|
||||
- microchip,mcp4641-104
|
||||
# Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (5k)
|
||||
- microchip,mcp4642-502
|
||||
# Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (10k)
|
||||
- microchip,mcp4642-103
|
||||
# Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (50k)
|
||||
- microchip,mcp4642-503
|
||||
# Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (100k)
|
||||
- microchip,mcp4642-104
|
||||
# Microchip 8-bit Dual I2C Digital Potentiometer (5k)
|
||||
- microchip,mcp4651-502
|
||||
# Microchip 8-bit Dual I2C Digital Potentiometer (10k)
|
||||
- microchip,mcp4651-103
|
||||
# Microchip 8-bit Dual I2C Digital Potentiometer (50k)
|
||||
- microchip,mcp4651-503
|
||||
# Microchip 8-bit Dual I2C Digital Potentiometer (100k)
|
||||
- microchip,mcp4651-104
|
||||
# Microchip 8-bit Dual I2C Digital Potentiometer (5k)
|
||||
- microchip,mcp4652-502
|
||||
# Microchip 8-bit Dual I2C Digital Potentiometer (10k)
|
||||
- microchip,mcp4652-103
|
||||
# Microchip 8-bit Dual I2C Digital Potentiometer (50k)
|
||||
- microchip,mcp4652-503
|
||||
# Microchip 8-bit Dual I2C Digital Potentiometer (100k)
|
||||
- microchip,mcp4652-104
|
||||
# Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (5k)
|
||||
- microchip,mcp4661-502
|
||||
# Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (10k)
|
||||
- microchip,mcp4661-103
|
||||
# Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (50k)
|
||||
- microchip,mcp4661-503
|
||||
# Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (100k)
|
||||
- microchip,mcp4661-104
|
||||
# Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (5k)
|
||||
- microchip,mcp4662-502
|
||||
# Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (10k)
|
||||
- microchip,mcp4662-103
|
||||
# Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (50k)
|
||||
- microchip,mcp4662-503
|
||||
# Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (100k)
|
||||
- microchip,mcp4662-104
|
||||
# PWM Fan Speed Controller With Fan Fault Detection
|
||||
- microchip,tc654
|
||||
# PWM Fan Speed Controller With Fan Fault Detection
|
||||
- microchip,tc655
|
||||
# MiraMEMS DA226 2-axis 14-bit digital accelerometer
|
||||
- miramems,da226
|
||||
# MiraMEMS DA280 3-axis 14-bit digital accelerometer
|
||||
- miramems,da280
|
||||
# MiraMEMS DA311 3-axis 12-bit digital accelerometer
|
||||
- miramems,da311
|
||||
# Temperature sensor with integrated fan control
|
||||
- national,lm63
|
||||
# I2C TEMP SENSOR
|
||||
- national,lm75
|
||||
# Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor
|
||||
- national,lm80
|
||||
# Temperature sensor with integrated fan control
|
||||
- national,lm85
|
||||
# ±0.33°C Accurate, 12-Bit + Sign Temperature Sensor and Thermal Window Comparator with Two-Wire Interface
|
||||
- national,lm92
|
||||
# i2c trusted platform module (TPM)
|
||||
- nuvoton,npct501
|
||||
# i2c trusted platform module (TPM2)
|
||||
- nuvoton,npct601
|
||||
# Nuvoton Temperature Sensor
|
||||
- nuvoton,w83773g
|
||||
# Octal SMBus and I2C registered interface
|
||||
- nxp,pca9556
|
||||
# 8-bit I2C-bus and SMBus I/O port with reset
|
||||
- nxp,pca9557
|
||||
# OKI ML86V7667 video decoder
|
||||
- oki,ml86v7667
|
||||
# OV5642: Color CMOS QSXGA (5-megapixel) Image Sensor with OmniBSI and Embedded TrueFocus
|
||||
- ovti,ov5642
|
||||
# 48-Lane, 12-Port PCI Express Gen 2 (5.0 GT/s) Switch
|
||||
- plx,pex8648
|
||||
# Pulsedlight LIDAR range-finding sensor
|
||||
- pulsedlight,lidar-lite-v2
|
||||
# S524AD0XF1 (128K/256K-bit Serial EEPROM for Low Power)
|
||||
- samsung,24ad0xd1
|
||||
# SGX Sensortech VZ89X Sensors
|
||||
- sgx,vz89x
|
||||
# Relative Humidity and Temperature Sensors
|
||||
- silabs,si7020
|
||||
# Skyworks SKY81452: Six-Channel White LED Driver with Touch Panel Bias Supply
|
||||
- skyworks,sky81452
|
||||
# i2c serial eeprom (24cxx)
|
||||
- st,24c256
|
||||
# Ambient Light Sensor with SMBUS/Two Wire Serial Interface
|
||||
- taos,tsl2550
|
||||
# 8-Channels, 12-bit ADC
|
||||
- ti,ads7828
|
||||
# 8-Channels, 8-bit ADC
|
||||
- ti,ads7830
|
||||
# Temperature Monitoring and Fan Control
|
||||
- ti,amc6821
|
||||
# I2C Touch-Screen Controller
|
||||
- ti,tsc2003
|
||||
# Low Power Digital Temperature Sensor with SMBUS/Two Wire Serial Interface
|
||||
- ti,tmp102
|
||||
# Low Power Digital Temperature Sensor with SMBUS/Two Wire Serial Interface
|
||||
- ti,tmp103
|
||||
# Digital Temperature Sensor
|
||||
- ti,tmp275
|
||||
# Winbond/Nuvoton H/W Monitor
|
||||
- winbond,w83793
|
||||
# i2c trusted platform module (TPM)
|
||||
- winbond,wpct301
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
...
|
||||
|
|
@ -0,0 +1,130 @@
|
|||
# Writing DeviceTree Bindings in json-schema
|
||||
|
||||
Devicetree bindings are written using json-schema vocabulary. Schema files are
|
||||
written in a JSON compatible subset of YAML. YAML is used instead of JSON as it
|
||||
considered more human readable and has some advantages such as allowing
|
||||
comments (Prefixed with '#').
|
||||
|
||||
## Schema Contents
|
||||
|
||||
Each schema doc is a structured json-schema which is defined by a set of
|
||||
top-level properties. Generally, there is one binding defined per file. The
|
||||
top-level json-schema properties used are:
|
||||
|
||||
- __$id__ - A json-schema unique identifier string. The string must be a valid
|
||||
URI typically containing the binding's filename and path. For DT schema, it must
|
||||
begin with "http://devicetree.org/schemas/". The URL is used in constructing
|
||||
references to other files specified in schema "$ref" properties. A $ref values
|
||||
with a leading '/' will have the hostname prepended. A $ref value a relative
|
||||
path or filename only will be prepended with the hostname and path components
|
||||
of the current schema file's '$id' value. A URL is used even for local files,
|
||||
but there may not actually be files present at those locations.
|
||||
|
||||
- __$schema__ - Indicates the meta-schema the schema file adheres to.
|
||||
|
||||
- __title__ - A one line description on the contents of the binding schema.
|
||||
|
||||
- __maintainers__ - A DT specific property. Contains a list of email address(es)
|
||||
for maintainers of this binding.
|
||||
|
||||
- __description__ - Optional. A multi-line text block containing any detailed
|
||||
information about this binding. It should contain things such as what the block
|
||||
or device does, standards the device conforms to, and links to datasheets for
|
||||
more information.
|
||||
|
||||
- __select__ - Optional. A json-schema used to match nodes for applying the
|
||||
schema. By default without 'select', nodes are matched against their possible
|
||||
compatible string values or node name. Most bindings should not need select.
|
||||
|
||||
- __allOf__ - Optional. A list of other schemas to include. This is used to
|
||||
include other schemas the binding conforms to. This may be schemas for a
|
||||
particular class of devices such as I2C or SPI controllers.
|
||||
|
||||
- __properties__ - A set of sub-schema defining all the DT properties for the
|
||||
binding. The exact schema syntax depends on whether properties are known,
|
||||
common properties (e.g. 'interrupts') or are binding/vendor specific properties.
|
||||
|
||||
A property can also define a child DT node with child properties defined
|
||||
under it.
|
||||
|
||||
For more details on properties sections, see 'Property Schema' section.
|
||||
|
||||
- __patternProperties__ - Optional. Similar to 'properties', but names are regex.
|
||||
|
||||
- __required__ - A list of DT properties from the 'properties' section that
|
||||
must always be present.
|
||||
|
||||
- __examples__ - Optional. A list of one or more DTS hunks implementing the
|
||||
binding. Note: YAML doesn't allow leading tabs, so spaces must be used instead.
|
||||
|
||||
Unless noted otherwise, all properties are required.
|
||||
|
||||
## Property Schema
|
||||
|
||||
The 'properties' section of the schema contains all the DT properties for a
|
||||
binding. Each property contains a set of constraints using json-schema
|
||||
vocabulary for that property. The properties schemas are what is used for
|
||||
validation of DT files.
|
||||
|
||||
For common properties, only additional constraints not covered by the common
|
||||
binding schema need to be defined such as how many values are valid or what
|
||||
possible values are valid.
|
||||
|
||||
Vendor specific properties will typically need more detailed schema. With the
|
||||
exception of boolean properties, they should have a reference to a type in
|
||||
schemas/types.yaml. A "description" property is always required.
|
||||
|
||||
The Devicetree schemas don't exactly match the YAML encoded DT data produced by
|
||||
dtc. They are simplified to make them more compact and avoid a bunch of
|
||||
boilerplate. The tools process the schema files to produce the final schema for
|
||||
validation. There are currently 2 transformations the tools perform.
|
||||
|
||||
The default for arrays in json-schema is they are variable sized and allow more
|
||||
entries than explicitly defined. This can be restricted by defining 'minItems',
|
||||
'maxItems', and 'additionalItems'. However, for DeviceTree Schemas, a fixed
|
||||
size is desired in most cases, so these properties are added based on the
|
||||
number of entries in an 'items' list.
|
||||
|
||||
The YAML Devicetree format also makes all string values an array and scalar
|
||||
values a matrix (in order to define groupings) even when only a single value
|
||||
is present. Single entries in schemas are fixed up to match this encoding.
|
||||
|
||||
## Testing
|
||||
|
||||
### Dependencies
|
||||
|
||||
The DT schema project must be installed in order to validate the DT schema
|
||||
binding documents and validate DTS files using the DT schema. The DT schema
|
||||
project can be installed with pip:
|
||||
|
||||
`pip3 install git+https://github.com/robherring/yaml-bindings.git@master`
|
||||
|
||||
dtc must also be built with YAML output support enabled. This requires that
|
||||
libyaml and its headers be installed on the host system.
|
||||
|
||||
### Running checks
|
||||
|
||||
The DT schema binding documents must be validated using the meta-schema (the
|
||||
schema for the schema) to ensure they are both valid json-schema and valid
|
||||
binding schema. All of the DT binding documents can be validated using the
|
||||
`dt_binding_check` target:
|
||||
|
||||
`make dt_binding_check`
|
||||
|
||||
In order to perform validation of DT source files, use the `dtbs_check` target:
|
||||
|
||||
`make dtbs_check`
|
||||
|
||||
This will first run the `dt_binding_check` which generates the processed schema.
|
||||
|
||||
It is also possible to run checks with a single schema file by setting the
|
||||
'DT_SCHEMA_FILES' variable to a specific schema file.
|
||||
|
||||
`make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/trivial-devices.yaml`
|
||||
|
||||
|
||||
## json-schema Resources
|
||||
|
||||
[JSON-Schema Specifications](http://json-schema.org/)
|
||||
|
||||
[Using JSON Schema Book](http://usingjsonschema.com/)
|
||||
|
|
@ -0,0 +1,18 @@
|
|||
Kernel driver i2c-nvidia-gpu
|
||||
|
||||
Datasheet: not publicly available.
|
||||
|
||||
Authors:
|
||||
Ajay Gupta <ajayg@nvidia.com>
|
||||
|
||||
Description
|
||||
-----------
|
||||
|
||||
i2c-nvidia-gpu is a driver for I2C controller included in NVIDIA Turing
|
||||
and later GPUs and it is used to communicate with Type-C controller on GPUs.
|
||||
|
||||
If your 'lspci -v' listing shows something like the following,
|
||||
|
||||
01:00.3 Serial bus controller [0c80]: NVIDIA Corporation Device 1ad9 (rev a1)
|
||||
|
||||
then this driver should support the I2C controller of your GPU.
|
||||
|
|
@ -34,23 +34,24 @@ __________________|____________|__________________|_________|___________________
|
|||
____________________________________________________________|___________________________________________________________
|
||||
| | | |
|
||||
ffff800000000000 | -128 TB | ffff87ffffffffff | 8 TB | ... guard hole, also reserved for hypervisor
|
||||
ffff880000000000 | -120 TB | ffffc7ffffffffff | 64 TB | direct mapping of all physical memory (page_offset_base)
|
||||
ffffc80000000000 | -56 TB | ffffc8ffffffffff | 1 TB | ... unused hole
|
||||
ffff880000000000 | -120 TB | ffff887fffffffff | 0.5 TB | LDT remap for PTI
|
||||
ffff888000000000 | -119.5 TB | ffffc87fffffffff | 64 TB | direct mapping of all physical memory (page_offset_base)
|
||||
ffffc88000000000 | -55.5 TB | ffffc8ffffffffff | 0.5 TB | ... unused hole
|
||||
ffffc90000000000 | -55 TB | ffffe8ffffffffff | 32 TB | vmalloc/ioremap space (vmalloc_base)
|
||||
ffffe90000000000 | -23 TB | ffffe9ffffffffff | 1 TB | ... unused hole
|
||||
ffffea0000000000 | -22 TB | ffffeaffffffffff | 1 TB | virtual memory map (vmemmap_base)
|
||||
ffffeb0000000000 | -21 TB | ffffebffffffffff | 1 TB | ... unused hole
|
||||
ffffec0000000000 | -20 TB | fffffbffffffffff | 16 TB | KASAN shadow memory
|
||||
__________________|____________|__________________|_________|____________________________________________________________
|
||||
|
|
||||
| Identical layout to the 56-bit one from here on:
|
||||
____________________________________________________________|____________________________________________________________
|
||||
| | | |
|
||||
fffffc0000000000 | -4 TB | fffffdffffffffff | 2 TB | ... unused hole
|
||||
| | | | vaddr_end for KASLR
|
||||
fffffe0000000000 | -2 TB | fffffe7fffffffff | 0.5 TB | cpu_entry_area mapping
|
||||
fffffe8000000000 | -1.5 TB | fffffeffffffffff | 0.5 TB | LDT remap for PTI
|
||||
fffffe8000000000 | -1.5 TB | fffffeffffffffff | 0.5 TB | ... unused hole
|
||||
ffffff0000000000 | -1 TB | ffffff7fffffffff | 0.5 TB | %esp fixup stacks
|
||||
__________________|____________|__________________|_________|____________________________________________________________
|
||||
|
|
||||
| Identical layout to the 47-bit one from here on:
|
||||
____________________________________________________________|____________________________________________________________
|
||||
| | | |
|
||||
ffffff8000000000 | -512 GB | ffffffeeffffffff | 444 GB | ... unused hole
|
||||
ffffffef00000000 | -68 GB | fffffffeffffffff | 64 GB | EFI region mapping space
|
||||
ffffffff00000000 | -4 GB | ffffffff7fffffff | 2 GB | ... unused hole
|
||||
|
|
@ -83,7 +84,7 @@ Notes:
|
|||
__________________|____________|__________________|_________|___________________________________________________________
|
||||
| | | |
|
||||
0000800000000000 | +64 PB | ffff7fffffffffff | ~16K PB | ... huge, still almost 64 bits wide hole of non-canonical
|
||||
| | | | virtual memory addresses up to the -128 TB
|
||||
| | | | virtual memory addresses up to the -64 PB
|
||||
| | | | starting offset of kernel mappings.
|
||||
__________________|____________|__________________|_________|___________________________________________________________
|
||||
|
|
||||
|
|
@ -91,23 +92,24 @@ __________________|____________|__________________|_________|___________________
|
|||
____________________________________________________________|___________________________________________________________
|
||||
| | | |
|
||||
ff00000000000000 | -64 PB | ff0fffffffffffff | 4 PB | ... guard hole, also reserved for hypervisor
|
||||
ff10000000000000 | -60 PB | ff8fffffffffffff | 32 PB | direct mapping of all physical memory (page_offset_base)
|
||||
ff90000000000000 | -28 PB | ff9fffffffffffff | 4 PB | LDT remap for PTI
|
||||
ff10000000000000 | -60 PB | ff10ffffffffffff | 0.25 PB | LDT remap for PTI
|
||||
ff11000000000000 | -59.75 PB | ff90ffffffffffff | 32 PB | direct mapping of all physical memory (page_offset_base)
|
||||
ff91000000000000 | -27.75 PB | ff9fffffffffffff | 3.75 PB | ... unused hole
|
||||
ffa0000000000000 | -24 PB | ffd1ffffffffffff | 12.5 PB | vmalloc/ioremap space (vmalloc_base)
|
||||
ffd2000000000000 | -11.5 PB | ffd3ffffffffffff | 0.5 PB | ... unused hole
|
||||
ffd4000000000000 | -11 PB | ffd5ffffffffffff | 0.5 PB | virtual memory map (vmemmap_base)
|
||||
ffd6000000000000 | -10.5 PB | ffdeffffffffffff | 2.25 PB | ... unused hole
|
||||
ffdf000000000000 | -8.25 PB | fffffdffffffffff | ~8 PB | KASAN shadow memory
|
||||
fffffc0000000000 | -4 TB | fffffdffffffffff | 2 TB | ... unused hole
|
||||
| | | | vaddr_end for KASLR
|
||||
fffffe0000000000 | -2 TB | fffffe7fffffffff | 0.5 TB | cpu_entry_area mapping
|
||||
fffffe8000000000 | -1.5 TB | fffffeffffffffff | 0.5 TB | ... unused hole
|
||||
ffffff0000000000 | -1 TB | ffffff7fffffffff | 0.5 TB | %esp fixup stacks
|
||||
__________________|____________|__________________|_________|____________________________________________________________
|
||||
|
|
||||
| Identical layout to the 47-bit one from here on:
|
||||
____________________________________________________________|____________________________________________________________
|
||||
| | | |
|
||||
fffffc0000000000 | -4 TB | fffffdffffffffff | 2 TB | ... unused hole
|
||||
| | | | vaddr_end for KASLR
|
||||
fffffe0000000000 | -2 TB | fffffe7fffffffff | 0.5 TB | cpu_entry_area mapping
|
||||
fffffe8000000000 | -1.5 TB | fffffeffffffffff | 0.5 TB | ... unused hole
|
||||
ffffff0000000000 | -1 TB | ffffff7fffffffff | 0.5 TB | %esp fixup stacks
|
||||
ffffff8000000000 | -512 GB | ffffffeeffffffff | 444 GB | ... unused hole
|
||||
ffffffef00000000 | -68 GB | fffffffeffffffff | 64 GB | EFI region mapping space
|
||||
ffffffff00000000 | -4 GB | ffffffff7fffffff | 2 GB | ... unused hole
|
||||
|
|
|
|||
|
|
@ -25,7 +25,7 @@ Offset Proto Name Meaning
|
|||
0C8/004 ALL ext_cmd_line_ptr cmd_line_ptr high 32bits
|
||||
140/080 ALL edid_info Video mode setup (struct edid_info)
|
||||
1C0/020 ALL efi_info EFI 32 information (struct efi_info)
|
||||
1E0/004 ALL alk_mem_k Alternative mem check, in KB
|
||||
1E0/004 ALL alt_mem_k Alternative mem check, in KB
|
||||
1E4/004 ALL scratch Scratch field for the kernel setup code
|
||||
1E8/001 ALL e820_entries Number of entries in e820_table (below)
|
||||
1E9/001 ALL eddbuf_entries Number of entries in eddbuf (below)
|
||||
|
|
|
|||
31
MAINTAINERS
31
MAINTAINERS
|
|
@ -2342,7 +2342,7 @@ F: drivers/pinctrl/zte/
|
|||
F: drivers/soc/zte/
|
||||
F: drivers/thermal/zx2967_thermal.c
|
||||
F: drivers/watchdog/zx2967_wdt.c
|
||||
F: Documentation/devicetree/bindings/arm/zte.txt
|
||||
F: Documentation/devicetree/bindings/arm/zte.yaml
|
||||
F: Documentation/devicetree/bindings/clock/zx2967*.txt
|
||||
F: Documentation/devicetree/bindings/dma/zxdma.txt
|
||||
F: Documentation/devicetree/bindings/gpio/zx296702-gpio.txt
|
||||
|
|
@ -6607,9 +6607,9 @@ F: arch/*/include/asm/suspend*.h
|
|||
|
||||
HID CORE LAYER
|
||||
M: Jiri Kosina <jikos@kernel.org>
|
||||
R: Benjamin Tissoires <benjamin.tissoires@redhat.com>
|
||||
M: Benjamin Tissoires <benjamin.tissoires@redhat.com>
|
||||
L: linux-input@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jikos/hid.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid.git
|
||||
S: Maintained
|
||||
F: drivers/hid/
|
||||
F: include/linux/hid*
|
||||
|
|
@ -6861,6 +6861,13 @@ L: linux-acpi@vger.kernel.org
|
|||
S: Maintained
|
||||
F: drivers/i2c/i2c-core-acpi.c
|
||||
|
||||
I2C CONTROLLER DRIVER FOR NVIDIA GPU
|
||||
M: Ajay Gupta <ajayg@nvidia.com>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/i2c/busses/i2c-nvidia-gpu
|
||||
F: drivers/i2c/busses/i2c-nvidia-gpu.c
|
||||
|
||||
I2C MUXES
|
||||
M: Peter Rosin <peda@axentia.se>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
|
|
@ -8367,7 +8374,7 @@ F: drivers/media/dvb-frontends/lgdt3305.*
|
|||
LIBATA PATA ARASAN COMPACT FLASH CONTROLLER
|
||||
M: Viresh Kumar <vireshk@kernel.org>
|
||||
L: linux-ide@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git
|
||||
S: Maintained
|
||||
F: include/linux/pata_arasan_cf_data.h
|
||||
F: drivers/ata/pata_arasan_cf.c
|
||||
|
|
@ -8384,7 +8391,7 @@ F: drivers/ata/ata_generic.c
|
|||
LIBATA PATA FARADAY FTIDE010 AND GEMINI SATA BRIDGE DRIVERS
|
||||
M: Linus Walleij <linus.walleij@linaro.org>
|
||||
L: linux-ide@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git
|
||||
S: Maintained
|
||||
F: drivers/ata/pata_ftide010.c
|
||||
F: drivers/ata/sata_gemini.c
|
||||
|
|
@ -8403,7 +8410,7 @@ F: include/linux/ahci_platform.h
|
|||
LIBATA SATA PROMISE TX2/TX4 CONTROLLER DRIVER
|
||||
M: Mikael Pettersson <mikpelinux@gmail.com>
|
||||
L: linux-ide@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git
|
||||
S: Maintained
|
||||
F: drivers/ata/sata_promise.*
|
||||
|
||||
|
|
@ -10784,6 +10791,14 @@ L: linux-omap@vger.kernel.org
|
|||
S: Maintained
|
||||
F: arch/arm/mach-omap2/omap_hwmod.*
|
||||
|
||||
OMAP I2C DRIVER
|
||||
M: Vignesh R <vigneshr@ti.com>
|
||||
L: linux-omap@vger.kernel.org
|
||||
L: linux-i2c@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/i2c/i2c-omap.txt
|
||||
F: drivers/i2c/busses/i2c-omap.c
|
||||
|
||||
OMAP IMAGING SUBSYSTEM (OMAP3 ISP and OMAP4 ISS)
|
||||
M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
|
|
@ -15436,9 +15451,9 @@ F: include/linux/usb/gadget*
|
|||
|
||||
USB HID/HIDBP DRIVERS (USB KEYBOARDS, MICE, REMOTE CONTROLS, ...)
|
||||
M: Jiri Kosina <jikos@kernel.org>
|
||||
R: Benjamin Tissoires <benjamin.tissoires@redhat.com>
|
||||
M: Benjamin Tissoires <benjamin.tissoires@redhat.com>
|
||||
L: linux-usb@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jikos/hid.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid.git
|
||||
S: Maintained
|
||||
F: Documentation/hid/hiddev.txt
|
||||
F: drivers/hid/usbhid/
|
||||
|
|
|
|||
15
Makefile
15
Makefile
|
|
@ -2,7 +2,7 @@
|
|||
VERSION = 4
|
||||
PATCHLEVEL = 20
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc1
|
||||
EXTRAVERSION = -rc2
|
||||
NAME = "People's Front"
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
@ -1232,10 +1232,13 @@ ifneq ($(dtstree),)
|
|||
%.dtb: prepare3 scripts_dtc
|
||||
$(Q)$(MAKE) $(build)=$(dtstree) $(dtstree)/$@
|
||||
|
||||
PHONY += dtbs dtbs_install
|
||||
dtbs: prepare3 scripts_dtc
|
||||
PHONY += dtbs dtbs_install dt_binding_check
|
||||
dtbs dtbs_check: prepare3 scripts_dtc
|
||||
$(Q)$(MAKE) $(build)=$(dtstree)
|
||||
|
||||
dtbs_check: export CHECK_DTBS=1
|
||||
dtbs_check: dt_binding_check
|
||||
|
||||
dtbs_install:
|
||||
$(Q)$(MAKE) $(dtbinst)=$(dtstree)
|
||||
|
||||
|
|
@ -1249,6 +1252,9 @@ PHONY += scripts_dtc
|
|||
scripts_dtc: scripts_basic
|
||||
$(Q)$(MAKE) $(build)=scripts/dtc
|
||||
|
||||
dt_binding_check: scripts_dtc
|
||||
$(Q)$(MAKE) $(build)=Documentation/devicetree/bindings
|
||||
|
||||
# ---------------------------------------------------------------------------
|
||||
# Modules
|
||||
|
||||
|
|
@ -1611,7 +1617,8 @@ clean: $(clean-dirs)
|
|||
$(call cmd,rmfiles)
|
||||
@find $(if $(KBUILD_EXTMOD), $(KBUILD_EXTMOD), .) $(RCS_FIND_IGNORE) \
|
||||
\( -name '*.[aios]' -o -name '*.ko' -o -name '.*.cmd' \
|
||||
-o -name '*.ko.*' -o -name '*.dtb' -o -name '*.dtb.S' \
|
||||
-o -name '*.ko.*' \
|
||||
-o -name '*.dtb' -o -name '*.dtb.S' -o -name '*.dt.yaml' \
|
||||
-o -name '*.dwo' -o -name '*.lst' \
|
||||
-o -name '*.su' \
|
||||
-o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \
|
||||
|
|
|
|||
|
|
@ -73,9 +73,15 @@
|
|||
})
|
||||
|
||||
#define user_termios_to_kernel_termios(k, u) \
|
||||
copy_from_user(k, u, sizeof(struct termios))
|
||||
copy_from_user(k, u, sizeof(struct termios2))
|
||||
|
||||
#define kernel_termios_to_user_termios(u, k) \
|
||||
copy_to_user(u, k, sizeof(struct termios2))
|
||||
|
||||
#define user_termios_to_kernel_termios_1(k, u) \
|
||||
copy_from_user(k, u, sizeof(struct termios))
|
||||
|
||||
#define kernel_termios_to_user_termios_1(u, k) \
|
||||
copy_to_user(u, k, sizeof(struct termios))
|
||||
|
||||
#endif /* _ALPHA_TERMIOS_H */
|
||||
|
|
|
|||
|
|
@ -32,6 +32,11 @@
|
|||
#define TCXONC _IO('t', 30)
|
||||
#define TCFLSH _IO('t', 31)
|
||||
|
||||
#define TCGETS2 _IOR('T', 42, struct termios2)
|
||||
#define TCSETS2 _IOW('T', 43, struct termios2)
|
||||
#define TCSETSW2 _IOW('T', 44, struct termios2)
|
||||
#define TCSETSF2 _IOW('T', 45, struct termios2)
|
||||
|
||||
#define TIOCSWINSZ _IOW('t', 103, struct winsize)
|
||||
#define TIOCGWINSZ _IOR('t', 104, struct winsize)
|
||||
#define TIOCSTART _IO('t', 110) /* start output, like ^Q */
|
||||
|
|
|
|||
|
|
@ -26,6 +26,19 @@ struct termios {
|
|||
speed_t c_ospeed; /* output speed */
|
||||
};
|
||||
|
||||
/* Alpha has identical termios and termios2 */
|
||||
|
||||
struct termios2 {
|
||||
tcflag_t c_iflag; /* input mode flags */
|
||||
tcflag_t c_oflag; /* output mode flags */
|
||||
tcflag_t c_cflag; /* control mode flags */
|
||||
tcflag_t c_lflag; /* local mode flags */
|
||||
cc_t c_cc[NCCS]; /* control characters */
|
||||
cc_t c_line; /* line discipline (== c_cc[19]) */
|
||||
speed_t c_ispeed; /* input speed */
|
||||
speed_t c_ospeed; /* output speed */
|
||||
};
|
||||
|
||||
/* Alpha has matching termios and ktermios */
|
||||
|
||||
struct ktermios {
|
||||
|
|
@ -152,6 +165,7 @@ struct ktermios {
|
|||
#define B3000000 00034
|
||||
#define B3500000 00035
|
||||
#define B4000000 00036
|
||||
#define BOTHER 00037
|
||||
|
||||
#define CSIZE 00001400
|
||||
#define CS5 00000000
|
||||
|
|
@ -169,6 +183,9 @@ struct ktermios {
|
|||
#define CMSPAR 010000000000 /* mark or space (stick) parity */
|
||||
#define CRTSCTS 020000000000 /* flow control */
|
||||
|
||||
#define CIBAUD 07600000
|
||||
#define IBSHIFT 16
|
||||
|
||||
/* c_lflag bits */
|
||||
#define ISIG 0x00000080
|
||||
#define ICANON 0x00000100
|
||||
|
|
|
|||
|
|
@ -55,7 +55,7 @@
|
|||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "&uart1:115200n8";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@70000000 {
|
||||
|
|
|
|||
|
|
@ -740,7 +740,7 @@
|
|||
i2c1: i2c@21a0000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fs,imx6sll-i2c", "fsl,imx21-i2c";
|
||||
compatible = "fsl,imx6sll-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x021a0000 0x4000>;
|
||||
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks IMX6SLL_CLK_I2C1>;
|
||||
|
|
|
|||
|
|
@ -117,7 +117,9 @@
|
|||
regulator-name = "enet_3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
|
||||
gpio = <&gpio2 6 GPIO_ACTIVE_LOW>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_pcie_gpio: regulator-pcie-gpio {
|
||||
|
|
@ -180,6 +182,7 @@
|
|||
phy-supply = <®_enet_3v3>;
|
||||
phy-mode = "rgmii";
|
||||
phy-handle = <ðphy1>;
|
||||
phy-reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
|
||||
mdio {
|
||||
|
|
@ -373,6 +376,8 @@
|
|||
MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3 0x3081
|
||||
MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081
|
||||
MX6SX_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M 0x91
|
||||
/* phy reset */
|
||||
MX6SX_PAD_ENET2_CRS__GPIO2_IO_7 0x10b0
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -50,8 +50,8 @@
|
|||
compatible = "fsl,vf610m4";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyLP2,115200 clk_ignore_unused init=/linuxrc rw";
|
||||
stdout-path = "&uart2";
|
||||
bootargs = "clk_ignore_unused init=/linuxrc rw";
|
||||
stdout-path = "serial2:115200";
|
||||
};
|
||||
|
||||
memory@8c000000 {
|
||||
|
|
|
|||
|
|
@ -1,7 +1,6 @@
|
|||
CONFIG_SYSVIPC=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_PREEMPT=y
|
||||
CONFIG_CGROUPS=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_EMBEDDED=y
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@
|
|||
#ifndef _ASM_PGTABLE_2LEVEL_H
|
||||
#define _ASM_PGTABLE_2LEVEL_H
|
||||
|
||||
#define __PAGETABLE_PMD_FOLDED
|
||||
#define __PAGETABLE_PMD_FOLDED 1
|
||||
|
||||
/*
|
||||
* Hardware-wise, we have a two level page table structure, where the first
|
||||
|
|
|
|||
|
|
@ -112,7 +112,7 @@ ENTRY(cpu_v7_hvc_switch_mm)
|
|||
hvc #0
|
||||
ldmfd sp!, {r0 - r3}
|
||||
b cpu_v7_switch_mm
|
||||
ENDPROC(cpu_v7_smc_switch_mm)
|
||||
ENDPROC(cpu_v7_hvc_switch_mm)
|
||||
#endif
|
||||
ENTRY(cpu_v7_iciallu_switch_mm)
|
||||
mov r3, #0
|
||||
|
|
|
|||
|
|
@ -139,6 +139,7 @@
|
|||
clock-names = "stmmaceth";
|
||||
tx-fifo-depth = <16384>;
|
||||
rx-fifo-depth = <16384>;
|
||||
snps,multicast-filter-bins = <256>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -154,6 +155,7 @@
|
|||
clock-names = "stmmaceth";
|
||||
tx-fifo-depth = <16384>;
|
||||
rx-fifo-depth = <16384>;
|
||||
snps,multicast-filter-bins = <256>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -169,6 +171,7 @@
|
|||
clock-names = "stmmaceth";
|
||||
tx-fifo-depth = <16384>;
|
||||
rx-fifo-depth = <16384>;
|
||||
snps,multicast-filter-bins = <256>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -652,7 +652,7 @@
|
|||
clock-names = "fck", "brg_int", "scif_clk";
|
||||
dmas = <&dmac1 0x35>, <&dmac1 0x34>,
|
||||
<&dmac2 0x35>, <&dmac2 0x34>;
|
||||
dma-names = "tx", "rx";
|
||||
dma-names = "tx", "rx", "tx", "rx";
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 518>;
|
||||
status = "disabled";
|
||||
|
|
|
|||
|
|
@ -15,7 +15,7 @@
|
|||
|
||||
aliases {
|
||||
serial0 = &scif0;
|
||||
ethernet0 = &avb;
|
||||
ethernet0 = &gether;
|
||||
};
|
||||
|
||||
chosen {
|
||||
|
|
@ -97,23 +97,6 @@
|
|||
};
|
||||
};
|
||||
|
||||
&avb {
|
||||
pinctrl-0 = <&avb_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
phy-mode = "rgmii-id";
|
||||
phy-handle = <&phy0>;
|
||||
renesas,no-ether-link;
|
||||
status = "okay";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
rxc-skew-ps = <1500>;
|
||||
reg = <0>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&canfd {
|
||||
pinctrl-0 = <&canfd0_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
|
@ -139,6 +122,23 @@
|
|||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
&gether {
|
||||
pinctrl-0 = <&gether_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
phy-mode = "rgmii-id";
|
||||
phy-handle = <&phy0>;
|
||||
renesas,no-ether-link;
|
||||
status = "okay";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
rxc-skew-ps = <1500>;
|
||||
reg = <0>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
|
@ -236,16 +236,17 @@
|
|||
};
|
||||
|
||||
&pfc {
|
||||
avb_pins: avb {
|
||||
groups = "avb_mdio", "avb_rgmii";
|
||||
function = "avb";
|
||||
};
|
||||
|
||||
canfd0_pins: canfd0 {
|
||||
groups = "canfd0_data_a";
|
||||
function = "canfd0";
|
||||
};
|
||||
|
||||
gether_pins: gether {
|
||||
groups = "gether_mdio_a", "gether_rgmii",
|
||||
"gether_txcrefclk", "gether_txcrefclk_mega";
|
||||
function = "gether";
|
||||
};
|
||||
|
||||
i2c0_pins: i2c0 {
|
||||
groups = "i2c0";
|
||||
function = "i2c0";
|
||||
|
|
|
|||
|
|
@ -24,6 +24,14 @@
|
|||
#define KERNEL_DS UL(-1)
|
||||
#define USER_DS (TASK_SIZE_64 - 1)
|
||||
|
||||
/*
|
||||
* On arm64 systems, unaligned accesses by the CPU are cheap, and so there is
|
||||
* no point in shifting all network buffers by 2 bytes just to make some IP
|
||||
* header fields appear aligned in memory, potentially sacrificing some DMA
|
||||
* performance on some platforms.
|
||||
*/
|
||||
#define NET_IP_ALIGN 0
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#ifdef __KERNEL__
|
||||
|
||||
|
|
|
|||
|
|
@ -461,8 +461,6 @@ void __init arm64_memblock_init(void)
|
|||
high_memory = __va(memblock_end_of_DRAM() - 1) + 1;
|
||||
|
||||
dma_contiguous_reserve(arm64_dma_phys_limit);
|
||||
|
||||
memblock_allow_resize();
|
||||
}
|
||||
|
||||
void __init bootmem_init(void)
|
||||
|
|
|
|||
|
|
@ -659,6 +659,8 @@ void __init paging_init(void)
|
|||
|
||||
memblock_free(__pa_symbol(init_pg_dir),
|
||||
__pa_symbol(init_pg_end) - __pa_symbol(init_pg_dir));
|
||||
|
||||
memblock_allow_resize();
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -55,12 +55,12 @@
|
|||
*/
|
||||
#ifdef CONFIG_SUN3
|
||||
#define PTRS_PER_PTE 16
|
||||
#define __PAGETABLE_PMD_FOLDED
|
||||
#define __PAGETABLE_PMD_FOLDED 1
|
||||
#define PTRS_PER_PMD 1
|
||||
#define PTRS_PER_PGD 2048
|
||||
#elif defined(CONFIG_COLDFIRE)
|
||||
#define PTRS_PER_PTE 512
|
||||
#define __PAGETABLE_PMD_FOLDED
|
||||
#define __PAGETABLE_PMD_FOLDED 1
|
||||
#define PTRS_PER_PMD 1
|
||||
#define PTRS_PER_PGD 1024
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -63,7 +63,7 @@ extern int mem_init_done;
|
|||
|
||||
#include <asm-generic/4level-fixup.h>
|
||||
|
||||
#define __PAGETABLE_PMD_FOLDED
|
||||
#define __PAGETABLE_PMD_FOLDED 1
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#ifndef __ASSEMBLY__
|
||||
|
|
|
|||
|
|
@ -67,7 +67,7 @@ void (*cvmx_override_pko_queue_priority) (int pko_port,
|
|||
void (*cvmx_override_ipd_port_setup) (int ipd_port);
|
||||
|
||||
/* Port count per interface */
|
||||
static int interface_port_count[5];
|
||||
static int interface_port_count[9];
|
||||
|
||||
/**
|
||||
* Return the number of interfaces the chip has. Each interface
|
||||
|
|
|
|||
|
|
@ -50,7 +50,7 @@ void *arch_dma_alloc(struct device *dev, size_t size,
|
|||
void *ret;
|
||||
|
||||
ret = dma_direct_alloc_pages(dev, size, dma_handle, gfp, attrs);
|
||||
if (!ret && !(attrs & DMA_ATTR_NON_CONSISTENT)) {
|
||||
if (ret && !(attrs & DMA_ATTR_NON_CONSISTENT)) {
|
||||
dma_cache_wback_inv((unsigned long) ret, size);
|
||||
ret = (void *)UNCAC_ADDR(ret);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
#ifndef _ASMNDS32_PGTABLE_H
|
||||
#define _ASMNDS32_PGTABLE_H
|
||||
|
||||
#define __PAGETABLE_PMD_FOLDED
|
||||
#define __PAGETABLE_PMD_FOLDED 1
|
||||
#include <asm-generic/4level-fixup.h>
|
||||
#include <asm-generic/sizes.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -111,7 +111,7 @@ static inline void purge_tlb_entries(struct mm_struct *mm, unsigned long addr)
|
|||
#if CONFIG_PGTABLE_LEVELS == 3
|
||||
#define BITS_PER_PMD (PAGE_SHIFT + PMD_ORDER - BITS_PER_PMD_ENTRY)
|
||||
#else
|
||||
#define __PAGETABLE_PMD_FOLDED
|
||||
#define __PAGETABLE_PMD_FOLDED 1
|
||||
#define BITS_PER_PMD 0
|
||||
#endif
|
||||
#define PTRS_PER_PMD (1UL << BITS_PER_PMD)
|
||||
|
|
|
|||
|
|
@ -27,7 +27,7 @@ KBUILD_CFLAGS_DECOMPRESSOR += $(call cc-option,-ffreestanding)
|
|||
KBUILD_CFLAGS_DECOMPRESSOR += $(if $(CONFIG_DEBUG_INFO),-g)
|
||||
KBUILD_CFLAGS_DECOMPRESSOR += $(if $(CONFIG_DEBUG_INFO_DWARF4), $(call cc-option, -gdwarf-4,))
|
||||
UTS_MACHINE := s390x
|
||||
STACK_SIZE := $(if $(CONFIG_KASAN),32768,16384)
|
||||
STACK_SIZE := $(if $(CONFIG_KASAN),65536,16384)
|
||||
CHECKFLAGS += -D__s390__ -D__s390x__
|
||||
|
||||
export LD_BFD
|
||||
|
|
|
|||
|
|
@ -22,10 +22,10 @@ OBJCOPYFLAGS :=
|
|||
OBJECTS := $(addprefix $(obj)/,$(obj-y))
|
||||
|
||||
LDFLAGS_vmlinux := --oformat $(LD_BFD) -e startup -T
|
||||
$(obj)/vmlinux: $(obj)/vmlinux.lds $(objtree)/arch/s390/boot/startup.a $(OBJECTS)
|
||||
$(obj)/vmlinux: $(obj)/vmlinux.lds $(objtree)/arch/s390/boot/startup.a $(OBJECTS) FORCE
|
||||
$(call if_changed,ld)
|
||||
|
||||
OBJCOPYFLAGS_info.bin := -O binary --only-section=.vmlinux.info
|
||||
OBJCOPYFLAGS_info.bin := -O binary --only-section=.vmlinux.info --set-section-flags .vmlinux.info=load
|
||||
$(obj)/info.bin: vmlinux FORCE
|
||||
$(call if_changed,objcopy)
|
||||
|
||||
|
|
@ -46,17 +46,17 @@ suffix-$(CONFIG_KERNEL_LZMA) := .lzma
|
|||
suffix-$(CONFIG_KERNEL_LZO) := .lzo
|
||||
suffix-$(CONFIG_KERNEL_XZ) := .xz
|
||||
|
||||
$(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y)
|
||||
$(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) FORCE
|
||||
$(call if_changed,gzip)
|
||||
$(obj)/vmlinux.bin.bz2: $(vmlinux.bin.all-y)
|
||||
$(obj)/vmlinux.bin.bz2: $(vmlinux.bin.all-y) FORCE
|
||||
$(call if_changed,bzip2)
|
||||
$(obj)/vmlinux.bin.lz4: $(vmlinux.bin.all-y)
|
||||
$(obj)/vmlinux.bin.lz4: $(vmlinux.bin.all-y) FORCE
|
||||
$(call if_changed,lz4)
|
||||
$(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y)
|
||||
$(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) FORCE
|
||||
$(call if_changed,lzma)
|
||||
$(obj)/vmlinux.bin.lzo: $(vmlinux.bin.all-y)
|
||||
$(obj)/vmlinux.bin.lzo: $(vmlinux.bin.all-y) FORCE
|
||||
$(call if_changed,lzo)
|
||||
$(obj)/vmlinux.bin.xz: $(vmlinux.bin.all-y)
|
||||
$(obj)/vmlinux.bin.xz: $(vmlinux.bin.all-y) FORCE
|
||||
$(call if_changed,xzkern)
|
||||
|
||||
OBJCOPYFLAGS_piggy.o := -I binary -O elf64-s390 -B s390:64-bit --rename-section .data=.vmlinux.bin.compressed
|
||||
|
|
|
|||
|
|
@ -64,6 +64,8 @@ CONFIG_NUMA=y
|
|||
CONFIG_PREEMPT=y
|
||||
CONFIG_HZ_100=y
|
||||
CONFIG_KEXEC_FILE=y
|
||||
CONFIG_EXPOLINE=y
|
||||
CONFIG_EXPOLINE_AUTO=y
|
||||
CONFIG_MEMORY_HOTPLUG=y
|
||||
CONFIG_MEMORY_HOTREMOVE=y
|
||||
CONFIG_KSM=y
|
||||
|
|
@ -84,9 +86,11 @@ CONFIG_PCI_DEBUG=y
|
|||
CONFIG_HOTPLUG_PCI=y
|
||||
CONFIG_HOTPLUG_PCI_S390=y
|
||||
CONFIG_CHSC_SCH=y
|
||||
CONFIG_VFIO_AP=m
|
||||
CONFIG_CRASH_DUMP=y
|
||||
CONFIG_BINFMT_MISC=m
|
||||
CONFIG_HIBERNATION=y
|
||||
CONFIG_PM_DEBUG=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_PACKET_DIAG=m
|
||||
|
|
@ -161,8 +165,6 @@ CONFIG_NF_CONNTRACK_TFTP=m
|
|||
CONFIG_NF_CT_NETLINK=m
|
||||
CONFIG_NF_CT_NETLINK_TIMEOUT=m
|
||||
CONFIG_NF_TABLES=m
|
||||
CONFIG_NFT_EXTHDR=m
|
||||
CONFIG_NFT_META=m
|
||||
CONFIG_NFT_CT=m
|
||||
CONFIG_NFT_COUNTER=m
|
||||
CONFIG_NFT_LOG=m
|
||||
|
|
@ -365,6 +367,8 @@ CONFIG_NET_ACT_SKBEDIT=m
|
|||
CONFIG_NET_ACT_CSUM=m
|
||||
CONFIG_DNS_RESOLVER=y
|
||||
CONFIG_OPENVSWITCH=m
|
||||
CONFIG_VSOCKETS=m
|
||||
CONFIG_VIRTIO_VSOCKETS=m
|
||||
CONFIG_NETLINK_DIAG=m
|
||||
CONFIG_CGROUP_NET_PRIO=y
|
||||
CONFIG_BPF_JIT=y
|
||||
|
|
@ -461,6 +465,7 @@ CONFIG_PPTP=m
|
|||
CONFIG_PPPOL2TP=m
|
||||
CONFIG_PPP_ASYNC=m
|
||||
CONFIG_PPP_SYNC_TTY=m
|
||||
CONFIG_ISM=m
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
|
|
@ -486,9 +491,12 @@ CONFIG_MLX4_INFINIBAND=m
|
|||
CONFIG_MLX5_INFINIBAND=m
|
||||
CONFIG_VFIO=m
|
||||
CONFIG_VFIO_PCI=m
|
||||
CONFIG_VFIO_MDEV=m
|
||||
CONFIG_VFIO_MDEV_DEVICE=m
|
||||
CONFIG_VIRTIO_PCI=m
|
||||
CONFIG_VIRTIO_BALLOON=m
|
||||
CONFIG_VIRTIO_INPUT=y
|
||||
CONFIG_S390_AP_IOMMU=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_EXT4_FS_POSIX_ACL=y
|
||||
CONFIG_EXT4_FS_SECURITY=y
|
||||
|
|
@ -615,7 +623,6 @@ CONFIG_DEBUG_CREDENTIALS=y
|
|||
CONFIG_RCU_TORTURE_TEST=m
|
||||
CONFIG_RCU_CPU_STALL_TIMEOUT=300
|
||||
CONFIG_NOTIFIER_ERROR_INJECTION=m
|
||||
CONFIG_PM_NOTIFIER_ERROR_INJECT=m
|
||||
CONFIG_NETDEV_NOTIFIER_ERROR_INJECT=m
|
||||
CONFIG_FAULT_INJECTION=y
|
||||
CONFIG_FAILSLAB=y
|
||||
|
|
@ -727,3 +734,4 @@ CONFIG_APPLDATA_BASE=y
|
|||
CONFIG_KVM=m
|
||||
CONFIG_KVM_S390_UCONTROL=y
|
||||
CONFIG_VHOST_NET=m
|
||||
CONFIG_VHOST_VSOCK=m
|
||||
|
|
|
|||
|
|
@ -65,6 +65,8 @@ CONFIG_NR_CPUS=512
|
|||
CONFIG_NUMA=y
|
||||
CONFIG_HZ_100=y
|
||||
CONFIG_KEXEC_FILE=y
|
||||
CONFIG_EXPOLINE=y
|
||||
CONFIG_EXPOLINE_AUTO=y
|
||||
CONFIG_MEMORY_HOTPLUG=y
|
||||
CONFIG_MEMORY_HOTREMOVE=y
|
||||
CONFIG_KSM=y
|
||||
|
|
@ -82,9 +84,11 @@ CONFIG_PCI=y
|
|||
CONFIG_HOTPLUG_PCI=y
|
||||
CONFIG_HOTPLUG_PCI_S390=y
|
||||
CONFIG_CHSC_SCH=y
|
||||
CONFIG_VFIO_AP=m
|
||||
CONFIG_CRASH_DUMP=y
|
||||
CONFIG_BINFMT_MISC=m
|
||||
CONFIG_HIBERNATION=y
|
||||
CONFIG_PM_DEBUG=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_PACKET_DIAG=m
|
||||
|
|
@ -159,8 +163,6 @@ CONFIG_NF_CONNTRACK_TFTP=m
|
|||
CONFIG_NF_CT_NETLINK=m
|
||||
CONFIG_NF_CT_NETLINK_TIMEOUT=m
|
||||
CONFIG_NF_TABLES=m
|
||||
CONFIG_NFT_EXTHDR=m
|
||||
CONFIG_NFT_META=m
|
||||
CONFIG_NFT_CT=m
|
||||
CONFIG_NFT_COUNTER=m
|
||||
CONFIG_NFT_LOG=m
|
||||
|
|
@ -362,6 +364,8 @@ CONFIG_NET_ACT_SKBEDIT=m
|
|||
CONFIG_NET_ACT_CSUM=m
|
||||
CONFIG_DNS_RESOLVER=y
|
||||
CONFIG_OPENVSWITCH=m
|
||||
CONFIG_VSOCKETS=m
|
||||
CONFIG_VIRTIO_VSOCKETS=m
|
||||
CONFIG_NETLINK_DIAG=m
|
||||
CONFIG_CGROUP_NET_PRIO=y
|
||||
CONFIG_BPF_JIT=y
|
||||
|
|
@ -458,6 +462,7 @@ CONFIG_PPTP=m
|
|||
CONFIG_PPPOL2TP=m
|
||||
CONFIG_PPP_ASYNC=m
|
||||
CONFIG_PPP_SYNC_TTY=m
|
||||
CONFIG_ISM=m
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
|
|
@ -483,9 +488,12 @@ CONFIG_MLX4_INFINIBAND=m
|
|||
CONFIG_MLX5_INFINIBAND=m
|
||||
CONFIG_VFIO=m
|
||||
CONFIG_VFIO_PCI=m
|
||||
CONFIG_VFIO_MDEV=m
|
||||
CONFIG_VFIO_MDEV_DEVICE=m
|
||||
CONFIG_VIRTIO_PCI=m
|
||||
CONFIG_VIRTIO_BALLOON=m
|
||||
CONFIG_VIRTIO_INPUT=y
|
||||
CONFIG_S390_AP_IOMMU=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_EXT4_FS_POSIX_ACL=y
|
||||
CONFIG_EXT4_FS_SECURITY=y
|
||||
|
|
@ -666,3 +674,4 @@ CONFIG_APPLDATA_BASE=y
|
|||
CONFIG_KVM=m
|
||||
CONFIG_KVM_S390_UCONTROL=y
|
||||
CONFIG_VHOST_NET=m
|
||||
CONFIG_VHOST_VSOCK=m
|
||||
|
|
|
|||
|
|
@ -26,14 +26,23 @@ CONFIG_CGROUP_CPUACCT=y
|
|||
CONFIG_CGROUP_PERF=y
|
||||
CONFIG_NAMESPACES=y
|
||||
CONFIG_USER_NS=y
|
||||
CONFIG_CHECKPOINT_RESTORE=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_EXPERT=y
|
||||
# CONFIG_SYSFS_SYSCALL is not set
|
||||
CONFIG_CHECKPOINT_RESTORE=y
|
||||
CONFIG_BPF_SYSCALL=y
|
||||
CONFIG_USERFAULTFD=y
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_PROFILING=y
|
||||
CONFIG_LIVEPATCH=y
|
||||
CONFIG_NR_CPUS=256
|
||||
CONFIG_NUMA=y
|
||||
CONFIG_HZ_100=y
|
||||
CONFIG_KEXEC_FILE=y
|
||||
CONFIG_CRASH_DUMP=y
|
||||
CONFIG_HIBERNATION=y
|
||||
CONFIG_PM_DEBUG=y
|
||||
CONFIG_CMM=m
|
||||
CONFIG_OPROFILE=y
|
||||
CONFIG_KPROBES=y
|
||||
CONFIG_JUMP_LABEL=y
|
||||
|
|
@ -44,11 +53,7 @@ CONFIG_BLK_DEV_INTEGRITY=y
|
|||
CONFIG_PARTITION_ADVANCED=y
|
||||
CONFIG_IBM_PARTITION=y
|
||||
CONFIG_DEFAULT_DEADLINE=y
|
||||
CONFIG_LIVEPATCH=y
|
||||
CONFIG_NR_CPUS=256
|
||||
CONFIG_NUMA=y
|
||||
CONFIG_HZ_100=y
|
||||
CONFIG_KEXEC_FILE=y
|
||||
CONFIG_BINFMT_MISC=m
|
||||
CONFIG_MEMORY_HOTPLUG=y
|
||||
CONFIG_MEMORY_HOTREMOVE=y
|
||||
CONFIG_KSM=y
|
||||
|
|
@ -60,9 +65,6 @@ CONFIG_ZBUD=m
|
|||
CONFIG_ZSMALLOC=m
|
||||
CONFIG_ZSMALLOC_STAT=y
|
||||
CONFIG_IDLE_PAGE_TRACKING=y
|
||||
CONFIG_CRASH_DUMP=y
|
||||
CONFIG_BINFMT_MISC=m
|
||||
CONFIG_HIBERNATION=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
|
|
@ -98,6 +100,7 @@ CONFIG_BLK_DEV_NBD=m
|
|||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_VIRTIO_BLK=y
|
||||
CONFIG_SCSI=y
|
||||
# CONFIG_SCSI_MQ_DEFAULT is not set
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_CHR_DEV_ST=y
|
||||
CONFIG_BLK_DEV_SR=y
|
||||
|
|
@ -131,6 +134,7 @@ CONFIG_EQUALIZER=m
|
|||
CONFIG_TUN=m
|
||||
CONFIG_VIRTIO_NET=y
|
||||
# CONFIG_NET_VENDOR_ALACRITECH is not set
|
||||
# CONFIG_NET_VENDOR_AURORA is not set
|
||||
# CONFIG_NET_VENDOR_CORTINA is not set
|
||||
# CONFIG_NET_VENDOR_SOLARFLARE is not set
|
||||
# CONFIG_NET_VENDOR_SOCIONEXT is not set
|
||||
|
|
@ -157,33 +161,6 @@ CONFIG_TMPFS=y
|
|||
CONFIG_TMPFS_POSIX_ACL=y
|
||||
CONFIG_HUGETLBFS=y
|
||||
# CONFIG_NETWORK_FILESYSTEMS is not set
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_DEBUG_INFO_DWARF4=y
|
||||
CONFIG_GDB_SCRIPTS=y
|
||||
CONFIG_UNUSED_SYMBOLS=y
|
||||
CONFIG_DEBUG_SECTION_MISMATCH=y
|
||||
CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DEBUG_PAGEALLOC=y
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
||||
CONFIG_PANIC_ON_OOPS=y
|
||||
CONFIG_PROVE_LOCKING=y
|
||||
CONFIG_LOCK_STAT=y
|
||||
CONFIG_DEBUG_LOCKDEP=y
|
||||
CONFIG_DEBUG_ATOMIC_SLEEP=y
|
||||
CONFIG_DEBUG_LIST=y
|
||||
CONFIG_DEBUG_SG=y
|
||||
CONFIG_DEBUG_NOTIFIERS=y
|
||||
CONFIG_RCU_CPU_STALL_TIMEOUT=60
|
||||
CONFIG_LATENCYTOP=y
|
||||
CONFIG_SCHED_TRACER=y
|
||||
CONFIG_FTRACE_SYSCALLS=y
|
||||
CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP=y
|
||||
CONFIG_STACK_TRACER=y
|
||||
CONFIG_BLK_DEV_IO_TRACE=y
|
||||
CONFIG_FUNCTION_PROFILER=y
|
||||
# CONFIG_RUNTIME_TESTING_MENU is not set
|
||||
CONFIG_S390_PTDUMP=y
|
||||
CONFIG_CRYPTO_CRYPTD=m
|
||||
CONFIG_CRYPTO_AUTHENC=m
|
||||
CONFIG_CRYPTO_TEST=m
|
||||
|
|
@ -193,6 +170,7 @@ CONFIG_CRYPTO_CBC=y
|
|||
CONFIG_CRYPTO_CFB=m
|
||||
CONFIG_CRYPTO_CTS=m
|
||||
CONFIG_CRYPTO_LRW=m
|
||||
CONFIG_CRYPTO_OFB=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_XTS=m
|
||||
CONFIG_CRYPTO_CMAC=m
|
||||
|
|
@ -231,7 +209,6 @@ CONFIG_CRYPTO_USER_API_HASH=m
|
|||
CONFIG_CRYPTO_USER_API_SKCIPHER=m
|
||||
CONFIG_CRYPTO_USER_API_RNG=m
|
||||
CONFIG_ZCRYPT=m
|
||||
CONFIG_ZCRYPT_MULTIDEVNODES=y
|
||||
CONFIG_PKEY=m
|
||||
CONFIG_CRYPTO_PAES_S390=m
|
||||
CONFIG_CRYPTO_SHA1_S390=m
|
||||
|
|
@ -247,4 +224,30 @@ CONFIG_CRC7=m
|
|||
# CONFIG_XZ_DEC_ARM is not set
|
||||
# CONFIG_XZ_DEC_ARMTHUMB is not set
|
||||
# CONFIG_XZ_DEC_SPARC is not set
|
||||
CONFIG_CMM=m
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_DEBUG_INFO_DWARF4=y
|
||||
CONFIG_GDB_SCRIPTS=y
|
||||
CONFIG_UNUSED_SYMBOLS=y
|
||||
CONFIG_DEBUG_SECTION_MISMATCH=y
|
||||
CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DEBUG_PAGEALLOC=y
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
||||
CONFIG_PANIC_ON_OOPS=y
|
||||
CONFIG_PROVE_LOCKING=y
|
||||
CONFIG_LOCK_STAT=y
|
||||
CONFIG_DEBUG_LOCKDEP=y
|
||||
CONFIG_DEBUG_ATOMIC_SLEEP=y
|
||||
CONFIG_DEBUG_LIST=y
|
||||
CONFIG_DEBUG_SG=y
|
||||
CONFIG_DEBUG_NOTIFIERS=y
|
||||
CONFIG_RCU_CPU_STALL_TIMEOUT=60
|
||||
CONFIG_LATENCYTOP=y
|
||||
CONFIG_SCHED_TRACER=y
|
||||
CONFIG_FTRACE_SYSCALLS=y
|
||||
CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP=y
|
||||
CONFIG_STACK_TRACER=y
|
||||
CONFIG_BLK_DEV_IO_TRACE=y
|
||||
CONFIG_FUNCTION_PROFILER=y
|
||||
# CONFIG_RUNTIME_TESTING_MENU is not set
|
||||
CONFIG_S390_PTDUMP=y
|
||||
|
|
|
|||
|
|
@ -46,8 +46,6 @@ static inline int init_new_context(struct task_struct *tsk,
|
|||
mm->context.asce_limit = STACK_TOP_MAX;
|
||||
mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
|
||||
_ASCE_USER_BITS | _ASCE_TYPE_REGION3;
|
||||
/* pgd_alloc() did not account this pud */
|
||||
mm_inc_nr_puds(mm);
|
||||
break;
|
||||
case -PAGE_SIZE:
|
||||
/* forked 5-level task, set new asce with new_mm->pgd */
|
||||
|
|
@ -63,9 +61,6 @@ static inline int init_new_context(struct task_struct *tsk,
|
|||
/* forked 2-level compat task, set new asce with new mm->pgd */
|
||||
mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
|
||||
_ASCE_USER_BITS | _ASCE_TYPE_SEGMENT;
|
||||
/* pgd_alloc() did not account this pmd */
|
||||
mm_inc_nr_pmds(mm);
|
||||
mm_inc_nr_puds(mm);
|
||||
}
|
||||
crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm));
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -36,11 +36,11 @@ static inline void crst_table_init(unsigned long *crst, unsigned long entry)
|
|||
|
||||
static inline unsigned long pgd_entry_type(struct mm_struct *mm)
|
||||
{
|
||||
if (mm->context.asce_limit <= _REGION3_SIZE)
|
||||
if (mm_pmd_folded(mm))
|
||||
return _SEGMENT_ENTRY_EMPTY;
|
||||
if (mm->context.asce_limit <= _REGION2_SIZE)
|
||||
if (mm_pud_folded(mm))
|
||||
return _REGION3_ENTRY_EMPTY;
|
||||
if (mm->context.asce_limit <= _REGION1_SIZE)
|
||||
if (mm_p4d_folded(mm))
|
||||
return _REGION2_ENTRY_EMPTY;
|
||||
return _REGION1_ENTRY_EMPTY;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -493,6 +493,24 @@ static inline int is_module_addr(void *addr)
|
|||
_REGION_ENTRY_PROTECT | \
|
||||
_REGION_ENTRY_NOEXEC)
|
||||
|
||||
static inline bool mm_p4d_folded(struct mm_struct *mm)
|
||||
{
|
||||
return mm->context.asce_limit <= _REGION1_SIZE;
|
||||
}
|
||||
#define mm_p4d_folded(mm) mm_p4d_folded(mm)
|
||||
|
||||
static inline bool mm_pud_folded(struct mm_struct *mm)
|
||||
{
|
||||
return mm->context.asce_limit <= _REGION2_SIZE;
|
||||
}
|
||||
#define mm_pud_folded(mm) mm_pud_folded(mm)
|
||||
|
||||
static inline bool mm_pmd_folded(struct mm_struct *mm)
|
||||
{
|
||||
return mm->context.asce_limit <= _REGION3_SIZE;
|
||||
}
|
||||
#define mm_pmd_folded(mm) mm_pmd_folded(mm)
|
||||
|
||||
static inline int mm_has_pgste(struct mm_struct *mm)
|
||||
{
|
||||
#ifdef CONFIG_PGSTE
|
||||
|
|
|
|||
|
|
@ -236,7 +236,7 @@ static inline unsigned long current_stack_pointer(void)
|
|||
return sp;
|
||||
}
|
||||
|
||||
static __no_sanitize_address_or_inline unsigned short stap(void)
|
||||
static __no_kasan_or_inline unsigned short stap(void)
|
||||
{
|
||||
unsigned short cpu_address;
|
||||
|
||||
|
|
@ -330,7 +330,7 @@ static inline void __load_psw(psw_t psw)
|
|||
* Set PSW mask to specified value, while leaving the
|
||||
* PSW addr pointing to the next instruction.
|
||||
*/
|
||||
static __no_sanitize_address_or_inline void __load_psw_mask(unsigned long mask)
|
||||
static __no_kasan_or_inline void __load_psw_mask(unsigned long mask)
|
||||
{
|
||||
unsigned long addr;
|
||||
psw_t psw;
|
||||
|
|
|
|||
|
|
@ -14,7 +14,7 @@
|
|||
* General size of kernel stacks
|
||||
*/
|
||||
#ifdef CONFIG_KASAN
|
||||
#define THREAD_SIZE_ORDER 3
|
||||
#define THREAD_SIZE_ORDER 4
|
||||
#else
|
||||
#define THREAD_SIZE_ORDER 2
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -136,7 +136,7 @@ static inline void pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
|
|||
static inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd,
|
||||
unsigned long address)
|
||||
{
|
||||
if (tlb->mm->context.asce_limit <= _REGION3_SIZE)
|
||||
if (mm_pmd_folded(tlb->mm))
|
||||
return;
|
||||
pgtable_pmd_page_dtor(virt_to_page(pmd));
|
||||
tlb_remove_table(tlb, pmd);
|
||||
|
|
@ -152,7 +152,7 @@ static inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd,
|
|||
static inline void p4d_free_tlb(struct mmu_gather *tlb, p4d_t *p4d,
|
||||
unsigned long address)
|
||||
{
|
||||
if (tlb->mm->context.asce_limit <= _REGION1_SIZE)
|
||||
if (mm_p4d_folded(tlb->mm))
|
||||
return;
|
||||
tlb_remove_table(tlb, p4d);
|
||||
}
|
||||
|
|
@ -167,7 +167,7 @@ static inline void p4d_free_tlb(struct mmu_gather *tlb, p4d_t *p4d,
|
|||
static inline void pud_free_tlb(struct mmu_gather *tlb, pud_t *pud,
|
||||
unsigned long address)
|
||||
{
|
||||
if (tlb->mm->context.asce_limit <= _REGION2_SIZE)
|
||||
if (mm_pud_folded(tlb->mm))
|
||||
return;
|
||||
tlb_remove_table(tlb, pud);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -236,10 +236,10 @@ ENTRY(__switch_to)
|
|||
stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
|
||||
lghi %r4,__TASK_stack
|
||||
lghi %r1,__TASK_thread
|
||||
lg %r5,0(%r4,%r3) # start of kernel stack of next
|
||||
llill %r5,STACK_INIT
|
||||
stg %r15,__THREAD_ksp(%r1,%r2) # store kernel stack of prev
|
||||
lgr %r15,%r5
|
||||
aghi %r15,STACK_INIT # end of kernel stack of next
|
||||
lg %r15,0(%r4,%r3) # start of kernel stack of next
|
||||
agr %r15,%r5 # end of kernel stack of next
|
||||
stg %r3,__LC_CURRENT # store task struct of next
|
||||
stg %r15,__LC_KERNEL_STACK # store end of kernel stack
|
||||
lg %r15,__THREAD_ksp(%r1,%r3) # load kernel stack of next
|
||||
|
|
|
|||
|
|
@ -373,7 +373,7 @@ static int __hw_perf_event_init(struct perf_event *event)
|
|||
return -ENOENT;
|
||||
|
||||
if (ev > PERF_CPUM_CF_MAX_CTR)
|
||||
return -EINVAL;
|
||||
return -ENOENT;
|
||||
|
||||
/* Obtain the counter set to which the specified counter belongs */
|
||||
set = get_counter_set(ev);
|
||||
|
|
|
|||
|
|
@ -1842,10 +1842,30 @@ static void cpumsf_pmu_del(struct perf_event *event, int flags)
|
|||
CPUMF_EVENT_ATTR(SF, SF_CYCLES_BASIC, PERF_EVENT_CPUM_SF);
|
||||
CPUMF_EVENT_ATTR(SF, SF_CYCLES_BASIC_DIAG, PERF_EVENT_CPUM_SF_DIAG);
|
||||
|
||||
static struct attribute *cpumsf_pmu_events_attr[] = {
|
||||
CPUMF_EVENT_PTR(SF, SF_CYCLES_BASIC),
|
||||
NULL,
|
||||
NULL,
|
||||
/* Attribute list for CPU_SF.
|
||||
*
|
||||
* The availablitiy depends on the CPU_MF sampling facility authorization
|
||||
* for basic + diagnositic samples. This is determined at initialization
|
||||
* time by the sampling facility device driver.
|
||||
* If the authorization for basic samples is turned off, it should be
|
||||
* also turned off for diagnostic sampling.
|
||||
*
|
||||
* During initialization of the device driver, check the authorization
|
||||
* level for diagnostic sampling and installs the attribute
|
||||
* file for diagnostic sampling if necessary.
|
||||
*
|
||||
* For now install a placeholder to reference all possible attributes:
|
||||
* SF_CYCLES_BASIC and SF_CYCLES_BASIC_DIAG.
|
||||
* Add another entry for the final NULL pointer.
|
||||
*/
|
||||
enum {
|
||||
SF_CYCLES_BASIC_ATTR_IDX = 0,
|
||||
SF_CYCLES_BASIC_DIAG_ATTR_IDX,
|
||||
SF_CYCLES_ATTR_MAX
|
||||
};
|
||||
|
||||
static struct attribute *cpumsf_pmu_events_attr[SF_CYCLES_ATTR_MAX + 1] = {
|
||||
[SF_CYCLES_BASIC_ATTR_IDX] = CPUMF_EVENT_PTR(SF, SF_CYCLES_BASIC)
|
||||
};
|
||||
|
||||
PMU_FORMAT_ATTR(event, "config:0-63");
|
||||
|
|
@ -2040,7 +2060,10 @@ static int __init init_cpum_sampling_pmu(void)
|
|||
|
||||
if (si.ad) {
|
||||
sfb_set_limits(CPUM_SF_MIN_SDB, CPUM_SF_MAX_SDB);
|
||||
cpumsf_pmu_events_attr[1] =
|
||||
/* Sampling of diagnostic data authorized,
|
||||
* install event into attribute list of PMU device.
|
||||
*/
|
||||
cpumsf_pmu_events_attr[SF_CYCLES_BASIC_DIAG_ATTR_IDX] =
|
||||
CPUMF_EVENT_PTR(SF, SF_CYCLES_BASIC_DIAG);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -37,7 +37,7 @@ KASAN_SANITIZE := n
|
|||
$(obj)/vdso32_wrapper.o : $(obj)/vdso32.so
|
||||
|
||||
# link rule for the .so file, .lds has to be first
|
||||
$(obj)/vdso32.so.dbg: $(src)/vdso32.lds $(obj-vdso32)
|
||||
$(obj)/vdso32.so.dbg: $(src)/vdso32.lds $(obj-vdso32) FORCE
|
||||
$(call if_changed,vdso32ld)
|
||||
|
||||
# strip rule for the .so file
|
||||
|
|
@ -46,12 +46,12 @@ $(obj)/%.so: $(obj)/%.so.dbg FORCE
|
|||
$(call if_changed,objcopy)
|
||||
|
||||
# assembly rules for the .S files
|
||||
$(obj-vdso32): %.o: %.S
|
||||
$(obj-vdso32): %.o: %.S FORCE
|
||||
$(call if_changed_dep,vdso32as)
|
||||
|
||||
# actual build commands
|
||||
quiet_cmd_vdso32ld = VDSO32L $@
|
||||
cmd_vdso32ld = $(CC) $(c_flags) -Wl,-T $^ -o $@
|
||||
cmd_vdso32ld = $(CC) $(c_flags) -Wl,-T $(filter %.lds %.o,$^) -o $@
|
||||
quiet_cmd_vdso32as = VDSO32A $@
|
||||
cmd_vdso32as = $(CC) $(a_flags) -c -o $@ $<
|
||||
|
||||
|
|
|
|||
|
|
@ -37,7 +37,7 @@ KASAN_SANITIZE := n
|
|||
$(obj)/vdso64_wrapper.o : $(obj)/vdso64.so
|
||||
|
||||
# link rule for the .so file, .lds has to be first
|
||||
$(obj)/vdso64.so.dbg: $(src)/vdso64.lds $(obj-vdso64)
|
||||
$(obj)/vdso64.so.dbg: $(src)/vdso64.lds $(obj-vdso64) FORCE
|
||||
$(call if_changed,vdso64ld)
|
||||
|
||||
# strip rule for the .so file
|
||||
|
|
@ -46,12 +46,12 @@ $(obj)/%.so: $(obj)/%.so.dbg FORCE
|
|||
$(call if_changed,objcopy)
|
||||
|
||||
# assembly rules for the .S files
|
||||
$(obj-vdso64): %.o: %.S
|
||||
$(obj-vdso64): %.o: %.S FORCE
|
||||
$(call if_changed_dep,vdso64as)
|
||||
|
||||
# actual build commands
|
||||
quiet_cmd_vdso64ld = VDSO64L $@
|
||||
cmd_vdso64ld = $(CC) $(c_flags) -Wl,-T $^ -o $@
|
||||
cmd_vdso64ld = $(CC) $(c_flags) -Wl,-T $(filter %.lds %.o,$^) -o $@
|
||||
quiet_cmd_vdso64as = VDSO64A $@
|
||||
cmd_vdso64as = $(CC) $(a_flags) -c -o $@ $<
|
||||
|
||||
|
|
|
|||
|
|
@ -154,14 +154,14 @@ SECTIONS
|
|||
* uncompressed image info used by the decompressor
|
||||
* it should match struct vmlinux_info
|
||||
*/
|
||||
.vmlinux.info 0 : {
|
||||
.vmlinux.info 0 (INFO) : {
|
||||
QUAD(_stext) /* default_lma */
|
||||
QUAD(startup_continue) /* entry */
|
||||
QUAD(__bss_start - _stext) /* image_size */
|
||||
QUAD(__bss_stop - __bss_start) /* bss_size */
|
||||
QUAD(__boot_data_start) /* bootdata_off */
|
||||
QUAD(__boot_data_end - __boot_data_start) /* bootdata_size */
|
||||
}
|
||||
} :NONE
|
||||
|
||||
/* Debugging sections. */
|
||||
STABS_DEBUG
|
||||
|
|
|
|||
|
|
@ -101,6 +101,7 @@ int crst_table_upgrade(struct mm_struct *mm, unsigned long end)
|
|||
mm->context.asce_limit = _REGION1_SIZE;
|
||||
mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
|
||||
_ASCE_USER_BITS | _ASCE_TYPE_REGION2;
|
||||
mm_inc_nr_puds(mm);
|
||||
} else {
|
||||
crst_table_init(table, _REGION1_ENTRY_EMPTY);
|
||||
pgd_populate(mm, (pgd_t *) table, (p4d_t *) pgd);
|
||||
|
|
|
|||
|
|
@ -53,6 +53,7 @@ int __node_distance(int a, int b)
|
|||
{
|
||||
return mode->distance ? mode->distance(a, b) : 0;
|
||||
}
|
||||
EXPORT_SYMBOL(__node_distance);
|
||||
|
||||
int numa_debug_enabled;
|
||||
|
||||
|
|
|
|||
|
|
@ -1305,6 +1305,7 @@ static int ubd_queue_one_vec(struct blk_mq_hw_ctx *hctx, struct request *req,
|
|||
io_req->fds[0] = dev->cow.fd;
|
||||
else
|
||||
io_req->fds[0] = dev->fd;
|
||||
io_req->error = 0;
|
||||
|
||||
if (req_op(req) == REQ_OP_FLUSH) {
|
||||
io_req->op = UBD_FLUSH;
|
||||
|
|
@ -1313,9 +1314,7 @@ static int ubd_queue_one_vec(struct blk_mq_hw_ctx *hctx, struct request *req,
|
|||
io_req->cow_offset = -1;
|
||||
io_req->offset = off;
|
||||
io_req->length = bvec->bv_len;
|
||||
io_req->error = 0;
|
||||
io_req->sector_mask = 0;
|
||||
|
||||
io_req->op = rq_data_dir(req) == READ ? UBD_READ : UBD_WRITE;
|
||||
io_req->offsets[0] = 0;
|
||||
io_req->offsets[1] = dev->cow.data_offset;
|
||||
|
|
@ -1341,11 +1340,14 @@ static int ubd_queue_one_vec(struct blk_mq_hw_ctx *hctx, struct request *req,
|
|||
static blk_status_t ubd_queue_rq(struct blk_mq_hw_ctx *hctx,
|
||||
const struct blk_mq_queue_data *bd)
|
||||
{
|
||||
struct ubd *ubd_dev = hctx->queue->queuedata;
|
||||
struct request *req = bd->rq;
|
||||
int ret = 0;
|
||||
|
||||
blk_mq_start_request(req);
|
||||
|
||||
spin_lock_irq(&ubd_dev->lock);
|
||||
|
||||
if (req_op(req) == REQ_OP_FLUSH) {
|
||||
ret = ubd_queue_one_vec(hctx, req, 0, NULL);
|
||||
} else {
|
||||
|
|
@ -1361,9 +1363,11 @@ static blk_status_t ubd_queue_rq(struct blk_mq_hw_ctx *hctx,
|
|||
}
|
||||
}
|
||||
out:
|
||||
if (ret < 0) {
|
||||
spin_unlock_irq(&ubd_dev->lock);
|
||||
|
||||
if (ret < 0)
|
||||
blk_mq_requeue_request(req, true);
|
||||
}
|
||||
|
||||
return BLK_STS_OK;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -525,7 +525,6 @@ config X86_VSMP
|
|||
bool "ScaleMP vSMP"
|
||||
select HYPERVISOR_GUEST
|
||||
select PARAVIRT
|
||||
select PARAVIRT_XXL
|
||||
depends on X86_64 && PCI
|
||||
depends on X86_EXTENDED_PLATFORM
|
||||
depends on SMP
|
||||
|
|
|
|||
|
|
@ -213,8 +213,6 @@ ifdef CONFIG_X86_64
|
|||
KBUILD_LDFLAGS += $(call ld-option, -z max-page-size=0x200000)
|
||||
endif
|
||||
|
||||
# Speed up the build
|
||||
KBUILD_CFLAGS += -pipe
|
||||
# Workaround for a gcc prelease that unfortunately was shipped in a suse release
|
||||
KBUILD_CFLAGS += -Wno-sign-compare
|
||||
#
|
||||
|
|
@ -239,7 +237,7 @@ archheaders:
|
|||
archmacros:
|
||||
$(Q)$(MAKE) $(build)=arch/x86/kernel arch/x86/kernel/macros.s
|
||||
|
||||
ASM_MACRO_FLAGS = -Wa,arch/x86/kernel/macros.s -Wa,-
|
||||
ASM_MACRO_FLAGS = -Wa,arch/x86/kernel/macros.s
|
||||
export ASM_MACRO_FLAGS
|
||||
KBUILD_CFLAGS += $(ASM_MACRO_FLAGS)
|
||||
|
||||
|
|
|
|||
|
|
@ -221,6 +221,8 @@ static inline void mce_hygon_feature_init(struct cpuinfo_x86 *c) { return mce_am
|
|||
|
||||
int mce_available(struct cpuinfo_x86 *c);
|
||||
bool mce_is_memory_error(struct mce *m);
|
||||
bool mce_is_correctable(struct mce *m);
|
||||
int mce_usable_address(struct mce *m);
|
||||
|
||||
DECLARE_PER_CPU(unsigned, mce_exception_count);
|
||||
DECLARE_PER_CPU(unsigned, mce_poll_count);
|
||||
|
|
|
|||
|
|
@ -232,7 +232,7 @@ static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input2)
|
|||
: "cc");
|
||||
}
|
||||
#endif
|
||||
return hv_status;
|
||||
return hv_status;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue