ARM: kprobes: Add Thumb breakpoint support
Extend the breakpoint insertion and catching functions to support Thumb code. As breakpoints are no longer of a fixed size, the flush_insns macro is modified to take a size argument instead of an instruction count. Note, we need both 16- and 32-bit Thumb breakpoints, because if we were to use a 16-bit breakpoint to replace a 32-bit instruction which was in an IT block, and the condition check failed, then the breakpoint may not fire (it's unpredictable behaviour) and the CPU could then try and execute the second half of the 32-bit Thumb instruction. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>hifive-unleashed-5.1
Jon Medhurst
Tixy
parent
856bc35639
commit
aceb487ab2
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@ -34,10 +34,10 @@
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min((unsigned long)MAX_STACK_SIZE, \
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(unsigned long)current_thread_info() + THREAD_START_SP - (addr))
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#define flush_insns(addr, cnt) \
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#define flush_insns(addr, size) \
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flush_icache_range((unsigned long)(addr), \
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(unsigned long)(addr) + \
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sizeof(kprobe_opcode_t) * (cnt))
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(size))
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/* Used as a marker in ARM_pc to note when we're in a jprobe. */
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#define JPROBE_MAGIC_ADDR 0xffffffff
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@ -86,7 +86,8 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
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return -ENOMEM;
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for (is = 0; is < MAX_INSN_SIZE; ++is)
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p->ainsn.insn[is] = tmp_insn[is];
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flush_insns(p->ainsn.insn, MAX_INSN_SIZE);
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flush_insns(p->ainsn.insn,
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sizeof(p->ainsn.insn[0]) * MAX_INSN_SIZE);
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break;
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case INSN_GOOD_NO_SLOT: /* instruction doesn't need insn slot */
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@ -97,24 +98,82 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
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return 0;
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}
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#ifdef CONFIG_THUMB2_KERNEL
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/*
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* For a 32-bit Thumb breakpoint spanning two memory words we need to take
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* special precautions to insert the breakpoint atomically, especially on SMP
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* systems. This is achieved by calling this arming function using stop_machine.
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*/
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static int __kprobes set_t32_breakpoint(void *addr)
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{
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((u16 *)addr)[0] = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION >> 16;
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((u16 *)addr)[1] = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION & 0xffff;
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flush_insns(addr, 2*sizeof(u16));
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return 0;
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}
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void __kprobes arch_arm_kprobe(struct kprobe *p)
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{
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*p->addr = KPROBE_BREAKPOINT_INSTRUCTION;
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flush_insns(p->addr, 1);
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uintptr_t addr = (uintptr_t)p->addr & ~1; /* Remove any Thumb flag */
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if (!is_wide_instruction(p->opcode)) {
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*(u16 *)addr = KPROBE_THUMB16_BREAKPOINT_INSTRUCTION;
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flush_insns(addr, sizeof(u16));
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} else if (addr & 2) {
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/* A 32-bit instruction spanning two words needs special care */
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stop_machine(set_t32_breakpoint, (void *)addr, &cpu_online_map);
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} else {
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/* Word aligned 32-bit instruction can be written atomically */
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u32 bkp = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION;
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#ifndef __ARMEB__ /* Swap halfwords for little-endian */
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bkp = (bkp >> 16) | (bkp << 16);
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#endif
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*(u32 *)addr = bkp;
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flush_insns(addr, sizeof(u32));
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}
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}
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#else /* !CONFIG_THUMB2_KERNEL */
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void __kprobes arch_arm_kprobe(struct kprobe *p)
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{
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*p->addr = KPROBE_ARM_BREAKPOINT_INSTRUCTION;
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flush_insns(p->addr, sizeof(p->addr[0]));
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}
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#endif /* !CONFIG_THUMB2_KERNEL */
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/*
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* The actual disarming is done here on each CPU and synchronized using
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* stop_machine. This synchronization is necessary on SMP to avoid removing
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* a probe between the moment the 'Undefined Instruction' exception is raised
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* and the moment the exception handler reads the faulting instruction from
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* memory.
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* memory. It is also needed to atomically set the two half-words of a 32-bit
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* Thumb breakpoint.
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*/
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int __kprobes __arch_disarm_kprobe(void *p)
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{
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struct kprobe *kp = p;
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#ifdef CONFIG_THUMB2_KERNEL
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u16 *addr = (u16 *)((uintptr_t)kp->addr & ~1);
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kprobe_opcode_t insn = kp->opcode;
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unsigned int len;
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if (is_wide_instruction(insn)) {
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((u16 *)addr)[0] = insn>>16;
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((u16 *)addr)[1] = insn;
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len = 2*sizeof(u16);
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} else {
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((u16 *)addr)[0] = insn;
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len = sizeof(u16);
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}
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flush_insns(addr, len);
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#else /* !CONFIG_THUMB2_KERNEL */
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*kp->addr = kp->opcode;
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flush_insns(kp->addr, 1);
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flush_insns(kp->addr, sizeof(kp->addr[0]));
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#endif
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return 0;
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}
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@ -167,11 +226,23 @@ void __kprobes kprobe_handler(struct pt_regs *regs)
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{
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struct kprobe *p, *cur;
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struct kprobe_ctlblk *kcb;
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kprobe_opcode_t *addr = (kprobe_opcode_t *)regs->ARM_pc;
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kcb = get_kprobe_ctlblk();
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cur = kprobe_running();
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p = get_kprobe(addr);
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#ifdef CONFIG_THUMB2_KERNEL
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/*
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* First look for a probe which was registered using an address with
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* bit 0 set, this is the usual situation for pointers to Thumb code.
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* If not found, fallback to looking for one with bit 0 clear.
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*/
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p = get_kprobe((kprobe_opcode_t *)(regs->ARM_pc | 1));
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if (!p)
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p = get_kprobe((kprobe_opcode_t *)regs->ARM_pc);
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#else /* ! CONFIG_THUMB2_KERNEL */
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p = get_kprobe((kprobe_opcode_t *)regs->ARM_pc);
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#endif
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if (p) {
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if (cur) {
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@ -511,17 +582,44 @@ int __kprobes arch_trampoline_kprobe(struct kprobe *p)
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return 0;
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}
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static struct undef_hook kprobes_break_hook = {
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.instr_mask = 0xffffffff,
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.instr_val = KPROBE_BREAKPOINT_INSTRUCTION,
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#ifdef CONFIG_THUMB2_KERNEL
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static struct undef_hook kprobes_thumb16_break_hook = {
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.instr_mask = 0xffff,
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.instr_val = KPROBE_THUMB16_BREAKPOINT_INSTRUCTION,
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.cpsr_mask = MODE_MASK,
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.cpsr_val = SVC_MODE,
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.fn = kprobe_trap_handler,
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};
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static struct undef_hook kprobes_thumb32_break_hook = {
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.instr_mask = 0xffffffff,
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.instr_val = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION,
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.cpsr_mask = MODE_MASK,
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.cpsr_val = SVC_MODE,
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.fn = kprobe_trap_handler,
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};
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#else /* !CONFIG_THUMB2_KERNEL */
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static struct undef_hook kprobes_arm_break_hook = {
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.instr_mask = 0xffffffff,
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.instr_val = KPROBE_ARM_BREAKPOINT_INSTRUCTION,
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.cpsr_mask = MODE_MASK,
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.cpsr_val = SVC_MODE,
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.fn = kprobe_trap_handler,
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};
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#endif /* !CONFIG_THUMB2_KERNEL */
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int __init arch_init_kprobes()
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{
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arm_kprobe_decode_init();
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register_undef_hook(&kprobes_break_hook);
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#ifdef CONFIG_THUMB2_KERNEL
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register_undef_hook(&kprobes_thumb16_break_hook);
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register_undef_hook(&kprobes_thumb32_break_hook);
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#else
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register_undef_hook(&kprobes_arm_break_hook);
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#endif
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return 0;
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}
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@ -18,10 +18,13 @@
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#define _ARM_KERNEL_KPROBES_H
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/*
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* This undefined instruction must be unique and
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* These undefined instructions must be unique and
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* reserved solely for kprobes' use.
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*/
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#define KPROBE_BREAKPOINT_INSTRUCTION 0xe7f001f8
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#define KPROBE_ARM_BREAKPOINT_INSTRUCTION 0xe7f001f8
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#define KPROBE_THUMB16_BREAKPOINT_INSTRUCTION 0xde18
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#define KPROBE_THUMB32_BREAKPOINT_INSTRUCTION 0xf7f0a018
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enum kprobe_insn {
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INSN_REJECTED,
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