ARM: OMAP3+: dpll: use DPLL's round_rate when setting rate
omap3_noncore_dpll_set_rate uses omap2_dpll_round_rate explicitly. Instead use the struct clk pointer's round_rate function to allow for DPLL's with special needs. An example of a clock that requires this is DPLL_ABE on OMAP4 which can have a 4x multiplier on top of the usual MN dividers depending on register settings. This requires a special round_rate function that might yield a rate different from the initial target. Signed-off-by: Mike Turquette <mturquette@ti.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com> [paul@pwsan.com: split rate assignment portion into a separate patch] Signed-off-by: Paul Walmsley <paul@pwsan.com>
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@ -455,7 +455,7 @@ int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
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new_parent = dd->clk_bypass;
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} else {
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if (dd->last_rounded_rate != rate)
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omap2_dpll_round_rate(clk, rate);
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clk->round_rate(clk, rate);
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if (dd->last_rounded_rate == 0)
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return -EINVAL;
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