1
0
Fork 0

ARM: dts: berlin: Add BG2 ethernet DT nodes

Marvell BG2 has two fast ethernet controllers with internal PHY,
add the corresponding nodes to SoC dtsi.

Tested-by: Antoine Ténart <antoine.tenart@free-electrons.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
hifive-unleashed-5.1
Sebastian Hesselbarth 2014-10-22 20:26:49 +02:00
parent 297bb063b6
commit ae01f64baa
1 changed files with 36 additions and 0 deletions

View File

@ -79,11 +79,47 @@
clocks = <&chip CLKID_TWD>;
};
eth1: ethernet@b90000 {
compatible = "marvell,pxa168-eth";
reg = <0xb90000 0x10000>;
clocks = <&chip CLKID_GETH1>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
/* set by bootloader */
local-mac-address = [00 00 00 00 00 00];
#address-cells = <1>;
#size-cells = <0>;
phy-connection-type = "mii";
phy-handle = <&ethphy1>;
status = "disabled";
ethphy1: ethernet-phy@0 {
reg = <0>;
};
};
cpu-ctrl@dd0000 {
compatible = "marvell,berlin-cpu-ctrl";
reg = <0xdd0000 0x10000>;
};
eth0: ethernet@e50000 {
compatible = "marvell,pxa168-eth";
reg = <0xe50000 0x10000>;
clocks = <&chip CLKID_GETH0>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
/* set by bootloader */
local-mac-address = [00 00 00 00 00 00];
#address-cells = <1>;
#size-cells = <0>;
phy-connection-type = "mii";
phy-handle = <&ethphy0>;
status = "disabled";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
};
apb@e80000 {
compatible = "simple-bus";
#address-cells = <1>;