drm/i915: Remove PIN_UPDATE for i915_vma_pin
As we no longer use PIN_UPDATE (since commit 7d0aa0db43
("drm/i915/gem:
Unbind all current vma on changing cache-level")) we can remove
PIN_UPDATE itself. The benefit is just in simplifing the vma bind.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200521144949.25357-1-chris@chris-wilson.co.uk
This commit is contained in:
parent
32a4605b38
commit
aedbe0a1af
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@ -1409,147 +1409,6 @@ out:
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return err;
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}
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static int igt_ppgtt_pin_update(void *arg)
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{
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struct i915_gem_context *ctx = arg;
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struct drm_i915_private *dev_priv = ctx->i915;
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unsigned long supported = INTEL_INFO(dev_priv)->page_sizes;
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struct drm_i915_gem_object *obj;
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struct i915_gem_engines_iter it;
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struct i915_address_space *vm;
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struct intel_context *ce;
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struct i915_vma *vma;
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unsigned int flags = PIN_USER | PIN_OFFSET_FIXED;
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unsigned int n;
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int first, last;
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int err = 0;
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/*
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* Make sure there's no funny business when doing a PIN_UPDATE -- in the
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* past we had a subtle issue with being able to incorrectly do multiple
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* alloc va ranges on the same object when doing a PIN_UPDATE, which
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* resulted in some pretty nasty bugs, though only when using
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* huge-gtt-pages.
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*/
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vm = i915_gem_context_get_vm_rcu(ctx);
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if (!i915_vm_is_4lvl(vm)) {
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pr_info("48b PPGTT not supported, skipping\n");
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goto out_vm;
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}
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first = ilog2(I915_GTT_PAGE_SIZE_64K);
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last = ilog2(I915_GTT_PAGE_SIZE_2M);
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for_each_set_bit_from(first, &supported, last + 1) {
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unsigned int page_size = BIT(first);
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obj = i915_gem_object_create_internal(dev_priv, page_size);
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if (IS_ERR(obj)) {
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err = PTR_ERR(obj);
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goto out_vm;
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}
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vma = i915_vma_instance(obj, vm, NULL);
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if (IS_ERR(vma)) {
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err = PTR_ERR(vma);
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goto out_put;
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}
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err = i915_vma_pin(vma, SZ_2M, 0, flags);
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if (err)
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goto out_put;
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if (vma->page_sizes.sg < page_size) {
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pr_info("Unable to allocate page-size %x, finishing test early\n",
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page_size);
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goto out_unpin;
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}
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err = igt_check_page_sizes(vma);
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if (err)
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goto out_unpin;
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if (vma->page_sizes.gtt != page_size) {
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dma_addr_t addr = i915_gem_object_get_dma_address(obj, 0);
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/*
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* The only valid reason for this to ever fail would be
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* if the dma-mapper screwed us over when we did the
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* dma_map_sg(), since it has the final say over the dma
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* address.
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*/
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if (IS_ALIGNED(addr, page_size)) {
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pr_err("page_sizes.gtt=%u, expected=%u\n",
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vma->page_sizes.gtt, page_size);
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err = -EINVAL;
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} else {
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pr_info("dma address misaligned, finishing test early\n");
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}
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goto out_unpin;
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}
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err = i915_vma_bind(vma, I915_CACHE_NONE, PIN_UPDATE, NULL);
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if (err)
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goto out_unpin;
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i915_vma_unpin(vma);
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i915_gem_object_put(obj);
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}
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obj = i915_gem_object_create_internal(dev_priv, PAGE_SIZE);
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if (IS_ERR(obj)) {
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err = PTR_ERR(obj);
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goto out_vm;
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}
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vma = i915_vma_instance(obj, vm, NULL);
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if (IS_ERR(vma)) {
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err = PTR_ERR(vma);
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goto out_put;
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}
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err = i915_vma_pin(vma, 0, 0, flags);
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if (err)
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goto out_put;
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/*
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* Make sure we don't end up with something like where the pde is still
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* pointing to the 2M page, and the pt we just filled-in is dangling --
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* we can check this by writing to the first page where it would then
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* land in the now stale 2M page.
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*/
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n = 0;
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for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
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if (!intel_engine_can_store_dword(ce->engine))
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continue;
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err = gpu_write(ce, vma, n++, 0xdeadbeaf);
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if (err)
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break;
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}
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i915_gem_context_unlock_engines(ctx);
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if (err)
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goto out_unpin;
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while (n--) {
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err = cpu_check(obj, n, 0xdeadbeaf);
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if (err)
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goto out_unpin;
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}
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out_unpin:
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i915_vma_unpin(vma);
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out_put:
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i915_gem_object_put(obj);
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out_vm:
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i915_vm_put(vm);
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return err;
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}
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static int igt_tmpfs_fallback(void *arg)
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{
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struct i915_gem_context *ctx = arg;
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@ -1760,7 +1619,6 @@ int i915_gem_huge_page_live_selftests(struct drm_i915_private *i915)
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{
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static const struct i915_subtest tests[] = {
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SUBTEST(igt_shrink_thp),
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SUBTEST(igt_ppgtt_pin_update),
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SUBTEST(igt_tmpfs_fallback),
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SUBTEST(igt_ppgtt_smoke_huge),
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SUBTEST(igt_ppgtt_sanity_check),
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@ -42,7 +42,6 @@ int i915_gem_gtt_insert(struct i915_address_space *vm,
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#define PIN_OFFSET_BIAS BIT_ULL(6)
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#define PIN_OFFSET_FIXED BIT_ULL(7)
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#define PIN_UPDATE BIT_ULL(9)
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#define PIN_GLOBAL BIT_ULL(10) /* I915_VMA_GLOBAL_BIND */
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#define PIN_USER BIT_ULL(11) /* I915_VMA_LOCAL_BIND */
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@ -397,17 +397,15 @@ int i915_vma_bind(struct i915_vma *vma,
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vma_flags = atomic_read(&vma->flags);
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vma_flags &= I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND;
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if (flags & PIN_UPDATE)
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bind_flags |= vma_flags;
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else
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bind_flags &= ~vma_flags;
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bind_flags &= ~vma_flags;
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if (bind_flags == 0)
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return 0;
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GEM_BUG_ON(!vma->pages);
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trace_i915_vma_bind(vma, bind_flags);
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if (work && (bind_flags & ~vma_flags) & vma->vm->bind_async_flags) {
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if (work && bind_flags & vma->vm->bind_async_flags) {
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struct dma_fence *prev;
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work->vma = vma;
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@ -868,7 +866,6 @@ int i915_vma_pin(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
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BUILD_BUG_ON(PIN_GLOBAL != I915_VMA_GLOBAL_BIND);
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BUILD_BUG_ON(PIN_USER != I915_VMA_LOCAL_BIND);
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GEM_BUG_ON(flags & PIN_UPDATE);
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GEM_BUG_ON(!(flags & (PIN_USER | PIN_GLOBAL)));
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/* First try and grab the pin without rebinding the vma */
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