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MLK-24008 PCI: imx: refine the codes to do compliance tests 

- Don't limit to only PCIe GEN1 when do the compliance tests.
- Configure the TX drive level of iMX865 PHY, adjust the peak output
voltage to pass the PCIe GEN1 compliance tests.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
5.4-rM2-2.2.x-imx-squashed
Richard Zhu 2020-05-08 14:09:02 +08:00
parent 0735da29ed
commit af235be442
2 changed files with 9 additions and 4 deletions
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10
drivers/pci/controller/dwc/pci-imx6.c
View File

@ -1767,10 +1767,12 @@ static int imx6_pcie_establish_link(struct imx6_pcie *imx6_pcie)
* started in Gen2 mode, there is a possibility the devices on the
* bus will not be detected at all. This happens with PCIe switches.
*/
tmp = dw_pcie_readl_dbi(pci, PCIE_RC_LCR);
tmp &= ~PCIE_RC_LCR_MAX_LINK_SPEEDS_MASK;
tmp |= PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN1;
dw_pcie_writel_dbi(pci, PCIE_RC_LCR, tmp);
if (!IS_ENABLED(CONFIG_PCI_IMX6_COMPLIANCE_TEST)) {
tmp = dw_pcie_readl_dbi(pci, PCIE_RC_LCR);
tmp &= ~PCIE_RC_LCR_MAX_LINK_SPEEDS_MASK;
tmp |= PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN1;
dw_pcie_writel_dbi(pci, PCIE_RC_LCR, tmp);
}
/* Start LTSSM. */
imx6_pcie_ltssm_enable(dev);

3
drivers/phy/freescale/phy-fsl-imx8-pcie.c
View File

@ -58,6 +58,9 @@ static int imx8_pcie_phy_init(struct phy *phy)
writel(0x4, imx8_phy->base + 0x73c);
writel(0x4, imx8_phy->base + 0x6ec);
/* Configure TX drive level */
writel(0x2d, imx8_phy->base + 0x404);
return 0;
}