[media] ts2020: re-implement PLL calculations
Used frequency synthesizer is simple Integer-N PLL, with configurable reference divider, output divider and of course N itself. Old calculations were working fine, but not so easy to understand. Signed-off-by: Antti Palosaari <crope@iki.fi> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
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@ -32,8 +32,8 @@ struct ts2020_priv {
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struct i2c_adapter *i2c;
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u8 clk_out:2;
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u8 clk_out_div:5;
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u32 frequency;
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u32 frequency_div;
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u32 frequency_div; /* LO output divider switch frequency */
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u32 frequency_khz; /* actual used LO frequency */
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#define TS2020_M88TS2020 0
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#define TS2020_M88TS2022 1
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u8 tuner;
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@ -233,45 +233,62 @@ static int ts2020_set_params(struct dvb_frontend *fe)
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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struct ts2020_priv *priv = fe->tuner_priv;
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int ret;
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u32 frequency = c->frequency;
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s32 offset_khz;
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u32 symbol_rate = (c->symbol_rate / 1000);
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u32 f3db, gdiv28;
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u16 value, ndiv, lpf_coeff;
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u8 lpf_mxdiv, mlpf_max, mlpf_min, nlpf;
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u8 lo = 0x01, div4 = 0x0;
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u16 u16tmp, value, lpf_coeff;
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u8 buf[3], reg10, lpf_mxdiv, mlpf_max, mlpf_min, nlpf;
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unsigned int f_ref_khz, f_vco_khz, div_ref, div_out, pll_n;
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unsigned int frequency_khz = c->frequency;
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/* Calculate frequency divider */
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if (frequency < priv->frequency_div) {
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lo |= 0x10;
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div4 = 0x1;
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ndiv = (frequency * 14 * 4) / TS2020_XTAL_FREQ;
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} else
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ndiv = (frequency * 14 * 2) / TS2020_XTAL_FREQ;
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ndiv = ndiv + ndiv % 2;
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ndiv = ndiv - 1024;
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/*
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* Integer-N PLL synthesizer
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* kHz is used for all calculations to keep calculations within 32-bit
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*/
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f_ref_khz = TS2020_XTAL_FREQ;
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div_ref = DIV_ROUND_CLOSEST(f_ref_khz, 2000);
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/* select LO output divider */
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if (frequency_khz < priv->frequency_div) {
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div_out = 4;
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reg10 = 0x10;
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} else {
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div_out = 2;
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reg10 = 0x00;
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}
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f_vco_khz = frequency_khz * div_out;
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pll_n = f_vco_khz * div_ref / f_ref_khz;
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pll_n += pll_n % 2;
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priv->frequency_khz = pll_n * f_ref_khz / div_ref / div_out;
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pr_debug("frequency=%u offset=%d f_vco_khz=%u pll_n=%u div_ref=%u div_out=%u\n",
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priv->frequency_khz, priv->frequency_khz - c->frequency,
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f_vco_khz, pll_n, div_ref, div_out);
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if (priv->tuner == TS2020_M88TS2020) {
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lpf_coeff = 2766;
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ret = ts2020_writereg(fe, 0x10, 0x80 | lo);
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reg10 |= 0x01;
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ret = ts2020_writereg(fe, 0x10, reg10);
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} else {
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lpf_coeff = 3200;
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ret = ts2020_writereg(fe, 0x10, 0x0b);
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reg10 |= 0x0b;
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ret = ts2020_writereg(fe, 0x10, reg10);
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ret |= ts2020_writereg(fe, 0x11, 0x40);
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}
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/* Set frequency divider */
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ret |= ts2020_writereg(fe, 0x01, (ndiv >> 8) & 0xf);
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ret |= ts2020_writereg(fe, 0x02, ndiv & 0xff);
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u16tmp = pll_n - 1024;
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buf[0] = (u16tmp >> 8) & 0xff;
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buf[1] = (u16tmp >> 0) & 0xff;
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buf[2] = div_ref - 8;
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ret |= ts2020_writereg(fe, 0x01, buf[0]);
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ret |= ts2020_writereg(fe, 0x02, buf[1]);
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ret |= ts2020_writereg(fe, 0x03, buf[2]);
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ret |= ts2020_writereg(fe, 0x03, 0x06);
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ret |= ts2020_tuner_gate_ctrl(fe, 0x10);
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if (ret < 0)
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return -ENODEV;
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/* Tuner Frequency Range */
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ret = ts2020_writereg(fe, 0x10, lo);
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ret |= ts2020_tuner_gate_ctrl(fe, 0x08);
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/* Tuner RF */
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@ -335,11 +352,6 @@ static int ts2020_set_params(struct dvb_frontend *fe)
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ret |= ts2020_tuner_gate_ctrl(fe, 0x01);
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msleep(80);
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/* calculate offset assuming 96000kHz*/
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offset_khz = (ndiv - ndiv % 2 + 1024) * TS2020_XTAL_FREQ
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/ (6 + 8) / (div4 + 1) / 2;
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priv->frequency = offset_khz;
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return (ret < 0) ? -EINVAL : 0;
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}
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@ -347,8 +359,8 @@ static int ts2020_set_params(struct dvb_frontend *fe)
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static int ts2020_get_frequency(struct dvb_frontend *fe, u32 *frequency)
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{
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struct ts2020_priv *priv = fe->tuner_priv;
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*frequency = priv->frequency;
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*frequency = priv->frequency_khz;
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return 0;
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}
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