PCI/ASPM: Add L1 PM substate support to pci_disable_link_state()
Add support for disabling states L1.1 and L1.2 to pci_disable_link_state(). Allow separate control of ASPM and PCI PM L1 substates. Link: https://lore.kernel.org/r/d81f8036-c236-6463-48e7-ebcdcda85bba@gmail.com Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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@ -1094,7 +1094,16 @@ static int __pci_disable_link_state(struct pci_dev *pdev, int state, bool sem)
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if (state & PCIE_LINK_STATE_L0S)
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link->aspm_disable |= ASPM_STATE_L0S;
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if (state & PCIE_LINK_STATE_L1)
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link->aspm_disable |= ASPM_STATE_L1;
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/* L1 PM substates require L1 */
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link->aspm_disable |= ASPM_STATE_L1 | ASPM_STATE_L1SS;
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if (state & PCIE_LINK_STATE_L1_1)
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link->aspm_disable |= ASPM_STATE_L1_1;
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if (state & PCIE_LINK_STATE_L1_2)
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link->aspm_disable |= ASPM_STATE_L1_2;
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if (state & PCIE_LINK_STATE_L1_1_PCIPM)
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link->aspm_disable |= ASPM_STATE_L1_1_PCIPM;
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if (state & PCIE_LINK_STATE_L1_2_PCIPM)
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link->aspm_disable |= ASPM_STATE_L1_2_PCIPM;
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pcie_config_aspm_link(link, policy_to_aspm_state(link));
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if (state & PCIE_LINK_STATE_CLKPM) {
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@ -1544,9 +1544,13 @@ extern bool pcie_ports_native;
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#define pcie_ports_native false
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#endif
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#define PCIE_LINK_STATE_L0S 1
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#define PCIE_LINK_STATE_L1 2
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#define PCIE_LINK_STATE_CLKPM 4
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#define PCIE_LINK_STATE_L0S BIT(0)
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#define PCIE_LINK_STATE_L1 BIT(1)
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#define PCIE_LINK_STATE_CLKPM BIT(2)
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#define PCIE_LINK_STATE_L1_1 BIT(3)
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#define PCIE_LINK_STATE_L1_2 BIT(4)
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#define PCIE_LINK_STATE_L1_1_PCIPM BIT(5)
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#define PCIE_LINK_STATE_L1_2_PCIPM BIT(6)
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#ifdef CONFIG_PCIEASPM
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int pci_disable_link_state(struct pci_dev *pdev, int state);
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