drm/i915: Fix typo for wrong LVDS clock setting on IGDNG
New register for PCH LVDS on IGDNG should be used. This is a copy-n-paste typo. This fixes possible dual channel LVDS panel failure on IGDNG. Cc: Stable Team <stable@kernel.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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@ -877,7 +877,7 @@ intel_igdng_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
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refclk, best_clock);
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if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
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if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) ==
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if ((I915_READ(PCH_LVDS) & LVDS_CLKB_POWER_MASK) ==
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LVDS_CLKB_POWER_UP)
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clock.p2 = limit->p2.p2_fast;
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else
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