watchdog: pic32-dmt: Add PIC32 deadman timer driver
Adds support for the deadman timer peripheral found on PIC32 class devices. The primary function of the deadman timer (DMT) is to reset the processor in the event of a software malfunction. The DMT is a free-running instruction fetch timer, which is clocked whenever an instruction fetch occurs until a count match occurs. Instructions are not fetched when the processor is in sleep mode. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Wim Van Sebroeck <wim@iguana.be> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-watchdog@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12703/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>hifive-unleashed-5.1
Purna Chandra Mandal
Ralf Baechle
parent
bfa43267bc
commit
b0d8a082ce
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@ -1488,6 +1488,19 @@ config PIC32_WDT
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To compile this driver as a loadable module, choose M here.
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The module will be called pic32-wdt.
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config PIC32_DMT
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tristate "Microchip PIC32 Deadman Timer"
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select WATCHDOG_CORE
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depends on MACH_PIC32
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help
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Watchdog driver for PIC32 instruction fetch counting timer. This specific
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timer is typically be used in misson critical and safety critical
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applications, where any single failure of the software functionality
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and sequencing must be detected.
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To compile this driver as a loadable module, choose M here.
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The module will be called pic32-dmt.
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# PARISC Architecture
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# POWERPC Architecture
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@ -158,6 +158,7 @@ obj-$(CONFIG_RALINK_WDT) += rt2880_wdt.o
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obj-$(CONFIG_IMGPDC_WDT) += imgpdc_wdt.o
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obj-$(CONFIG_MT7621_WDT) += mt7621_wdt.o
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obj-$(CONFIG_PIC32_WDT) += pic32-wdt.o
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obj-$(CONFIG_PIC32_DMT) += pic32-dmt.o
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# PARISC Architecture
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@ -0,0 +1,257 @@
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/*
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* PIC32 deadman timer driver
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*
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* Purna Chandra Mandal <purna.mandal@microchip.com>
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* Copyright (c) 2016, Microchip Technology Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/watchdog.h>
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#include <asm/mach-pic32/pic32.h>
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/* Deadman Timer Regs */
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#define DMTCON_REG 0x00
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#define DMTPRECLR_REG 0x10
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#define DMTCLR_REG 0x20
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#define DMTSTAT_REG 0x30
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#define DMTCNT_REG 0x40
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#define DMTPSCNT_REG 0x60
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#define DMTPSINTV_REG 0x70
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/* Deadman Timer Regs fields */
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#define DMT_ON BIT(15)
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#define DMT_STEP1_KEY BIT(6)
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#define DMT_STEP2_KEY BIT(3)
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#define DMTSTAT_WINOPN BIT(0)
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#define DMTSTAT_EVENT BIT(5)
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#define DMTSTAT_BAD2 BIT(6)
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#define DMTSTAT_BAD1 BIT(7)
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/* Reset Control Register fields for watchdog */
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#define RESETCON_DMT_TIMEOUT BIT(5)
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struct pic32_dmt {
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void __iomem *regs;
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struct clk *clk;
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};
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static inline void dmt_enable(struct pic32_dmt *dmt)
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{
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writel(DMT_ON, PIC32_SET(dmt->regs + DMTCON_REG));
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}
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static inline void dmt_disable(struct pic32_dmt *dmt)
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{
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writel(DMT_ON, PIC32_CLR(dmt->regs + DMTCON_REG));
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/*
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* Cannot touch registers in the CPU cycle following clearing the
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* ON bit.
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*/
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nop();
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}
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static inline int dmt_bad_status(struct pic32_dmt *dmt)
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{
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u32 val;
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val = readl(dmt->regs + DMTSTAT_REG);
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val &= (DMTSTAT_BAD1 | DMTSTAT_BAD2 | DMTSTAT_EVENT);
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if (val)
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return -EAGAIN;
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return 0;
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}
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static inline int dmt_keepalive(struct pic32_dmt *dmt)
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{
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u32 v;
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u32 timeout = 500;
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/* set pre-clear key */
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writel(DMT_STEP1_KEY << 8, dmt->regs + DMTPRECLR_REG);
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/* wait for DMT window to open */
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while (--timeout) {
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v = readl(dmt->regs + DMTSTAT_REG) & DMTSTAT_WINOPN;
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if (v == DMTSTAT_WINOPN)
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break;
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}
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/* apply key2 */
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writel(DMT_STEP2_KEY, dmt->regs + DMTCLR_REG);
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/* check whether keys are latched correctly */
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return dmt_bad_status(dmt);
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}
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static inline u32 pic32_dmt_get_timeout_secs(struct pic32_dmt *dmt)
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{
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unsigned long rate;
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rate = clk_get_rate(dmt->clk);
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if (rate)
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return readl(dmt->regs + DMTPSCNT_REG) / rate;
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return 0;
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}
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static inline u32 pic32_dmt_bootstatus(struct pic32_dmt *dmt)
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{
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u32 v;
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void __iomem *rst_base;
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rst_base = ioremap(PIC32_BASE_RESET, 0x10);
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if (!rst_base)
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return 0;
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v = readl(rst_base);
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writel(RESETCON_DMT_TIMEOUT, PIC32_CLR(rst_base));
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iounmap(rst_base);
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return v & RESETCON_DMT_TIMEOUT;
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}
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static int pic32_dmt_start(struct watchdog_device *wdd)
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{
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struct pic32_dmt *dmt = watchdog_get_drvdata(wdd);
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dmt_enable(dmt);
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return dmt_keepalive(dmt);
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}
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static int pic32_dmt_stop(struct watchdog_device *wdd)
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{
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struct pic32_dmt *dmt = watchdog_get_drvdata(wdd);
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dmt_disable(dmt);
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return 0;
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}
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static int pic32_dmt_ping(struct watchdog_device *wdd)
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{
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struct pic32_dmt *dmt = watchdog_get_drvdata(wdd);
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return dmt_keepalive(dmt);
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}
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static const struct watchdog_ops pic32_dmt_fops = {
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.owner = THIS_MODULE,
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.start = pic32_dmt_start,
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.stop = pic32_dmt_stop,
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.ping = pic32_dmt_ping,
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};
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static const struct watchdog_info pic32_dmt_ident = {
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.options = WDIOF_KEEPALIVEPING |
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WDIOF_MAGICCLOSE,
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.identity = "PIC32 Deadman Timer",
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};
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static struct watchdog_device pic32_dmt_wdd = {
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.info = &pic32_dmt_ident,
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.ops = &pic32_dmt_fops,
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};
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static int pic32_dmt_probe(struct platform_device *pdev)
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{
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int ret;
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struct pic32_dmt *dmt;
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struct resource *mem;
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struct watchdog_device *wdd = &pic32_dmt_wdd;
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dmt = devm_kzalloc(&pdev->dev, sizeof(*dmt), GFP_KERNEL);
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if (IS_ERR(dmt))
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return PTR_ERR(dmt);
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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dmt->regs = devm_ioremap_resource(&pdev->dev, mem);
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if (IS_ERR(dmt->regs))
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return PTR_ERR(dmt->regs);
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dmt->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(dmt->clk)) {
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dev_err(&pdev->dev, "clk not found\n");
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return PTR_ERR(dmt->clk);
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}
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ret = clk_prepare_enable(dmt->clk);
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if (ret)
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return ret;
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wdd->timeout = pic32_dmt_get_timeout_secs(dmt);
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if (!wdd->timeout) {
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dev_err(&pdev->dev,
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"failed to read watchdog register timeout\n");
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ret = -EINVAL;
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goto out_disable_clk;
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}
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dev_info(&pdev->dev, "timeout %d\n", wdd->timeout);
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wdd->bootstatus = pic32_dmt_bootstatus(dmt) ? WDIOF_CARDRESET : 0;
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watchdog_set_nowayout(wdd, WATCHDOG_NOWAYOUT);
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watchdog_set_drvdata(wdd, dmt);
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ret = watchdog_register_device(wdd);
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if (ret) {
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dev_err(&pdev->dev, "watchdog register failed, err %d\n", ret);
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goto out_disable_clk;
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}
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platform_set_drvdata(pdev, wdd);
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return 0;
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out_disable_clk:
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clk_disable_unprepare(dmt->clk);
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return ret;
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}
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static int pic32_dmt_remove(struct platform_device *pdev)
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{
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struct watchdog_device *wdd = platform_get_drvdata(pdev);
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struct pic32_dmt *dmt = watchdog_get_drvdata(wdd);
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watchdog_unregister_device(wdd);
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clk_disable_unprepare(dmt->clk);
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return 0;
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}
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static const struct of_device_id pic32_dmt_of_ids[] = {
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{ .compatible = "microchip,pic32mzda-dmt",},
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, pic32_dmt_of_ids);
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static struct platform_driver pic32_dmt_driver = {
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.probe = pic32_dmt_probe,
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.remove = pic32_dmt_remove,
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.driver = {
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.name = "pic32-dmt",
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.owner = THIS_MODULE,
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.of_match_table = of_match_ptr(pic32_dmt_of_ids),
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}
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};
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module_platform_driver(pic32_dmt_driver);
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MODULE_AUTHOR("Purna Chandra Mandal <purna.mandal@microchip.com>");
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MODULE_DESCRIPTION("Microchip PIC32 DMT Driver");
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MODULE_LICENSE("GPL");
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