OMAP2430: clock: add MCBSP_CLKS node and clkdev aliases
Add the MCBSP_CLKS clock and the clksel structures needed to support clock framework-based source switching for McBSPs 1-5. Also, add clkdev aliases on the parent clocks for the McBSP source switching code, added in a subsequent patch. Signed-off-by: Paul Walmsley <paul@pwsan.com>
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1bccb345bd
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b115b743c2
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@ -18,6 +18,7 @@
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#include <linux/list.h>
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#include <plat/clkdev_omap.h>
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#include <plat/control.h>
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#include "clock.h"
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#include "clock2xxx.h"
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@ -89,6 +90,12 @@ static struct clk alt_ck = { /* Typical 54M or 48M, may not exist */
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.clkdm_name = "wkup_clkdm",
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};
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/* Optional external clock input for McBSP CLKS */
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static struct clk mcbsp_clks = {
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.name = "mcbsp_clks",
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.ops = &clkops_null,
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};
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/*
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* Analog domain root source clocks
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*/
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@ -1123,14 +1130,34 @@ static struct clk mcbsp1_ick = {
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.recalc = &followparent_recalc,
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};
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static const struct clksel_rate common_mcbsp_96m_rates[] = {
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{ .div = 1, .val = 0, .flags = RATE_IN_24XX },
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{ .div = 0 }
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};
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static const struct clksel_rate common_mcbsp_mcbsp_rates[] = {
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{ .div = 1, .val = 1, .flags = RATE_IN_24XX },
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{ .div = 0 }
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};
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static const struct clksel mcbsp_fck_clksel[] = {
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{ .parent = &func_96m_ck, .rates = common_mcbsp_96m_rates },
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{ .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates },
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{ .parent = NULL }
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};
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static struct clk mcbsp1_fck = {
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.name = "mcbsp1_fck",
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.ops = &clkops_omap2_dflt_wait,
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.parent = &func_96m_ck,
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.init = &omap2_init_clksel_parent,
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.clkdm_name = "core_l4_clkdm",
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.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
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.enable_bit = OMAP24XX_EN_MCBSP1_SHIFT,
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.recalc = &followparent_recalc,
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.clksel_reg = OMAP243X_CTRL_REGADDR(OMAP2_CONTROL_DEVCONF0),
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.clksel_mask = OMAP2_MCBSP1_CLKS_MASK,
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.clksel = mcbsp_fck_clksel,
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.recalc = &omap2_clksel_recalc,
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};
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static struct clk mcbsp2_ick = {
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@ -1147,10 +1174,14 @@ static struct clk mcbsp2_fck = {
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.name = "mcbsp2_fck",
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.ops = &clkops_omap2_dflt_wait,
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.parent = &func_96m_ck,
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.init = &omap2_init_clksel_parent,
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.clkdm_name = "core_l4_clkdm",
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.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
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.enable_bit = OMAP24XX_EN_MCBSP2_SHIFT,
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.recalc = &followparent_recalc,
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.clksel_reg = OMAP243X_CTRL_REGADDR(OMAP2_CONTROL_DEVCONF0),
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.clksel_mask = OMAP2_MCBSP2_CLKS_MASK,
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.clksel = mcbsp_fck_clksel,
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.recalc = &omap2_clksel_recalc,
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};
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static struct clk mcbsp3_ick = {
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@ -1167,10 +1198,14 @@ static struct clk mcbsp3_fck = {
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.name = "mcbsp3_fck",
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.ops = &clkops_omap2_dflt_wait,
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.parent = &func_96m_ck,
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.init = &omap2_init_clksel_parent,
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.clkdm_name = "core_l4_clkdm",
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.enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
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.enable_bit = OMAP2430_EN_MCBSP3_SHIFT,
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.recalc = &followparent_recalc,
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.clksel_reg = OMAP243X_CTRL_REGADDR(OMAP243X_CONTROL_DEVCONF1),
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.clksel_mask = OMAP2_MCBSP3_CLKS_MASK,
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.clksel = mcbsp_fck_clksel,
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.recalc = &omap2_clksel_recalc,
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};
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static struct clk mcbsp4_ick = {
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@ -1187,10 +1222,14 @@ static struct clk mcbsp4_fck = {
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.name = "mcbsp4_fck",
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.ops = &clkops_omap2_dflt_wait,
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.parent = &func_96m_ck,
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.init = &omap2_init_clksel_parent,
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.clkdm_name = "core_l4_clkdm",
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.enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
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.enable_bit = OMAP2430_EN_MCBSP4_SHIFT,
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.recalc = &followparent_recalc,
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.clksel_reg = OMAP243X_CTRL_REGADDR(OMAP243X_CONTROL_DEVCONF1),
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.clksel_mask = OMAP2_MCBSP4_CLKS_MASK,
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.clksel = mcbsp_fck_clksel,
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.recalc = &omap2_clksel_recalc,
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};
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static struct clk mcbsp5_ick = {
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@ -1207,10 +1246,14 @@ static struct clk mcbsp5_fck = {
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.name = "mcbsp5_fck",
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.ops = &clkops_omap2_dflt_wait,
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.parent = &func_96m_ck,
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.init = &omap2_init_clksel_parent,
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.clkdm_name = "core_l4_clkdm",
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.enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
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.enable_bit = OMAP2430_EN_MCBSP5_SHIFT,
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.recalc = &followparent_recalc,
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.clksel_reg = OMAP243X_CTRL_REGADDR(OMAP243X_CONTROL_DEVCONF1),
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.clksel_mask = OMAP2_MCBSP5_CLKS_MASK,
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.clksel = mcbsp_fck_clksel,
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.recalc = &omap2_clksel_recalc,
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};
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static struct clk mcspi1_ick = {
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@ -1808,6 +1851,12 @@ static struct omap_clk omap2430_clks[] = {
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CLK(NULL, "osc_ck", &osc_ck, CK_243X),
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CLK(NULL, "sys_ck", &sys_ck, CK_243X),
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CLK(NULL, "alt_ck", &alt_ck, CK_243X),
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CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_243X),
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CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_243X),
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CLK("omap-mcbsp.3", "pad_fck", &mcbsp_clks, CK_243X),
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CLK("omap-mcbsp.4", "pad_fck", &mcbsp_clks, CK_243X),
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CLK("omap-mcbsp.5", "pad_fck", &mcbsp_clks, CK_243X),
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CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_243X),
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/* internal analog sources */
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CLK(NULL, "dpll_ck", &dpll_ck, CK_243X),
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CLK(NULL, "apll96_ck", &apll96_ck, CK_243X),
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@ -1815,6 +1864,11 @@ static struct omap_clk omap2430_clks[] = {
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/* internal prcm root sources */
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CLK(NULL, "func_54m_ck", &func_54m_ck, CK_243X),
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CLK(NULL, "core_ck", &core_ck, CK_243X),
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CLK("omap-mcbsp.1", "prcm_fck", &func_96m_ck, CK_243X),
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CLK("omap-mcbsp.2", "prcm_fck", &func_96m_ck, CK_243X),
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CLK("omap-mcbsp.3", "prcm_fck", &func_96m_ck, CK_243X),
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CLK("omap-mcbsp.4", "prcm_fck", &func_96m_ck, CK_243X),
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CLK("omap-mcbsp.5", "prcm_fck", &func_96m_ck, CK_243X),
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CLK(NULL, "func_96m_ck", &func_96m_ck, CK_243X),
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CLK(NULL, "func_48m_ck", &func_48m_ck, CK_243X),
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CLK(NULL, "func_12m_ck", &func_12m_ck, CK_243X),
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