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drm/amdgpu: Use dpm_enabled as dpm state flag

driver will set dpm_enabled to true only when
module parameter amdgpu_dpm not equal to 0 and
smu hw initialize successfully.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
hifive-unleashed-5.1
Rex Zhu 2018-03-26 16:18:34 +08:00 committed by Alex Deucher
parent 64f6db77fc
commit b13aa1091f
7 changed files with 9 additions and 8 deletions

View File

@ -428,7 +428,7 @@ static ssize_t amdgpu_debugfs_sensor_read(struct file *f, char __user *buf,
if (size & 3 || *pos & 0x3)
return -EINVAL;
if (amdgpu_dpm == 0)
if (!adev->pm.dpm_enabled)
return -EINVAL;
/* convert offset to sensor number */

View File

@ -704,7 +704,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
struct pp_gpu_power query = {0};
int query_size = sizeof(query);
if (amdgpu_dpm == 0)
if (!adev->pm.dpm_enabled)
return -ENOENT;
switch (info->sensor_info.type) {

View File

@ -6255,7 +6255,7 @@ static int ci_dpm_late_init(void *handle)
int ret;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
if (!amdgpu_dpm)
if (!adev->pm.dpm_enabled)
return 0;
/* init the sysfs and debugfs files late */

View File

@ -2974,7 +2974,7 @@ static int kv_dpm_late_init(void *handle)
/* powerdown unused blocks for now */
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
if (!amdgpu_dpm)
if (!adev->pm.dpm_enabled)
return 0;
kv_dpm_powergate_acp(adev, true);

View File

@ -7580,7 +7580,7 @@ static int si_dpm_late_init(void *handle)
int ret;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
if (!amdgpu_dpm)
if (!adev->pm.dpm_enabled)
return 0;
ret = si_set_temperature_range(adev);

View File

@ -688,7 +688,7 @@ static int uvd_v4_2_set_powergating_state(void *handle,
if (state == AMD_PG_STATE_GATE) {
uvd_v4_2_stop(adev);
if (adev->pg_flags & AMD_PG_SUPPORT_UVD && amdgpu_dpm == 0) {
if (adev->pg_flags & AMD_PG_SUPPORT_UVD && !adev->pm.dpm_enabled) {
if (!(RREG32_SMC(ixCURRENT_PG_STATUS) &
CURRENT_PG_STATUS__UVD_PG_STATUS_MASK)) {
WREG32(mmUVD_PGFSM_CONFIG, (UVD_PGFSM_CONFIG__UVD_PGFSM_FSM_ADDR_MASK |
@ -699,7 +699,7 @@ static int uvd_v4_2_set_powergating_state(void *handle,
}
return 0;
} else {
if (adev->pg_flags & AMD_PG_SUPPORT_UVD && amdgpu_dpm == 0) {
if (adev->pg_flags & AMD_PG_SUPPORT_UVD && !adev->pm.dpm_enabled) {
if (RREG32_SMC(ixCURRENT_PG_STATUS) &
CURRENT_PG_STATUS__UVD_PG_STATUS_MASK) {
WREG32(mmUVD_PGFSM_CONFIG, (UVD_PGFSM_CONFIG__UVD_PGFSM_FSM_ADDR_MASK |

View File

@ -211,7 +211,6 @@ int hwmgr_hw_init(struct pp_hwmgr *hwmgr)
!hwmgr->pptable_func->pptable_init ||
!hwmgr->hwmgr_func->backend_init) {
hwmgr->pm_en = false;
((struct amdgpu_device *)hwmgr->adev)->pm.dpm_enabled = false;
pr_info("dpm not supported \n");
return 0;
}
@ -240,6 +239,8 @@ int hwmgr_hw_init(struct pp_hwmgr *hwmgr)
if (ret)
goto err2;
((struct amdgpu_device *)hwmgr->adev)->pm.dpm_enabled = true;
return 0;
err2:
if (hwmgr->hwmgr_func->backend_fini)