Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx
* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: async_tx: checkpatch says s/__FUNCTION__/__func__/g iop-adma.c: replace remaining __FUNCTION__ occurrences fsldma: Add a completed cookie updated action in DMA finish interrupt. fsldma: Add device_prep_dma_interrupt support to fsldma.c dmaengine: Fix a bug about BUG_ON() on DMA engine capability DMA_INTERRUPT. fsldma: Fix fsldma.c warning messages when it's compiled under PPC64.
This commit is contained in:
commit
b1881fb148
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@ -66,11 +66,11 @@ async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset,
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}
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if (tx) {
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pr_debug("%s: (async) len: %zu\n", __FUNCTION__, len);
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pr_debug("%s: (async) len: %zu\n", __func__, len);
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async_tx_submit(chan, tx, flags, depend_tx, cb_fn, cb_param);
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} else {
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void *dest_buf, *src_buf;
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pr_debug("%s: (sync) len: %zu\n", __FUNCTION__, len);
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pr_debug("%s: (sync) len: %zu\n", __func__, len);
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/* wait for any prerequisite operations */
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if (depend_tx) {
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@ -80,7 +80,7 @@ async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset,
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BUG_ON(depend_tx->ack);
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if (dma_wait_for_async_tx(depend_tx) == DMA_ERROR)
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panic("%s: DMA_ERROR waiting for depend_tx\n",
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__FUNCTION__);
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__func__);
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}
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dest_buf = kmap_atomic(dest, KM_USER0) + dest_offset;
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@ -63,11 +63,11 @@ async_memset(struct page *dest, int val, unsigned int offset,
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}
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if (tx) {
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pr_debug("%s: (async) len: %zu\n", __FUNCTION__, len);
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pr_debug("%s: (async) len: %zu\n", __func__, len);
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async_tx_submit(chan, tx, flags, depend_tx, cb_fn, cb_param);
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} else { /* run the memset synchronously */
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void *dest_buf;
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pr_debug("%s: (sync) len: %zu\n", __FUNCTION__, len);
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pr_debug("%s: (sync) len: %zu\n", __func__, len);
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dest_buf = (void *) (((char *) page_address(dest)) + offset);
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@ -79,7 +79,7 @@ async_memset(struct page *dest, int val, unsigned int offset,
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BUG_ON(depend_tx->ack);
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if (dma_wait_for_async_tx(depend_tx) == DMA_ERROR)
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panic("%s: DMA_ERROR waiting for depend_tx\n",
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__FUNCTION__);
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__func__);
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}
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memset(dest_buf, val, len);
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@ -472,11 +472,11 @@ async_trigger_callback(enum async_tx_flags flags,
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tx = NULL;
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if (tx) {
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pr_debug("%s: (async)\n", __FUNCTION__);
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pr_debug("%s: (async)\n", __func__);
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async_tx_submit(chan, tx, flags, depend_tx, cb_fn, cb_param);
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} else {
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pr_debug("%s: (sync)\n", __FUNCTION__);
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pr_debug("%s: (sync)\n", __func__);
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/* wait for any prerequisite operations */
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if (depend_tx) {
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@ -486,7 +486,7 @@ async_trigger_callback(enum async_tx_flags flags,
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BUG_ON(depend_tx->ack);
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if (dma_wait_for_async_tx(depend_tx) == DMA_ERROR)
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panic("%s: DMA_ERROR waiting for depend_tx\n",
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__FUNCTION__);
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__func__);
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}
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async_tx_sync_epilog(flags, depend_tx, cb_fn, cb_param);
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@ -47,7 +47,7 @@ do_async_xor(struct dma_device *device,
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int i;
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unsigned long dma_prep_flags = cb_fn ? DMA_PREP_INTERRUPT : 0;
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pr_debug("%s: len: %zu\n", __FUNCTION__, len);
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pr_debug("%s: len: %zu\n", __func__, len);
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dma_dest = dma_map_page(device->dev, dest, offset, len,
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DMA_FROM_DEVICE);
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@ -86,7 +86,7 @@ do_sync_xor(struct page *dest, struct page **src_list, unsigned int offset,
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void *_dest;
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int i;
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pr_debug("%s: len: %zu\n", __FUNCTION__, len);
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pr_debug("%s: len: %zu\n", __func__, len);
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/* reuse the 'src_list' array to convert to buffer pointers */
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for (i = 0; i < src_cnt; i++)
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@ -196,7 +196,7 @@ async_xor(struct page *dest, struct page **src_list, unsigned int offset,
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DMA_ERROR)
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panic("%s: DMA_ERROR waiting for "
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"depend_tx\n",
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__FUNCTION__);
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__func__);
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}
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do_sync_xor(dest, &src_list[src_off], offset,
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@ -276,7 +276,7 @@ async_xor_zero_sum(struct page *dest, struct page **src_list,
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unsigned long dma_prep_flags = cb_fn ? DMA_PREP_INTERRUPT : 0;
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int i;
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pr_debug("%s: (async) len: %zu\n", __FUNCTION__, len);
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pr_debug("%s: (async) len: %zu\n", __func__, len);
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for (i = 0; i < src_cnt; i++)
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dma_src[i] = dma_map_page(device->dev, src_list[i],
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@ -299,7 +299,7 @@ async_xor_zero_sum(struct page *dest, struct page **src_list,
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} else {
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unsigned long xor_flags = flags;
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pr_debug("%s: (sync) len: %zu\n", __FUNCTION__, len);
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pr_debug("%s: (sync) len: %zu\n", __func__, len);
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xor_flags |= ASYNC_TX_XOR_DROP_DST;
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xor_flags &= ~ASYNC_TX_ACK;
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@ -310,7 +310,7 @@ async_xor_zero_sum(struct page *dest, struct page **src_list,
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if (tx) {
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if (dma_wait_for_async_tx(tx) == DMA_ERROR)
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panic("%s: DMA_ERROR waiting for tx\n",
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__FUNCTION__);
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__func__);
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async_tx_ack(tx);
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}
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@ -357,7 +357,7 @@ int dma_async_device_register(struct dma_device *device)
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!device->device_prep_dma_zero_sum);
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BUG_ON(dma_has_cap(DMA_MEMSET, device->cap_mask) &&
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!device->device_prep_dma_memset);
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BUG_ON(dma_has_cap(DMA_ZERO_SUM, device->cap_mask) &&
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BUG_ON(dma_has_cap(DMA_INTERRUPT, device->cap_mask) &&
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!device->device_prep_dma_interrupt);
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BUG_ON(!device->device_alloc_chan_resources);
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@ -57,12 +57,12 @@ static void dma_init(struct fsl_dma_chan *fsl_chan)
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}
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static void set_sr(struct fsl_dma_chan *fsl_chan, dma_addr_t val)
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static void set_sr(struct fsl_dma_chan *fsl_chan, u32 val)
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{
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DMA_OUT(fsl_chan, &fsl_chan->reg_base->sr, val, 32);
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}
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static dma_addr_t get_sr(struct fsl_dma_chan *fsl_chan)
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static u32 get_sr(struct fsl_dma_chan *fsl_chan)
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{
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return DMA_IN(fsl_chan, &fsl_chan->reg_base->sr, 32);
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}
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@ -406,6 +406,32 @@ static void fsl_dma_free_chan_resources(struct dma_chan *chan)
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dma_pool_destroy(fsl_chan->desc_pool);
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}
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static struct dma_async_tx_descriptor *
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fsl_dma_prep_interrupt(struct dma_chan *chan)
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{
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struct fsl_dma_chan *fsl_chan;
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struct fsl_desc_sw *new;
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if (!chan)
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return NULL;
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fsl_chan = to_fsl_chan(chan);
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new = fsl_dma_alloc_descriptor(fsl_chan);
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if (!new) {
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dev_err(fsl_chan->dev, "No free memory for link descriptor\n");
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return NULL;
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}
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new->async_tx.cookie = -EBUSY;
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new->async_tx.ack = 0;
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/* Set End-of-link to the last link descriptor of new list*/
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set_ld_eol(fsl_chan, new);
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return &new->async_tx;
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}
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static struct dma_async_tx_descriptor *fsl_dma_prep_memcpy(
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struct dma_chan *chan, dma_addr_t dma_dest, dma_addr_t dma_src,
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size_t len, unsigned long flags)
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@ -436,7 +462,7 @@ static struct dma_async_tx_descriptor *fsl_dma_prep_memcpy(
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dev_dbg(fsl_chan->dev, "new link desc alloc %p\n", new);
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#endif
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copy = min(len, FSL_DMA_BCR_MAX_CNT);
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copy = min(len, (size_t)FSL_DMA_BCR_MAX_CNT);
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set_desc_cnt(fsl_chan, &new->hw, copy);
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set_desc_src(fsl_chan, &new->hw, dma_src);
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@ -513,7 +539,6 @@ static void fsl_chan_ld_cleanup(struct fsl_dma_chan *fsl_chan)
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spin_lock_irqsave(&fsl_chan->desc_lock, flags);
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fsl_dma_update_completed_cookie(fsl_chan);
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dev_dbg(fsl_chan->dev, "chan completed_cookie = %d\n",
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fsl_chan->completed_cookie);
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list_for_each_entry_safe(desc, _desc, &fsl_chan->ld_queue, node) {
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@ -581,8 +606,8 @@ static void fsl_chan_xfer_ld_queue(struct fsl_dma_chan *fsl_chan)
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if (ld_node != &fsl_chan->ld_queue) {
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/* Get the ld start address from ld_queue */
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next_dest_addr = to_fsl_desc(ld_node)->async_tx.phys;
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dev_dbg(fsl_chan->dev, "xfer LDs staring from 0x%016llx\n",
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(u64)next_dest_addr);
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dev_dbg(fsl_chan->dev, "xfer LDs staring from %p\n",
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(void *)next_dest_addr);
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set_cdar(fsl_chan, next_dest_addr);
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dma_start(fsl_chan);
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} else {
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@ -662,7 +687,7 @@ static enum dma_status fsl_dma_is_complete(struct dma_chan *chan,
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static irqreturn_t fsl_dma_chan_do_interrupt(int irq, void *data)
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{
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struct fsl_dma_chan *fsl_chan = (struct fsl_dma_chan *)data;
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dma_addr_t stat;
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u32 stat;
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stat = get_sr(fsl_chan);
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dev_dbg(fsl_chan->dev, "event: channel %d, stat = 0x%x\n",
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@ -681,10 +706,10 @@ static irqreturn_t fsl_dma_chan_do_interrupt(int irq, void *data)
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*/
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if (stat & FSL_DMA_SR_EOSI) {
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dev_dbg(fsl_chan->dev, "event: End-of-segments INT\n");
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dev_dbg(fsl_chan->dev, "event: clndar 0x%016llx, "
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"nlndar 0x%016llx\n", (u64)get_cdar(fsl_chan),
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(u64)get_ndar(fsl_chan));
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dev_dbg(fsl_chan->dev, "event: clndar %p, nlndar %p\n",
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(void *)get_cdar(fsl_chan), (void *)get_ndar(fsl_chan));
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stat &= ~FSL_DMA_SR_EOSI;
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fsl_dma_update_completed_cookie(fsl_chan);
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}
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/* If it current transfer is the end-of-transfer,
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@ -726,12 +751,15 @@ static void dma_do_tasklet(unsigned long data)
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fsl_chan_ld_cleanup(fsl_chan);
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}
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#ifdef FSL_DMA_CALLBACKTEST
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static void fsl_dma_callback_test(struct fsl_dma_chan *fsl_chan)
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{
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if (fsl_chan)
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dev_info(fsl_chan->dev, "selftest: callback is ok!\n");
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}
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#endif
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#ifdef CONFIG_FSL_DMA_SELFTEST
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static int fsl_dma_self_test(struct fsl_dma_chan *fsl_chan)
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{
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struct dma_chan *chan;
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@ -837,9 +865,9 @@ static int fsl_dma_self_test(struct fsl_dma_chan *fsl_chan)
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if (err) {
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for (i = 0; (*(src + i) == *(dest + i)) && (i < test_size);
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i++);
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dev_err(fsl_chan->dev, "selftest: Test failed, data %d/%d is "
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dev_err(fsl_chan->dev, "selftest: Test failed, data %d/%ld is "
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"error! src 0x%x, dest 0x%x\n",
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i, test_size, *(src + i), *(dest + i));
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i, (long)test_size, *(src + i), *(dest + i));
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}
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free_resources:
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|
@ -848,6 +876,7 @@ out:
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kfree(src);
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return err;
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}
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#endif
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static int __devinit of_fsl_dma_chan_probe(struct of_device *dev,
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const struct of_device_id *match)
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|
@ -1008,8 +1037,8 @@ static int __devinit of_fsl_dma_probe(struct of_device *dev,
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}
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dev_info(&dev->dev, "Probe the Freescale DMA driver for %s "
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"controller at 0x%08x...\n",
|
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match->compatible, fdev->reg.start);
|
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"controller at %p...\n",
|
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match->compatible, (void *)fdev->reg.start);
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fdev->reg_base = ioremap(fdev->reg.start, fdev->reg.end
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- fdev->reg.start + 1);
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|
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|
@ -1017,6 +1046,7 @@ static int __devinit of_fsl_dma_probe(struct of_device *dev,
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dma_cap_set(DMA_INTERRUPT, fdev->common.cap_mask);
|
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fdev->common.device_alloc_chan_resources = fsl_dma_alloc_chan_resources;
|
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fdev->common.device_free_chan_resources = fsl_dma_free_chan_resources;
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fdev->common.device_prep_dma_interrupt = fsl_dma_prep_interrupt;
|
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fdev->common.device_prep_dma_memcpy = fsl_dma_prep_memcpy;
|
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fdev->common.device_is_tx_complete = fsl_dma_is_complete;
|
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fdev->common.device_issue_pending = fsl_dma_memcpy_issue_pending;
|
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|
|
|
@ -140,7 +140,7 @@ static void __iop_adma_slot_cleanup(struct iop_adma_chan *iop_chan)
|
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int busy = iop_chan_is_busy(iop_chan);
|
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int seen_current = 0, slot_cnt = 0, slots_per_op = 0;
|
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|
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dev_dbg(iop_chan->device->common.dev, "%s\n", __FUNCTION__);
|
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dev_dbg(iop_chan->device->common.dev, "%s\n", __func__);
|
||||
/* free completed slots from the chain starting with
|
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* the oldest descriptor
|
||||
*/
|
||||
|
@ -438,7 +438,7 @@ iop_adma_tx_submit(struct dma_async_tx_descriptor *tx)
|
|||
spin_unlock_bh(&iop_chan->lock);
|
||||
|
||||
dev_dbg(iop_chan->device->common.dev, "%s cookie: %d slot: %d\n",
|
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__FUNCTION__, sw_desc->async_tx.cookie, sw_desc->idx);
|
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__func__, sw_desc->async_tx.cookie, sw_desc->idx);
|
||||
|
||||
return cookie;
|
||||
}
|
||||
|
@ -520,7 +520,7 @@ iop_adma_prep_dma_interrupt(struct dma_chan *chan)
|
|||
struct iop_adma_desc_slot *sw_desc, *grp_start;
|
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int slot_cnt, slots_per_op;
|
||||
|
||||
dev_dbg(iop_chan->device->common.dev, "%s\n", __FUNCTION__);
|
||||
dev_dbg(iop_chan->device->common.dev, "%s\n", __func__);
|
||||
|
||||
spin_lock_bh(&iop_chan->lock);
|
||||
slot_cnt = iop_chan_interrupt_slot_count(&slots_per_op, iop_chan);
|
||||
|
@ -548,7 +548,7 @@ iop_adma_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dma_dest,
|
|||
BUG_ON(unlikely(len > IOP_ADMA_MAX_BYTE_COUNT));
|
||||
|
||||
dev_dbg(iop_chan->device->common.dev, "%s len: %u\n",
|
||||
__FUNCTION__, len);
|
||||
__func__, len);
|
||||
|
||||
spin_lock_bh(&iop_chan->lock);
|
||||
slot_cnt = iop_chan_memcpy_slot_count(len, &slots_per_op);
|
||||
|
@ -580,7 +580,7 @@ iop_adma_prep_dma_memset(struct dma_chan *chan, dma_addr_t dma_dest,
|
|||
BUG_ON(unlikely(len > IOP_ADMA_MAX_BYTE_COUNT));
|
||||
|
||||
dev_dbg(iop_chan->device->common.dev, "%s len: %u\n",
|
||||
__FUNCTION__, len);
|
||||
__func__, len);
|
||||
|
||||
spin_lock_bh(&iop_chan->lock);
|
||||
slot_cnt = iop_chan_memset_slot_count(len, &slots_per_op);
|
||||
|
@ -614,7 +614,7 @@ iop_adma_prep_dma_xor(struct dma_chan *chan, dma_addr_t dma_dest,
|
|||
|
||||
dev_dbg(iop_chan->device->common.dev,
|
||||
"%s src_cnt: %d len: %u flags: %lx\n",
|
||||
__FUNCTION__, src_cnt, len, flags);
|
||||
__func__, src_cnt, len, flags);
|
||||
|
||||
spin_lock_bh(&iop_chan->lock);
|
||||
slot_cnt = iop_chan_xor_slot_count(len, src_cnt, &slots_per_op);
|
||||
|
@ -648,7 +648,7 @@ iop_adma_prep_dma_zero_sum(struct dma_chan *chan, dma_addr_t *dma_src,
|
|||
return NULL;
|
||||
|
||||
dev_dbg(iop_chan->device->common.dev, "%s src_cnt: %d len: %u\n",
|
||||
__FUNCTION__, src_cnt, len);
|
||||
__func__, src_cnt, len);
|
||||
|
||||
spin_lock_bh(&iop_chan->lock);
|
||||
slot_cnt = iop_chan_zero_sum_slot_count(len, src_cnt, &slots_per_op);
|
||||
|
@ -659,7 +659,7 @@ iop_adma_prep_dma_zero_sum(struct dma_chan *chan, dma_addr_t *dma_src,
|
|||
iop_desc_set_zero_sum_byte_count(grp_start, len);
|
||||
grp_start->xor_check_result = result;
|
||||
pr_debug("\t%s: grp_start->xor_check_result: %p\n",
|
||||
__FUNCTION__, grp_start->xor_check_result);
|
||||
__func__, grp_start->xor_check_result);
|
||||
sw_desc->unmap_src_cnt = src_cnt;
|
||||
sw_desc->unmap_len = len;
|
||||
while (src_cnt--)
|
||||
|
@ -700,7 +700,7 @@ static void iop_adma_free_chan_resources(struct dma_chan *chan)
|
|||
iop_chan->last_used = NULL;
|
||||
|
||||
dev_dbg(iop_chan->device->common.dev, "%s slots_allocated %d\n",
|
||||
__FUNCTION__, iop_chan->slots_allocated);
|
||||
__func__, iop_chan->slots_allocated);
|
||||
spin_unlock_bh(&iop_chan->lock);
|
||||
|
||||
/* one is ok since we left it on there on purpose */
|
||||
|
@ -753,7 +753,7 @@ static irqreturn_t iop_adma_eot_handler(int irq, void *data)
|
|||
{
|
||||
struct iop_adma_chan *chan = data;
|
||||
|
||||
dev_dbg(chan->device->common.dev, "%s\n", __FUNCTION__);
|
||||
dev_dbg(chan->device->common.dev, "%s\n", __func__);
|
||||
|
||||
tasklet_schedule(&chan->irq_tasklet);
|
||||
|
||||
|
@ -766,7 +766,7 @@ static irqreturn_t iop_adma_eoc_handler(int irq, void *data)
|
|||
{
|
||||
struct iop_adma_chan *chan = data;
|
||||
|
||||
dev_dbg(chan->device->common.dev, "%s\n", __FUNCTION__);
|
||||
dev_dbg(chan->device->common.dev, "%s\n", __func__);
|
||||
|
||||
tasklet_schedule(&chan->irq_tasklet);
|
||||
|
||||
|
@ -823,7 +823,7 @@ static int __devinit iop_adma_memcpy_self_test(struct iop_adma_device *device)
|
|||
int err = 0;
|
||||
struct iop_adma_chan *iop_chan;
|
||||
|
||||
dev_dbg(device->common.dev, "%s\n", __FUNCTION__);
|
||||
dev_dbg(device->common.dev, "%s\n", __func__);
|
||||
|
||||
src = kzalloc(sizeof(u8) * IOP_ADMA_TEST_SIZE, GFP_KERNEL);
|
||||
if (!src)
|
||||
|
@ -906,7 +906,7 @@ iop_adma_xor_zero_sum_self_test(struct iop_adma_device *device)
|
|||
int err = 0;
|
||||
struct iop_adma_chan *iop_chan;
|
||||
|
||||
dev_dbg(device->common.dev, "%s\n", __FUNCTION__);
|
||||
dev_dbg(device->common.dev, "%s\n", __func__);
|
||||
|
||||
for (src_idx = 0; src_idx < IOP_ADMA_NUM_SRC_TEST; src_idx++) {
|
||||
xor_srcs[src_idx] = alloc_page(GFP_KERNEL);
|
||||
|
@ -1159,7 +1159,7 @@ static int __devinit iop_adma_probe(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
dev_dbg(&pdev->dev, "%s: allocted descriptor pool virt %p phys %p\n",
|
||||
__FUNCTION__, adev->dma_desc_pool_virt,
|
||||
__func__, adev->dma_desc_pool_virt,
|
||||
(void *) adev->dma_desc_pool);
|
||||
|
||||
adev->id = plat_data->hw_id;
|
||||
|
@ -1289,7 +1289,7 @@ static void iop_chan_start_null_memcpy(struct iop_adma_chan *iop_chan)
|
|||
dma_cookie_t cookie;
|
||||
int slot_cnt, slots_per_op;
|
||||
|
||||
dev_dbg(iop_chan->device->common.dev, "%s\n", __FUNCTION__);
|
||||
dev_dbg(iop_chan->device->common.dev, "%s\n", __func__);
|
||||
|
||||
spin_lock_bh(&iop_chan->lock);
|
||||
slot_cnt = iop_chan_memcpy_slot_count(0, &slots_per_op);
|
||||
|
@ -1346,7 +1346,7 @@ static void iop_chan_start_null_xor(struct iop_adma_chan *iop_chan)
|
|||
dma_cookie_t cookie;
|
||||
int slot_cnt, slots_per_op;
|
||||
|
||||
dev_dbg(iop_chan->device->common.dev, "%s\n", __FUNCTION__);
|
||||
dev_dbg(iop_chan->device->common.dev, "%s\n", __func__);
|
||||
|
||||
spin_lock_bh(&iop_chan->lock);
|
||||
slot_cnt = iop_chan_xor_slot_count(0, 2, &slots_per_op);
|
||||
|
|
Loading…
Reference in a new issue