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MLK-15014 dma: fsl-edma-v3: clear DONE before E_SG enabled 

Below described in RM, otherwise, channel error status(CHa_ES)
may be triggered:
The user must clear the CHa_CSR[DONE] bit before writing the
TCDa_CSR[MAJORELINK] or TCDa_CSR[ESG] bits.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
(cherry picked from commit c4164d0a15306174056c6ff423ba2408dd901fcf)
5.4-rM2-2.2.x-imx-squashed
Robin Gong 2017-06-06 16:56:49 +08:00 committed by Dong Aisheng
parent 5dd7504280
commit b1b8c0ae94
1 changed files with 5 additions and 0 deletions
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5
drivers/dma/fsl-edma-v3.c
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@ -421,6 +421,11 @@ static void fsl_edma3_set_tcd_regs(struct fsl_edma3_chan *fsl_chan,
writel(le32_to_cpu(tcd->dlast_sga), addr + EDMA_TCD_DLAST_SGA);
/* Must clear CHa_CSR[DONE] bit before enable TCDa_CSR[ESG] */
if ((EDMA_TCD_CSR_E_SG | le16_to_cpu(tcd->csr)) &&
EDMA_CH_CSR_DONE | readl(addr + EDMA_CH_CSR))
writel(EDMA_CH_CSR_DONE, addr + EDMA_CH_CSR);
writew(le16_to_cpu(tcd->csr), addr + EDMA_TCD_CSR);
}