drm/radeon/kms: check modes against max pixel clock
Filter out modes that are higher than the max pixel clock. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -165,6 +165,7 @@ struct radeon_clock {
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uint32_t default_sclk;
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uint32_t default_dispclk;
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uint32_t dp_extclk;
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uint32_t max_pixel_clock;
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};
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/*
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@ -1246,6 +1246,10 @@ bool radeon_atom_get_clock_info(struct drm_device *dev)
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}
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*dcpll = *p1pll;
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rdev->clock.max_pixel_clock = le16_to_cpu(firmware_info->info.usMaxPixelClock);
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if (rdev->clock.max_pixel_clock == 0)
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rdev->clock.max_pixel_clock = 40000;
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return true;
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}
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@ -117,7 +117,7 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev)
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p1pll->reference_div = RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff;
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if (p1pll->reference_div < 2)
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p1pll->reference_div = 12;
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p2pll->reference_div = p1pll->reference_div;
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p2pll->reference_div = p1pll->reference_div;
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/* These aren't in the device-tree */
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if (rdev->family >= CHIP_R420) {
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@ -139,6 +139,8 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev)
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p2pll->pll_out_min = 12500;
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p2pll->pll_out_max = 35000;
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}
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/* not sure what the max should be in all cases */
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rdev->clock.max_pixel_clock = 35000;
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spll->reference_freq = mpll->reference_freq = p1pll->reference_freq;
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spll->reference_div = mpll->reference_div =
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@ -151,7 +153,7 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev)
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else
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rdev->clock.default_sclk =
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radeon_legacy_get_engine_clock(rdev);
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val = of_get_property(dp, "ATY,MCLK", NULL);
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if (val && *val)
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rdev->clock.default_mclk = (*val) / 10;
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@ -160,7 +162,7 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev)
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radeon_legacy_get_memory_clock(rdev);
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DRM_INFO("Using device-tree clock info\n");
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return true;
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}
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#else
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@ -866,6 +866,11 @@ bool radeon_combios_get_clock_info(struct drm_device *dev)
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rdev->clock.default_sclk = sclk;
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rdev->clock.default_mclk = mclk;
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if (RBIOS32(pll_info + 0x16))
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rdev->clock.max_pixel_clock = RBIOS32(pll_info + 0x16);
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else
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rdev->clock.max_pixel_clock = 35000; /* might need something asic specific */
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return true;
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}
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return false;
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@ -626,8 +626,14 @@ static int radeon_vga_get_modes(struct drm_connector *connector)
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static int radeon_vga_mode_valid(struct drm_connector *connector,
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struct drm_display_mode *mode)
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{
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struct drm_device *dev = connector->dev;
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struct radeon_device *rdev = dev->dev_private;
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/* XXX check mode bandwidth */
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/* XXX verify against max DAC output frequency */
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if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
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return MODE_CLOCK_HIGH;
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return MODE_OK;
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}
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@ -1015,6 +1021,11 @@ static int radeon_dvi_mode_valid(struct drm_connector *connector,
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} else
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return MODE_CLOCK_HIGH;
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}
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/* check against the max pixel clock */
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if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
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return MODE_CLOCK_HIGH;
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return MODE_OK;
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}
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