sched/idle/x86: Restore mwait_idle() to fix boot hangs, to improve power savings and to improve performance
In Linux-3.9 we removed the mwait_idle() loop:69fb3676df
("x86 idle: remove mwait_idle() and "idle=mwait" cmdline param") The reasoning was that modern machines should be sufficiently happy during the boot process using the default_idle() HALT loop, until cpuidle loads and either acpi_idle or intel_idle invoke the newer MWAIT-with-hints idle loop. But two machines reported problems: 1. Certain Core2-era machines support MWAIT-C1 and HALT only. MWAIT-C1 is preferred for optimal power and performance. But if they support just C1, cpuidle never loads and so they use the boot-time default idle loop forever. 2. Some laptops will boot-hang if HALT is used, but will boot successfully if MWAIT is used. This appears to be a hidden assumption in BIOS SMI, that is presumably valid on the proprietary OS where the BIOS was validated. https://bugzilla.kernel.org/show_bug.cgi?id=60770 So here we effectively revert the patch above, restoring the mwait_idle() loop. However, we don't bother restoring the idle=mwait cmdline parameter, since it appears to add no value. Maintainer notes: For 3.9, simply revert69fb3676df
for 3.10, patch -F3 applies, fuzz needed due to __cpuinit use in context For 3.11, 3.12, 3.13, this patch applies cleanly Tested-by: Mike Galbraith <bitbucket@online.de> Signed-off-by: Len Brown <len.brown@intel.com> Acked-by: Mike Galbraith <bitbucket@online.de> Cc: <stable@vger.kernel.org> # 3.9+ Cc: Borislav Petkov <bp@alien8.de> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Ian Malone <ibmalone@gmail.com> Cc: Josh Boyer <jwboyer@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Mike Galbraith <efault@gmx.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/345254a551eb5a6a866e048d7ab570fd2193aca4.1389763084.git.len.brown@intel.com [ Ported to recent kernels. ] Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -30,6 +30,14 @@ static inline void __mwait(unsigned long eax, unsigned long ecx)
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:: "a" (eax), "c" (ecx));
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:: "a" (eax), "c" (ecx));
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}
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}
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static inline void __sti_mwait(unsigned long eax, unsigned long ecx)
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{
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trace_hardirqs_on();
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/* "mwait %eax, %ecx;" */
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asm volatile("sti; .byte 0x0f, 0x01, 0xc9;"
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:: "a" (eax), "c" (ecx));
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}
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/*
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/*
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* This uses new MONITOR/MWAIT instructions on P4 processors with PNI,
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* This uses new MONITOR/MWAIT instructions on P4 processors with PNI,
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* which can obviate IPI to trigger checking of need_resched.
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* which can obviate IPI to trigger checking of need_resched.
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@ -24,6 +24,7 @@
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#include <asm/syscalls.h>
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#include <asm/syscalls.h>
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#include <asm/idle.h>
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#include <asm/idle.h>
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#include <asm/uaccess.h>
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#include <asm/uaccess.h>
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#include <asm/mwait.h>
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#include <asm/i387.h>
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#include <asm/i387.h>
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#include <asm/fpu-internal.h>
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#include <asm/fpu-internal.h>
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#include <asm/debugreg.h>
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#include <asm/debugreg.h>
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@ -398,6 +399,49 @@ static void amd_e400_idle(void)
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default_idle();
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default_idle();
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}
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}
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/*
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* Intel Core2 and older machines prefer MWAIT over HALT for C1.
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* We can't rely on cpuidle installing MWAIT, because it will not load
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* on systems that support only C1 -- so the boot default must be MWAIT.
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*
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* Some AMD machines are the opposite, they depend on using HALT.
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*
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* So for default C1, which is used during boot until cpuidle loads,
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* use MWAIT-C1 on Intel HW that has it, else use HALT.
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*/
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static int prefer_mwait_c1_over_halt(const struct cpuinfo_x86 *c)
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{
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if (c->x86_vendor != X86_VENDOR_INTEL)
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return 0;
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if (!cpu_has(c, X86_FEATURE_MWAIT))
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return 0;
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return 1;
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}
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/*
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* MONITOR/MWAIT with no hints, used for default default C1 state.
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* This invokes MWAIT with interrutps enabled and no flags,
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* which is backwards compatible with the original MWAIT implementation.
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*/
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static void mwait_idle(void)
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{
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if (!need_resched()) {
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if (this_cpu_has(X86_BUG_CLFLUSH_MONITOR))
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clflush((void *)¤t_thread_info()->flags);
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__monitor((void *)¤t_thread_info()->flags, 0, 0);
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smp_mb();
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if (!need_resched())
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__sti_mwait(0, 0);
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else
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local_irq_enable();
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} else
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local_irq_enable();
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}
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void select_idle_routine(const struct cpuinfo_x86 *c)
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void select_idle_routine(const struct cpuinfo_x86 *c)
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{
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{
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#ifdef CONFIG_SMP
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#ifdef CONFIG_SMP
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@ -411,6 +455,9 @@ void select_idle_routine(const struct cpuinfo_x86 *c)
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/* E400: APIC timer interrupt does not wake up CPU from C1e */
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/* E400: APIC timer interrupt does not wake up CPU from C1e */
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pr_info("using AMD E400 aware idle routine\n");
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pr_info("using AMD E400 aware idle routine\n");
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x86_idle = amd_e400_idle;
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x86_idle = amd_e400_idle;
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} else if (prefer_mwait_c1_over_halt(c)) {
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pr_info("using mwait in idle threads\n");
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x86_idle = mwait_idle;
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} else
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} else
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x86_idle = default_idle;
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x86_idle = default_idle;
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}
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}
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