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Merge branch 'omap-fixes' into omap-fixes-for-linus

hifive-unleashed-5.1
Tony Lindgren 2010-01-20 18:21:01 -08:00
parent ccaae273c3 1daa8c1d75
commit b2d959173f
6 changed files with 66 additions and 31 deletions
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2
arch/arm/mach-omap2/gpmc.c
View File

@ -534,6 +534,8 @@ void __init gpmc_init(void)
BUG();
}
clk_enable(gpmc_l3_clk);
l = gpmc_read_reg(GPMC_REVISION);
printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f);
/* Set smart idle mode and automatic L3 clock gating */

41
arch/arm/mach-omap2/id.c
View File

@ -188,6 +188,8 @@ void __init omap3_check_revision(void)
u16 hawkeye;
u8 rev;
omap_chip.oc = CHIP_IS_OMAP3430;
/*
* We cannot access revision registers on ES1.0.
* If the processor type is Cortex-A8 and the revision is 0x0
@ -196,6 +198,7 @@ void __init omap3_check_revision(void)
cpuid = read_cpuid(CPUID_ID);
if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
omap_revision = OMAP3430_REV_ES1_0;
omap_chip.oc |= CHIP_IS_OMAP3430ES1;
return;
}
@ -216,18 +219,28 @@ void __init omap3_check_revision(void)
case 0: /* Take care of early samples */
case 1:
omap_revision = OMAP3430_REV_ES2_0;
omap_chip.oc |= CHIP_IS_OMAP3430ES2;
break;
case 2:
omap_revision = OMAP3430_REV_ES2_1;
omap_chip.oc |= CHIP_IS_OMAP3430ES2;
break;
case 3:
omap_revision = OMAP3430_REV_ES3_0;
omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
break;
case 4:
omap_revision = OMAP3430_REV_ES3_1;
omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
break;
case 7:
/* FALLTHROUGH */
default:
/* Use the latest known revision as default */
omap_revision = OMAP3430_REV_ES3_1;
omap_revision = OMAP3430_REV_ES3_1_2;
/* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */
omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
}
break;
case 0xb868:
@ -235,14 +248,18 @@ void __init omap3_check_revision(void)
*
* Set the device to be OMAP3505 here. Actual device
* is identified later based on the features.
*
* REVISIT: AM3505/AM3517 should have their own CHIP_IS
*/
omap_revision = OMAP3505_REV(rev);
omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
break;
case 0xb891:
/* FALLTHROUGH */
default:
/* Unknown default to latest silicon rev as default*/
omap_revision = OMAP3630_REV_ES1_0;
omap_chip.oc |= CHIP_IS_OMAP3630ES1;
}
}
@ -360,6 +377,7 @@ void __init omap2_check_revision(void)
omap3_check_revision();
omap3_check_features();
omap3_cpuinfo();
return;
} else if (cpu_is_omap44xx()) {
omap4_check_revision();
return;
@ -374,27 +392,14 @@ void __init omap2_check_revision(void)
if (cpu_is_omap243x()) {
/* Currently only supports 2430ES2.1 and 2430-all */
omap_chip.oc |= CHIP_IS_OMAP2430;
return;
} else if (cpu_is_omap242x()) {
/* Currently only supports 2420ES2.1.1 and 2420-all */
omap_chip.oc |= CHIP_IS_OMAP2420;
} else if (cpu_is_omap3505() || cpu_is_omap3517()) {
omap_chip.oc = CHIP_IS_OMAP3430 | CHIP_IS_OMAP3430ES3_1;
} else if (cpu_is_omap343x()) {
omap_chip.oc = CHIP_IS_OMAP3430;
if (omap_rev() == OMAP3430_REV_ES1_0)
omap_chip.oc |= CHIP_IS_OMAP3430ES1;
else if (omap_rev() >= OMAP3430_REV_ES2_0 &&
omap_rev() <= OMAP3430_REV_ES2_1)
omap_chip.oc |= CHIP_IS_OMAP3430ES2;
else if (omap_rev() == OMAP3430_REV_ES3_0)
omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
else if (omap_rev() == OMAP3430_REV_ES3_1)
omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
else if (omap_rev() == OMAP3630_REV_ES1_0)
omap_chip.oc |= CHIP_IS_OMAP3630ES1;
} else {
pr_err("Uninitialized omap_chip, please fix!\n");
return;
}
pr_err("Uninitialized omap_chip, please fix!\n");
}
/*

27
arch/arm/mach-omap2/mux.c
View File

@ -51,7 +51,7 @@ struct omap_mux_entry {
static unsigned long mux_phys;
static void __iomem *mux_base;
static inline u16 omap_mux_read(u16 reg)
u16 omap_mux_read(u16 reg)
{
if (cpu_is_omap24xx())
return __raw_readb(mux_base + reg);
@ -59,7 +59,7 @@ static inline u16 omap_mux_read(u16 reg)
return __raw_readw(mux_base + reg);
}
static inline void omap_mux_write(u16 val, u16 reg)
void omap_mux_write(u16 val, u16 reg)
{
if (cpu_is_omap24xx())
__raw_writeb(val, mux_base + reg);
@ -67,6 +67,14 @@ static inline void omap_mux_write(u16 val, u16 reg)
__raw_writew(val, mux_base + reg);
}
void omap_mux_write_array(struct omap_board_mux *board_mux)
{
while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) {
omap_mux_write(board_mux->value, board_mux->reg_offset);
board_mux++;
}
}
#if defined(CONFIG_ARCH_OMAP24XX) && defined(CONFIG_OMAP_MUX)
static struct omap_mux_cfg arch_mux_cfg;
@ -833,14 +841,6 @@ static void __init omap_mux_set_cmdline_signals(void)
kfree(options);
}
static void __init omap_mux_set_board_signals(struct omap_board_mux *board_mux)
{
while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) {
omap_mux_write(board_mux->value, board_mux->reg_offset);
board_mux++;
}
}
static int __init omap_mux_copy_names(struct omap_mux *src,
struct omap_mux *dst)
{
@ -998,12 +998,15 @@ int __init omap_mux_init(u32 mux_pbase, u32 mux_size,
omap_mux_package_fixup(package_subset, superset);
if (package_balls)
omap_mux_package_init_balls(package_balls, superset);
omap_mux_set_cmdline_signals();
omap_mux_set_board_signals(board_mux);
#endif
omap_mux_init_list(superset);
#ifdef CONFIG_OMAP_MUX
omap_mux_set_cmdline_signals();
omap_mux_write_array(board_mux);
#endif
return 0;
}

24
arch/arm/mach-omap2/mux.h
View File

@ -146,6 +146,30 @@ u16 omap_mux_get_gpio(int gpio);
*/
void omap_mux_set_gpio(u16 val, int gpio);
/**
* omap_mux_read() - read mux register
* @mux_offset: Offset of the mux register
*
*/
u16 omap_mux_read(u16 mux_offset);
/**
* omap_mux_write() - write mux register
* @val: New mux register value
* @mux_offset: Offset of the mux register
*
* This should be only needed for dynamic remuxing of non-gpio signals.
*/
void omap_mux_write(u16 val, u16 mux_offset);
/**
* omap_mux_write_array() - write an array of mux registers
* @board_mux: Array of mux registers terminated by MAP_MUX_TERMINATOR
*
* This should be only needed for dynamic remuxing of non-gpio signals.
*/
void omap_mux_write_array(struct omap_board_mux *board_mux);
/**
* omap3_mux_init() - initialize mux system with board specific set
* @board_mux: Board specific mux table

2
arch/arm/plat-omap/dma.c
View File

@ -1183,7 +1183,7 @@ void omap_dma_unlink_lch(int lch_head, int lch_queue)
}
if ((dma_chan[lch_head].flags & OMAP_DMA_ACTIVE) ||
(dma_chan[lch_head].flags & OMAP_DMA_ACTIVE)) {
(dma_chan[lch_queue].flags & OMAP_DMA_ACTIVE)) {
printk(KERN_ERR "omap_dma: You need to stop the DMA channels "
"before unlinking\n");
dump_stack();

1
arch/arm/plat-omap/include/plat/cpu.h
View File

@ -434,6 +434,7 @@ IS_OMAP_TYPE(3517, 0x3517)
#define OMAP3430_REV_ES2_1 0x34302034
#define OMAP3430_REV_ES3_0 0x34303034
#define OMAP3430_REV_ES3_1 0x34304034
#define OMAP3430_REV_ES3_1_2 0x34305034
#define OMAP3630_REV_ES1_0 0x36300034