Merge branch 'omap-fixes' into omap-fixes-for-linus
This commit is contained in:
commit
b2d959173f
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@ -534,6 +534,8 @@ void __init gpmc_init(void)
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BUG();
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}
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clk_enable(gpmc_l3_clk);
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l = gpmc_read_reg(GPMC_REVISION);
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printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f);
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/* Set smart idle mode and automatic L3 clock gating */
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@ -188,6 +188,8 @@ void __init omap3_check_revision(void)
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u16 hawkeye;
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u8 rev;
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omap_chip.oc = CHIP_IS_OMAP3430;
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/*
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* We cannot access revision registers on ES1.0.
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* If the processor type is Cortex-A8 and the revision is 0x0
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@ -196,6 +198,7 @@ void __init omap3_check_revision(void)
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cpuid = read_cpuid(CPUID_ID);
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if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
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omap_revision = OMAP3430_REV_ES1_0;
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omap_chip.oc |= CHIP_IS_OMAP3430ES1;
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return;
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}
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@ -216,18 +219,28 @@ void __init omap3_check_revision(void)
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case 0: /* Take care of early samples */
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case 1:
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omap_revision = OMAP3430_REV_ES2_0;
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omap_chip.oc |= CHIP_IS_OMAP3430ES2;
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break;
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case 2:
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omap_revision = OMAP3430_REV_ES2_1;
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omap_chip.oc |= CHIP_IS_OMAP3430ES2;
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break;
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case 3:
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omap_revision = OMAP3430_REV_ES3_0;
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omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
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break;
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case 4:
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omap_revision = OMAP3430_REV_ES3_1;
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omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
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break;
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case 7:
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/* FALLTHROUGH */
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default:
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/* Use the latest known revision as default */
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omap_revision = OMAP3430_REV_ES3_1;
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omap_revision = OMAP3430_REV_ES3_1_2;
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/* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */
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omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
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}
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break;
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case 0xb868:
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@ -235,14 +248,18 @@ void __init omap3_check_revision(void)
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*
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* Set the device to be OMAP3505 here. Actual device
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* is identified later based on the features.
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*
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* REVISIT: AM3505/AM3517 should have their own CHIP_IS
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*/
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omap_revision = OMAP3505_REV(rev);
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omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
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break;
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case 0xb891:
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/* FALLTHROUGH */
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default:
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/* Unknown default to latest silicon rev as default*/
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omap_revision = OMAP3630_REV_ES1_0;
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omap_chip.oc |= CHIP_IS_OMAP3630ES1;
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}
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}
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@ -360,6 +377,7 @@ void __init omap2_check_revision(void)
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omap3_check_revision();
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omap3_check_features();
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omap3_cpuinfo();
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return;
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} else if (cpu_is_omap44xx()) {
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omap4_check_revision();
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return;
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@ -374,27 +392,14 @@ void __init omap2_check_revision(void)
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if (cpu_is_omap243x()) {
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/* Currently only supports 2430ES2.1 and 2430-all */
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omap_chip.oc |= CHIP_IS_OMAP2430;
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return;
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} else if (cpu_is_omap242x()) {
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/* Currently only supports 2420ES2.1.1 and 2420-all */
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omap_chip.oc |= CHIP_IS_OMAP2420;
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} else if (cpu_is_omap3505() || cpu_is_omap3517()) {
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omap_chip.oc = CHIP_IS_OMAP3430 | CHIP_IS_OMAP3430ES3_1;
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} else if (cpu_is_omap343x()) {
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omap_chip.oc = CHIP_IS_OMAP3430;
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if (omap_rev() == OMAP3430_REV_ES1_0)
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omap_chip.oc |= CHIP_IS_OMAP3430ES1;
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else if (omap_rev() >= OMAP3430_REV_ES2_0 &&
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omap_rev() <= OMAP3430_REV_ES2_1)
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omap_chip.oc |= CHIP_IS_OMAP3430ES2;
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else if (omap_rev() == OMAP3430_REV_ES3_0)
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omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
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else if (omap_rev() == OMAP3430_REV_ES3_1)
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omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
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else if (omap_rev() == OMAP3630_REV_ES1_0)
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omap_chip.oc |= CHIP_IS_OMAP3630ES1;
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} else {
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pr_err("Uninitialized omap_chip, please fix!\n");
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return;
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}
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pr_err("Uninitialized omap_chip, please fix!\n");
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}
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/*
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@ -51,7 +51,7 @@ struct omap_mux_entry {
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static unsigned long mux_phys;
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static void __iomem *mux_base;
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static inline u16 omap_mux_read(u16 reg)
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u16 omap_mux_read(u16 reg)
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{
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if (cpu_is_omap24xx())
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return __raw_readb(mux_base + reg);
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@ -59,7 +59,7 @@ static inline u16 omap_mux_read(u16 reg)
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return __raw_readw(mux_base + reg);
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}
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static inline void omap_mux_write(u16 val, u16 reg)
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void omap_mux_write(u16 val, u16 reg)
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{
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if (cpu_is_omap24xx())
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__raw_writeb(val, mux_base + reg);
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@ -67,6 +67,14 @@ static inline void omap_mux_write(u16 val, u16 reg)
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__raw_writew(val, mux_base + reg);
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}
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void omap_mux_write_array(struct omap_board_mux *board_mux)
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{
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while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) {
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omap_mux_write(board_mux->value, board_mux->reg_offset);
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board_mux++;
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}
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}
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#if defined(CONFIG_ARCH_OMAP24XX) && defined(CONFIG_OMAP_MUX)
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static struct omap_mux_cfg arch_mux_cfg;
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@ -833,14 +841,6 @@ static void __init omap_mux_set_cmdline_signals(void)
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kfree(options);
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}
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static void __init omap_mux_set_board_signals(struct omap_board_mux *board_mux)
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{
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while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) {
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omap_mux_write(board_mux->value, board_mux->reg_offset);
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board_mux++;
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}
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}
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static int __init omap_mux_copy_names(struct omap_mux *src,
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struct omap_mux *dst)
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{
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@ -998,12 +998,15 @@ int __init omap_mux_init(u32 mux_pbase, u32 mux_size,
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omap_mux_package_fixup(package_subset, superset);
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if (package_balls)
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omap_mux_package_init_balls(package_balls, superset);
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omap_mux_set_cmdline_signals();
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omap_mux_set_board_signals(board_mux);
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#endif
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omap_mux_init_list(superset);
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#ifdef CONFIG_OMAP_MUX
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omap_mux_set_cmdline_signals();
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omap_mux_write_array(board_mux);
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#endif
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return 0;
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}
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@ -146,6 +146,30 @@ u16 omap_mux_get_gpio(int gpio);
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*/
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void omap_mux_set_gpio(u16 val, int gpio);
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/**
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* omap_mux_read() - read mux register
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* @mux_offset: Offset of the mux register
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*
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*/
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u16 omap_mux_read(u16 mux_offset);
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/**
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* omap_mux_write() - write mux register
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* @val: New mux register value
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* @mux_offset: Offset of the mux register
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*
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* This should be only needed for dynamic remuxing of non-gpio signals.
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*/
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void omap_mux_write(u16 val, u16 mux_offset);
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/**
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* omap_mux_write_array() - write an array of mux registers
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* @board_mux: Array of mux registers terminated by MAP_MUX_TERMINATOR
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*
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* This should be only needed for dynamic remuxing of non-gpio signals.
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*/
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void omap_mux_write_array(struct omap_board_mux *board_mux);
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/**
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* omap3_mux_init() - initialize mux system with board specific set
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* @board_mux: Board specific mux table
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@ -1183,7 +1183,7 @@ void omap_dma_unlink_lch(int lch_head, int lch_queue)
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}
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if ((dma_chan[lch_head].flags & OMAP_DMA_ACTIVE) ||
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(dma_chan[lch_head].flags & OMAP_DMA_ACTIVE)) {
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(dma_chan[lch_queue].flags & OMAP_DMA_ACTIVE)) {
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printk(KERN_ERR "omap_dma: You need to stop the DMA channels "
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"before unlinking\n");
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dump_stack();
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@ -434,6 +434,7 @@ IS_OMAP_TYPE(3517, 0x3517)
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#define OMAP3430_REV_ES2_1 0x34302034
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#define OMAP3430_REV_ES3_0 0x34303034
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#define OMAP3430_REV_ES3_1 0x34304034
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#define OMAP3430_REV_ES3_1_2 0x34305034
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#define OMAP3630_REV_ES1_0 0x36300034
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