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media: i2c: ov5640: Separate out mipi configuration from s_power 

[ Upstream commit b1751ae652 ]

In preparation for adding DVP configuration in s_power callback
move mipi configuration into separate function

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Tested-by: Jacopo Mondi <jacopo@jmondi.org>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
5.4-rM2-2.2.x-imx-squashed
Lad Prabhakar 2020-09-04 22:18:31 +02:00 committed by Greg Kroah-Hartman
parent b9ccea5405
commit b2f8546056
1 changed files with 64 additions and 60 deletions
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124
drivers/media/i2c/ov5640.c
View File

@ -2000,6 +2000,61 @@ static void ov5640_set_power_off(struct ov5640_dev *sensor)
clk_disable_unprepare(sensor->xclk);
}
static int ov5640_set_power_mipi(struct ov5640_dev *sensor, bool on)
{
int ret;
if (!on) {
/* Reset MIPI bus settings to their default values. */
ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58);
ov5640_write_reg(sensor, OV5640_REG_MIPI_CTRL00, 0x04);
ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT00, 0x00);
return 0;
}
/*
* Power up MIPI HS Tx and LS Rx; 2 data lanes mode
*
* 0x300e = 0x40
* [7:5] = 010 : 2 data lanes mode (see FIXME note in
* "ov5640_set_stream_mipi()")
* [4] = 0 : Power up MIPI HS Tx
* [3] = 0 : Power up MIPI LS Rx
* [2] = 0 : MIPI interface disabled
*/
ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x40);
if (ret)
return ret;
/*
* Gate clock and set LP11 in 'no packets mode' (idle)
*
* 0x4800 = 0x24
* [5] = 1 : Gate clock when 'no packets'
* [2] = 1 : MIPI bus in LP11 when 'no packets'
*/
ret = ov5640_write_reg(sensor, OV5640_REG_MIPI_CTRL00, 0x24);
if (ret)
return ret;
/*
* Set data lanes and clock in LP11 when 'sleeping'
*
* 0x3019 = 0x70
* [6] = 1 : MIPI data lane 2 in LP11 when 'sleeping'
* [5] = 1 : MIPI data lane 1 in LP11 when 'sleeping'
* [4] = 1 : MIPI clock lane in LP11 when 'sleeping'
*/
ret = ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT00, 0x70);
if (ret)
return ret;
/* Give lanes some time to coax into LP11 state. */
usleep_range(500, 1000);
return 0;
}
static int ov5640_set_power(struct ov5640_dev *sensor, bool on)
{
int ret = 0;
@ -2012,68 +2067,17 @@ static int ov5640_set_power(struct ov5640_dev *sensor, bool on)
ret = ov5640_restore_mode(sensor);
if (ret)
goto power_off;
/* We're done here for DVP bus, while CSI-2 needs setup. */
if (sensor->ep.bus_type != V4L2_MBUS_CSI2_DPHY)
return 0;
/*
* Power up MIPI HS Tx and LS Rx; 2 data lanes mode
*
* 0x300e = 0x40
* [7:5] = 010 : 2 data lanes mode (see FIXME note in
* "ov5640_set_stream_mipi()")
* [4] = 0 : Power up MIPI HS Tx
* [3] = 0 : Power up MIPI LS Rx
* [2] = 0 : MIPI interface disabled
*/
ret = ov5640_write_reg(sensor,
OV5640_REG_IO_MIPI_CTRL00, 0x40);
if (ret)
goto power_off;
/*
* Gate clock and set LP11 in 'no packets mode' (idle)
*
* 0x4800 = 0x24
* [5] = 1 : Gate clock when 'no packets'
* [2] = 1 : MIPI bus in LP11 when 'no packets'
*/
ret = ov5640_write_reg(sensor,
OV5640_REG_MIPI_CTRL00, 0x24);
if (ret)
goto power_off;
/*
* Set data lanes and clock in LP11 when 'sleeping'
*
* 0x3019 = 0x70
* [6] = 1 : MIPI data lane 2 in LP11 when 'sleeping'
* [5] = 1 : MIPI data lane 1 in LP11 when 'sleeping'
* [4] = 1 : MIPI clock lane in LP11 when 'sleeping'
*/
ret = ov5640_write_reg(sensor,
OV5640_REG_PAD_OUTPUT00, 0x70);
if (ret)
goto power_off;
/* Give lanes some time to coax into LP11 state. */
usleep_range(500, 1000);
} else {
if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) {
/* Reset MIPI bus settings to their default values. */
ov5640_write_reg(sensor,
OV5640_REG_IO_MIPI_CTRL00, 0x58);
ov5640_write_reg(sensor,
OV5640_REG_MIPI_CTRL00, 0x04);
ov5640_write_reg(sensor,
OV5640_REG_PAD_OUTPUT00, 0x00);
}
ov5640_set_power_off(sensor);
}
if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) {
ret = ov5640_set_power_mipi(sensor, on);
if (ret)
goto power_off;
}
if (!on)
ov5640_set_power_off(sensor);
return 0;
power_off: