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dt-bindings: interrupt-controller: Add binding for few Microsemi interrupt controllers 

Add the Device Tree binding documentation for the Microsemi Jaguar2,
Luton and Serval interrupt controller that is part of the ICPU. It is
connected directly to the MIPS core interrupt controller.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201125103206.136498-3-gregory.clement@bootlin.com
zero-sugar-mainline-defconfig
Gregory CLEMENT 2020-11-25 11:32:02 +01:00 committed by Marc Zyngier
parent 47d5e0b0e1
commit b307ee828f
1 changed files with 4 additions and 0 deletions
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4
Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml
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@ -21,7 +21,11 @@ properties:
compatible:
items:
- enum:
- mscc,jaguar2-icpu-intr
- mscc,luton-icpu-intr
- mscc,ocelot-icpu-intr
- mscc,serval-icpu-intr
'#interrupt-cells':
const: 1