usb: dwc3: Add workaround for host mode VBUS glitch when boot
When DWC3 is set to host mode by programming register DWC3_GCTL, VBUS (or its control signal) will be turned on immediately on related Root Hub ports. Then, the VBUS is turned off for a little while(15us) when do xhci reset (conducted by xhci driver) and back to normal finally, we can observe a negative glitch of related signal happen. This VBUS glitch might cause some USB devices enumeration fail if kernel boot with them connected. Such as LS1012AFWRY/LS1043ARDB/LX2160AQDS /LS1088ARDB with Kingston 16GB USB2.0/Kingston USB3.0/JetFlash Transcend 4GB USB2.0 drives. The fail cases include enumerated as full-speed device or report wrong device descriptor, etc. One SW workaround which can fix this is by programing all xhci PORTSC[PP] to 0 to turn off VBUS immediately after setting host mode in DWC3 driver (per signal measurement result, it will be too late to do it in xhci-plat.c or xhci.c). Then, after xhci reset complete in xhci driver, PORTSC[PP]s' value will back to 1 automatically and VBUS on at that time, no glitch happen and normal enumeration process has no impact. Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Reviewed-by: Peter Chen <peter.chen@nxp.com>5.4-rM2-2.2.x-imx-squashed
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bca3c354c8
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b30e41dc1e
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@ -1347,6 +1347,9 @@ static void dwc3_get_properties(struct dwc3 *dwc)
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dwc->dis_metastability_quirk = device_property_read_bool(dev,
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"snps,dis_metastability_quirk");
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dwc->host_vbus_glitches = device_property_read_bool(dev,
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"snps,host-vbus-glitches");
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dwc->lpm_nyet_threshold = lpm_nyet_threshold;
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dwc->tx_de_emphasis = tx_de_emphasis;
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@ -1032,6 +1032,8 @@ struct dwc3_scratchpad_array {
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* 2 - No de-emphasis
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* 3 - Reserved
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* @dis_metastability_quirk: set to disable metastability quirk.
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* @host_vbus_glitches: set to avoid vbus glitch during
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* xhci reset.
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* @imod_interval: set the interrupt moderation interval in 250ns
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* increments or 0 to disable.
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*/
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@ -1223,6 +1225,7 @@ struct dwc3 {
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unsigned tx_de_emphasis:2;
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unsigned dis_metastability_quirk:1;
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unsigned host_vbus_glitches:1;
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u16 imod_interval;
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};
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@ -9,8 +9,49 @@
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#include <linux/platform_device.h>
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#include "../host/xhci.h"
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#include "core.h"
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#define XHCI_HCSPARAMS1 0x4
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#define XHCI_PORTSC_BASE 0x400
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/*
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* dwc3_power_off_all_roothub_ports - Power off all Root hub ports
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* @dwc3: Pointer to our controller context structure
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*/
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static void dwc3_power_off_all_roothub_ports(struct dwc3 *dwc)
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{
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int i, port_num;
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u32 reg, op_regs_base, offset;
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void __iomem *xhci_regs;
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/* xhci regs is not mapped yet, do it temperary here */
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if (dwc->xhci_resources[0].start) {
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xhci_regs = ioremap(dwc->xhci_resources[0].start,
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DWC3_XHCI_REGS_END);
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if (IS_ERR(xhci_regs)) {
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dev_err(dwc->dev, "Failed to ioremap xhci_regs\n");
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return;
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}
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op_regs_base = HC_LENGTH(readl(xhci_regs));
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reg = readl(xhci_regs + XHCI_HCSPARAMS1);
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port_num = HCS_MAX_PORTS(reg);
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for (i = 1; i <= port_num; i++) {
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offset = op_regs_base + XHCI_PORTSC_BASE + 0x10*(i-1);
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reg = readl(xhci_regs + offset);
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reg &= ~PORT_POWER;
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writel(reg, xhci_regs + offset);
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}
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iounmap(xhci_regs);
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} else
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dev_err(dwc->dev, "xhci base reg invalid\n");
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}
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static int dwc3_host_get_irq(struct dwc3 *dwc)
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{
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struct platform_device *dwc3_pdev = to_platform_device(dwc->dev);
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@ -50,6 +91,13 @@ int dwc3_host_init(struct dwc3 *dwc)
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struct platform_device *dwc3_pdev = to_platform_device(dwc->dev);
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int prop_idx = 0;
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/*
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* We have to power off all Root hub ports immediately after DWC3 set
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* to host mode to avoid VBUS glitch happen when xhci get reset later.
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*/
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if (dwc->host_vbus_glitches)
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dwc3_power_off_all_roothub_ports(dwc);
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irq = dwc3_host_get_irq(dwc);
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if (irq < 0)
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return irq;
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