redonkable
/
alistair23-linux
1
0
Fork 0
Code Releases Activity

drivers: net: phy: aquantia: Add XFI counters 

Adds XFI counters and enables counters for AQR112/412.  These are gen 3
PHYs, the register map is compatible with AQR107 which is gen 2.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
(cherry picked from commit 8d938182eee9dcd3f48dca3162f5ec5f0cf1dc34)
5.4-rM2-2.2.x-imx-squashed
Alex Marginean 2020-01-06 17:57:10 +02:00 committed by Jason Liu
parent 3a2eb6f453
commit b329ce9355
1 changed files with 24 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

27
drivers/net/phy/aquantia_main.c
View File

@ -25,6 +25,12 @@
#define PHY_ID_AQR112 0x03a1b662
#define PHY_ID_AQR412 0x03a1b712
/* PCS counters */
#define MDIO_C45_PCS_STAT_XFI_TX_GOOD_FRAMES 0xc860
#define MDIO_C45_PCS_STAT_XFI_TX_BAD_FRAMES 0xc862
#define MDIO_C45_PCS_STAT_XFI_RX_GOOD_FRAMES 0xe860
#define MDIO_C45_PCS_STAT_XFI_RX_BAD_FRAMES 0xe862
#define MDIO_PHYXS_VEND_IF_STATUS 0xe812
#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3)
#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_KR 0
@ -153,9 +159,12 @@ struct aqr107_hw_stat {
const char *name;
int reg;
int size;
int devad;
};
#define SGMII_STAT(n, r, s) { n, MDIO_C22EXT_STAT_SGMII_ ## r, s }
#define SGMII_STAT(n, r, s) { n, MDIO_C22EXT_STAT_SGMII_ ## r, s, \
MDIO_MMD_C22EXT}
#define C45_PCS_STAT(n, r, s) { n, MDIO_C45_PCS_STAT_ ## r, s, MDIO_MMD_PCS }
static const struct aqr107_hw_stat aqr107_hw_stats[] = {
SGMII_STAT("sgmii_rx_good_frames", RX_GOOD_FRAMES, 26),
SGMII_STAT("sgmii_rx_bad_frames", RX_BAD_FRAMES, 26),
@ -167,6 +176,10 @@ static const struct aqr107_hw_stat aqr107_hw_stats[] = {
SGMII_STAT("sgmii_tx_line_collisions", TX_LINE_COLLISIONS, 8),
SGMII_STAT("sgmii_tx_frame_alignment_err", TX_FRAME_ALIGN_ERR, 16),
SGMII_STAT("sgmii_tx_runt_frames", TX_RUNT_FRAMES, 22),
C45_PCS_STAT("xfi_rx_good_frames", XFI_RX_GOOD_FRAMES, 26),
C45_PCS_STAT("xfi_rx_bad_frames", XFI_RX_BAD_FRAMES, 26),
C45_PCS_STAT("xfi_tx_good_frames", XFI_TX_GOOD_FRAMES, 26),
C45_PCS_STAT("xfi_tx_bad_frames", XFI_TX_BAD_FRAMES, 26),
};
#define AQR107_SGMII_STAT_SZ ARRAY_SIZE(aqr107_hw_stats)
@ -196,13 +209,13 @@ static u64 aqr107_get_stat(struct phy_device *phydev, int index)
u64 ret;
int val;
val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg);
val = phy_read_mmd(phydev, stat->devad, stat->reg);
if (val < 0)
return U64_MAX;
ret = val & GENMASK(len_l - 1, 0);
if (len_h) {
val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg + 1);
val = phy_read_mmd(phydev, stat->devad, stat->reg + 1);
if (val < 0)
return U64_MAX;
@ -766,18 +779,26 @@ static struct phy_driver aqr_driver[] = {
{
PHY_ID_MATCH_MODEL(PHY_ID_AQR112),
.name = "Aquantia AQR112",
.probe = aqr107_probe,
.config_aneg = aqr_config_aneg_set_prot,
.config_intr = aqr_config_intr,
.ack_interrupt = aqr_ack_interrupt,
.read_status = aqr_read_status,
.get_sset_count = aqr107_get_sset_count,
.get_strings = aqr107_get_strings,
.get_stats = aqr107_get_stats,
},
{
PHY_ID_MATCH_MODEL(PHY_ID_AQR412),
.name = "Aquantia AQR412",
.probe = aqr107_probe,
.config_aneg = aqr_config_aneg_set_prot,
.config_intr = aqr_config_intr,
.ack_interrupt = aqr_ack_interrupt,
.read_status = aqr_read_status,
.get_sset_count = aqr107_get_sset_count,
.get_strings = aqr107_get_strings,
.get_stats = aqr107_get_stats,
},
};