cxl/mem: Register CXL memX devices
Create the /sys/bus/cxl hierarchy to enumerate: * Memory Devices (per-endpoint control devices) * Memory Address Space Devices (platform address ranges with interleaving, performance, and persistence attributes) * Memory Regions (active provisioned memory from an address space device that is in use as System RAM or delegated to libnvdimm as Persistent Memory regions). For now, only the per-endpoint control devices are registered on the 'cxl' bus. However, going forward it will provide a mechanism to coordinate cross-device interleave. Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> (v2) Link: https://lore.kernel.org/r/20210217040958.1354670-4-ben.widawsky@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>master
Dan Williams
parent
8adaf747c9
commit
b39cb1052a
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@ -0,0 +1,26 @@
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What: /sys/bus/cxl/devices/memX/firmware_version
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Date: December, 2020
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KernelVersion: v5.12
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Contact: linux-cxl@vger.kernel.org
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Description:
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(RO) "FW Revision" string as reported by the Identify
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Memory Device Output Payload in the CXL-2.0
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specification.
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What: /sys/bus/cxl/devices/memX/ram/size
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Date: December, 2020
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KernelVersion: v5.12
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Contact: linux-cxl@vger.kernel.org
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Description:
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(RO) "Volatile Only Capacity" as bytes. Represents the
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identically named field in the Identify Memory Device Output
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Payload in the CXL-2.0 specification.
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What: /sys/bus/cxl/devices/memX/pmem/size
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Date: December, 2020
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KernelVersion: v5.12
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Contact: linux-cxl@vger.kernel.org
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Description:
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(RO) "Persistent Only Capacity" as bytes. Represents the
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identically named field in the Identify Memory Device Output
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Payload in the CXL-2.0 specification.
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@ -27,3 +27,8 @@ CXL Memory Device
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.. kernel-doc:: drivers/cxl/mem.c
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:internal:
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CXL Bus
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-------
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.. kernel-doc:: drivers/cxl/bus.c
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:doc: cxl bus
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@ -1,4 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_CXL_BUS) += cxl_bus.o
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obj-$(CONFIG_CXL_MEM) += cxl_mem.o
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ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE=CXL
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cxl_bus-y := bus.o
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cxl_mem-y := mem.o
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@ -0,0 +1,29 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/* Copyright(c) 2020 Intel Corporation. All rights reserved. */
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#include <linux/device.h>
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#include <linux/module.h>
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/**
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* DOC: cxl bus
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*
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* The CXL bus provides namespace for control devices and a rendezvous
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* point for cross-device interleave coordination.
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*/
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struct bus_type cxl_bus_type = {
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.name = "cxl",
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};
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EXPORT_SYMBOL_GPL(cxl_bus_type);
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static __init int cxl_bus_init(void)
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{
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return bus_register(&cxl_bus_type);
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}
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static void cxl_bus_exit(void)
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{
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bus_unregister(&cxl_bus_type);
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}
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module_init(cxl_bus_init);
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module_exit(cxl_bus_exit);
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MODULE_LICENSE("GPL v2");
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@ -57,6 +57,7 @@
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(FIELD_GET(CXLMDEV_RESET_NEEDED_MASK, status) != \
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CXLMDEV_RESET_NEEDED_NOT)
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struct cxl_memdev;
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/**
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* struct cxl_mem - A CXL memory device
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* @pdev: The PCI device associated with this CXL device.
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@ -74,6 +75,7 @@
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struct cxl_mem {
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struct pci_dev *pdev;
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void __iomem *regs;
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struct cxl_memdev *cxlmd;
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void __iomem *status_regs;
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void __iomem *mbox_regs;
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@ -87,4 +89,5 @@ struct cxl_mem {
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struct range ram_range;
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};
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extern struct bus_type cxl_bus_type;
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#endif /* __CXL_H__ */
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@ -1,6 +1,9 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/* Copyright(c) 2020 Intel Corporation. All rights reserved. */
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/cdev.h>
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#include <linux/idr.h>
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#include <linux/pci.h>
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#include <linux/io.h>
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#include <linux/io-64-nonatomic-lo-hi.h>
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@ -23,6 +26,12 @@
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* - Handle and manage error conditions.
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*/
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/*
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* An entire PCI topology full of devices should be enough for any
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* config
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*/
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#define CXL_MEM_MAX_DEVS 65536
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#define cxl_doorbell_busy(cxlm) \
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(readl((cxlm)->mbox_regs + CXLDEV_MBOX_CTRL_OFFSET) & \
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CXLDEV_MBOX_CTRL_DOORBELL)
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@ -65,6 +74,27 @@ struct mbox_cmd {
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#define CXL_MBOX_SUCCESS 0
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};
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/**
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* struct cxl_memdev - CXL bus object representing a Type-3 Memory Device
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* @dev: driver core device object
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* @cdev: char dev core object for ioctl operations
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* @cxlm: pointer to the parent device driver data
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* @ops_active: active user of @cxlm in ops handlers
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* @ops_dead: completion when all @cxlm ops users have exited
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* @id: id number of this memdev instance.
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*/
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struct cxl_memdev {
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struct device dev;
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struct cdev cdev;
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struct cxl_mem *cxlm;
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struct percpu_ref ops_active;
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struct completion ops_dead;
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int id;
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};
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static int cxl_mem_major;
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static DEFINE_IDA(cxl_memdev_ida);
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static int cxl_mem_wait_for_doorbell(struct cxl_mem *cxlm)
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{
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const unsigned long start = jiffies;
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@ -294,6 +324,33 @@ static void cxl_mem_mbox_put(struct cxl_mem *cxlm)
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mutex_unlock(&cxlm->mbox_mutex);
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}
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static long cxl_memdev_ioctl(struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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struct cxl_memdev *cxlmd;
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struct inode *inode;
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int rc = -ENOTTY;
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inode = file_inode(file);
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cxlmd = container_of(inode->i_cdev, typeof(*cxlmd), cdev);
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if (!percpu_ref_tryget_live(&cxlmd->ops_active))
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return -ENXIO;
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/* TODO: ioctl body */
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percpu_ref_put(&cxlmd->ops_active);
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return rc;
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}
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static const struct file_operations cxl_memdev_fops = {
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.owner = THIS_MODULE,
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.unlocked_ioctl = cxl_memdev_ioctl,
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.compat_ioctl = compat_ptr_ioctl,
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.llseek = noop_llseek,
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};
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/**
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* cxl_mem_mbox_send_cmd() - Send a mailbox command to a memory device.
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* @cxlm: The CXL memory device to communicate with.
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@ -512,6 +569,197 @@ static int cxl_mem_dvsec(struct pci_dev *pdev, int dvsec)
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return 0;
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}
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static struct cxl_memdev *to_cxl_memdev(struct device *dev)
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{
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return container_of(dev, struct cxl_memdev, dev);
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}
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static void cxl_memdev_release(struct device *dev)
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{
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struct cxl_memdev *cxlmd = to_cxl_memdev(dev);
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percpu_ref_exit(&cxlmd->ops_active);
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ida_free(&cxl_memdev_ida, cxlmd->id);
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kfree(cxlmd);
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}
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static char *cxl_memdev_devnode(struct device *dev, umode_t *mode, kuid_t *uid,
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kgid_t *gid)
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{
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return kasprintf(GFP_KERNEL, "cxl/%s", dev_name(dev));
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}
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static ssize_t firmware_version_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct cxl_memdev *cxlmd = to_cxl_memdev(dev);
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struct cxl_mem *cxlm = cxlmd->cxlm;
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return sprintf(buf, "%.16s\n", cxlm->firmware_version);
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}
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static DEVICE_ATTR_RO(firmware_version);
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static ssize_t payload_max_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct cxl_memdev *cxlmd = to_cxl_memdev(dev);
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struct cxl_mem *cxlm = cxlmd->cxlm;
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return sprintf(buf, "%zu\n", cxlm->payload_size);
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}
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static DEVICE_ATTR_RO(payload_max);
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static ssize_t ram_size_show(struct device *dev, struct device_attribute *attr,
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char *buf)
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{
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struct cxl_memdev *cxlmd = to_cxl_memdev(dev);
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struct cxl_mem *cxlm = cxlmd->cxlm;
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unsigned long long len = range_len(&cxlm->ram_range);
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return sprintf(buf, "%#llx\n", len);
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}
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static struct device_attribute dev_attr_ram_size =
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__ATTR(size, 0444, ram_size_show, NULL);
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static ssize_t pmem_size_show(struct device *dev, struct device_attribute *attr,
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char *buf)
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{
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struct cxl_memdev *cxlmd = to_cxl_memdev(dev);
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struct cxl_mem *cxlm = cxlmd->cxlm;
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unsigned long long len = range_len(&cxlm->pmem_range);
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return sprintf(buf, "%#llx\n", len);
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}
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static struct device_attribute dev_attr_pmem_size =
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__ATTR(size, 0444, pmem_size_show, NULL);
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static struct attribute *cxl_memdev_attributes[] = {
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&dev_attr_firmware_version.attr,
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&dev_attr_payload_max.attr,
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NULL,
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};
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static struct attribute *cxl_memdev_pmem_attributes[] = {
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&dev_attr_pmem_size.attr,
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NULL,
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};
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static struct attribute *cxl_memdev_ram_attributes[] = {
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&dev_attr_ram_size.attr,
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NULL,
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};
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static struct attribute_group cxl_memdev_attribute_group = {
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.attrs = cxl_memdev_attributes,
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};
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static struct attribute_group cxl_memdev_ram_attribute_group = {
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.name = "ram",
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.attrs = cxl_memdev_ram_attributes,
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};
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static struct attribute_group cxl_memdev_pmem_attribute_group = {
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.name = "pmem",
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.attrs = cxl_memdev_pmem_attributes,
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};
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static const struct attribute_group *cxl_memdev_attribute_groups[] = {
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&cxl_memdev_attribute_group,
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&cxl_memdev_ram_attribute_group,
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&cxl_memdev_pmem_attribute_group,
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NULL,
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};
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static const struct device_type cxl_memdev_type = {
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.name = "cxl_memdev",
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.release = cxl_memdev_release,
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.devnode = cxl_memdev_devnode,
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.groups = cxl_memdev_attribute_groups,
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};
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static void cxlmdev_unregister(void *_cxlmd)
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{
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struct cxl_memdev *cxlmd = _cxlmd;
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struct device *dev = &cxlmd->dev;
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percpu_ref_kill(&cxlmd->ops_active);
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cdev_device_del(&cxlmd->cdev, dev);
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wait_for_completion(&cxlmd->ops_dead);
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cxlmd->cxlm = NULL;
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put_device(dev);
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}
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static void cxlmdev_ops_active_release(struct percpu_ref *ref)
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{
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struct cxl_memdev *cxlmd =
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container_of(ref, typeof(*cxlmd), ops_active);
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complete(&cxlmd->ops_dead);
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}
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static int cxl_mem_add_memdev(struct cxl_mem *cxlm)
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{
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struct pci_dev *pdev = cxlm->pdev;
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struct cxl_memdev *cxlmd;
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struct device *dev;
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struct cdev *cdev;
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int rc;
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cxlmd = kzalloc(sizeof(*cxlmd), GFP_KERNEL);
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if (!cxlmd)
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return -ENOMEM;
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init_completion(&cxlmd->ops_dead);
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/*
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* @cxlm is deallocated when the driver unbinds so operations
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* that are using it need to hold a live reference.
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*/
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cxlmd->cxlm = cxlm;
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rc = percpu_ref_init(&cxlmd->ops_active, cxlmdev_ops_active_release, 0,
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GFP_KERNEL);
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if (rc)
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goto err_ref;
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rc = ida_alloc_range(&cxl_memdev_ida, 0, CXL_MEM_MAX_DEVS, GFP_KERNEL);
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if (rc < 0)
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goto err_id;
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cxlmd->id = rc;
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dev = &cxlmd->dev;
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device_initialize(dev);
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dev->parent = &pdev->dev;
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dev->bus = &cxl_bus_type;
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dev->devt = MKDEV(cxl_mem_major, cxlmd->id);
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dev->type = &cxl_memdev_type;
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dev_set_name(dev, "mem%d", cxlmd->id);
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cdev = &cxlmd->cdev;
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cdev_init(cdev, &cxl_memdev_fops);
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rc = cdev_device_add(cdev, dev);
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if (rc)
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goto err_add;
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return devm_add_action_or_reset(dev->parent, cxlmdev_unregister, cxlmd);
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err_add:
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ida_free(&cxl_memdev_ida, cxlmd->id);
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err_id:
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/*
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* Theoretically userspace could have already entered the fops,
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* so flush ops_active.
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*/
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percpu_ref_kill(&cxlmd->ops_active);
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wait_for_completion(&cxlmd->ops_dead);
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percpu_ref_exit(&cxlmd->ops_active);
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err_ref:
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kfree(cxlmd);
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return rc;
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}
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/**
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* cxl_mem_identify() - Send the IDENTIFY command to the device.
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* @cxlm: The device to identify.
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@ -612,7 +860,11 @@ static int cxl_mem_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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if (rc)
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return rc;
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return cxl_mem_identify(cxlm);
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rc = cxl_mem_identify(cxlm);
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if (rc)
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return rc;
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return cxl_mem_add_memdev(cxlm);
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}
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static const struct pci_device_id cxl_mem_pci_tbl[] = {
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@ -631,5 +883,34 @@ static struct pci_driver cxl_mem_driver = {
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},
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};
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static __init int cxl_mem_init(void)
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{
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dev_t devt;
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int rc;
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rc = alloc_chrdev_region(&devt, 0, CXL_MEM_MAX_DEVS, "cxl");
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if (rc)
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return rc;
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cxl_mem_major = MAJOR(devt);
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rc = pci_register_driver(&cxl_mem_driver);
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if (rc) {
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unregister_chrdev_region(MKDEV(cxl_mem_major, 0),
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CXL_MEM_MAX_DEVS);
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return rc;
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}
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return 0;
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}
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static __exit void cxl_mem_exit(void)
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{
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pci_unregister_driver(&cxl_mem_driver);
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unregister_chrdev_region(MKDEV(cxl_mem_major, 0), CXL_MEM_MAX_DEVS);
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}
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MODULE_LICENSE("GPL v2");
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module_pci_driver(cxl_mem_driver);
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module_init(cxl_mem_init);
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module_exit(cxl_mem_exit);
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MODULE_IMPORT_NS(CXL);
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Loading…
Reference in New Issue