drm/radeon/kms: fix vram start calculation on ontario (v2)
Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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ca9693a173
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@ -1134,6 +1134,12 @@ static void evergreen_mc_program(struct radeon_device *rdev)
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rdev->mc.vram_end >> 12);
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}
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WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, 0);
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if (rdev->flags & RADEON_IS_IGP) {
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tmp = RREG32(MC_FUS_VM_FB_OFFSET) & 0x000FFFFF;
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tmp |= ((rdev->mc.vram_end >> 20) & 0xF) << 24;
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tmp |= ((rdev->mc.vram_start >> 20) & 0xF) << 20;
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WREG32(MC_FUS_VM_FB_OFFSET, tmp);
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}
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tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16;
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tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF);
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WREG32(MC_VM_FB_LOCATION, tmp);
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@ -202,6 +202,7 @@
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#define MC_VM_AGP_BOT 0x202C
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#define MC_VM_AGP_BASE 0x2030
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#define MC_VM_FB_LOCATION 0x2024
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#define MC_FUS_VM_FB_OFFSET 0x2898
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#define MC_VM_MB_L1_TLB0_CNTL 0x2234
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#define MC_VM_MB_L1_TLB1_CNTL 0x2238
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#define MC_VM_MB_L1_TLB2_CNTL 0x223C
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@ -271,12 +271,6 @@ static void rv770_mc_program(struct radeon_device *rdev)
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rdev->mc.vram_end >> 12);
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}
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WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, 0);
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if (rdev->flags & RADEON_IS_IGP) {
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tmp = RREG32(MC_FUS_VM_FB_OFFSET) & 0x000FFFFF;
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tmp |= ((rdev->mc.vram_end >> 20) & 0xF) << 24;
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tmp |= ((rdev->mc.vram_start >> 20) & 0xF) << 20;
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WREG32(MC_FUS_VM_FB_OFFSET, tmp);
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}
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tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16;
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tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF);
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WREG32(MC_VM_FB_LOCATION, tmp);
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@ -1074,12 +1068,7 @@ void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc)
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mc->mc_vram_size >> 20, mc->vram_start,
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mc->vram_end, mc->real_vram_size >> 20);
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} else {
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u64 base = 0;
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if (rdev->flags & RADEON_IS_IGP) {
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base = (RREG32(MC_VM_FB_LOCATION) & 0xFFFF) << 24;
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base |= RREG32(MC_FUS_VM_FB_OFFSET) & 0x00F00000;
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}
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radeon_vram_location(rdev, &rdev->mc, base);
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radeon_vram_location(rdev, &rdev->mc, 0);
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rdev->mc.gtt_base_align = 0;
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radeon_gtt_location(rdev, mc);
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}
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@ -158,7 +158,6 @@
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#define MC_VM_AGP_BOT 0x202C
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#define MC_VM_AGP_BASE 0x2030
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#define MC_VM_FB_LOCATION 0x2024
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#define MC_FUS_VM_FB_OFFSET 0x2898
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#define MC_VM_MB_L1_TLB0_CNTL 0x2234
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#define MC_VM_MB_L1_TLB1_CNTL 0x2238
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#define MC_VM_MB_L1_TLB2_CNTL 0x223C
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