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[SCSI] mpt3sas: Updated the Hardware timing requirements 

Hardware timing requirements is updated in order to comply with firmware
requirement.

Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@lsi.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
hifive-unleashed-5.1
Sreekanth Reddy 2013-06-29 03:51:19 +05:30 committed by James Bottomley
parent 48e3b9855d
commit b453ff84de
1 changed files with 13 additions and 7 deletions
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20
drivers/scsi/mpt3sas/mpt3sas_base.c
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@ -4090,11 +4090,15 @@ _base_diag_reset(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
&ioc->chip->HostDiagnostic);
/* don't access any registers for 50 milliseconds */
msleep(50);
/*This delay allows the chip PCIe hardware time to finish reset tasks*/
if (sleep_flag == CAN_SLEEP)
msleep(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
else
mdelay(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
/* 300 second max wait */
for (count = 0; count < 3000000 ; count++) {
/* Approximately 300 second max wait */
for (count = 0; count < (300000000 /
MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC); count++) {
host_diagnostic = readl(&ioc->chip->HostDiagnostic);
@ -4103,11 +4107,13 @@ _base_diag_reset(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
break;
/* wait 1 msec */
/* Wait to pass the second read delay window */
if (sleep_flag == CAN_SLEEP)
usleep_range(1000, 1500);
msleep(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
/ 1000);
else
mdelay(1);
mdelay(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
/ 1000);
}
if (host_diagnostic & MPI2_DIAG_HCB_MODE) {