mtd: FSMC NAND fix obvious speling errors
Fix spelling in the interface file. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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@ -28,7 +28,7 @@
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/*
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* The placement of the Command Latch Enable (CLE) and
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* Address Latch Enable (ALE) is twised around in the
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* Address Latch Enable (ALE) is twisted around in the
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* SPEAR310 implementation.
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*/
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#if defined(CONFIG_MACH_SPEAR310)
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@ -63,7 +63,7 @@ struct fsmc_nor_bank_regs {
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/* ctrl_tim register definitions */
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struct fsms_nand_bank_regs {
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struct fsmc_nand_bank_regs {
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uint32_t pc;
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uint32_t sts;
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uint32_t comm;
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@ -79,7 +79,7 @@ struct fsms_nand_bank_regs {
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struct fsmc_regs {
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struct fsmc_nor_bank_regs nor_bank_regs[FSMC_MAX_NOR_BANKS];
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uint8_t reserved_1[0x40 - 0x20];
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struct fsms_nand_bank_regs bank_regs[FSMC_MAX_NAND_BANKS];
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struct fsmc_nand_bank_regs bank_regs[FSMC_MAX_NAND_BANKS];
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uint8_t reserved_2[0xfe0 - 0xc0];
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uint32_t peripid0; /* 0xfe0 */
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uint32_t peripid1; /* 0xfe4 */
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